📄 ledhb.lss
字号:
LEDHB.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00000574 00000000 00000000 00000094 2**0
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .data 0000004e 00800060 00000574 00000608 2**0
CONTENTS, ALLOC, LOAD, DATA
2 .bss 00000004 008000ae 008000ae 00000656 2**0
ALLOC
3 .noinit 00000000 008000b2 008000b2 00000656 2**0
CONTENTS
4 .eeprom 00000000 00810000 00810000 00000656 2**0
CONTENTS
5 .stab 0000036c 00000000 00000000 00000658 2**2
CONTENTS, READONLY, DEBUGGING
6 .stabstr 00000084 00000000 00000000 000009c4 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_aranges 00000014 00000000 00000000 00000a48 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_pubnames 000000d6 00000000 00000000 00000a5c 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_info 000001e6 00000000 00000000 00000b32 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_abbrev 000000ad 00000000 00000000 00000d18 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_line 0000030a 00000000 00000000 00000dc5 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_str 000000f4 00000000 00000000 000010cf 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <__vectors>:
0: 12 c0 rjmp .+36 ; 0x26 <__ctors_end>
2: 2b c0 rjmp .+86 ; 0x5a <__bad_interrupt>
4: 2a c0 rjmp .+84 ; 0x5a <__bad_interrupt>
6: 29 c0 rjmp .+82 ; 0x5a <__bad_interrupt>
8: 28 c0 rjmp .+80 ; 0x5a <__bad_interrupt>
a: 27 c0 rjmp .+78 ; 0x5a <__bad_interrupt>
c: 28 c2 rjmp .+1104 ; 0x45e <__vector_6>
e: 25 c0 rjmp .+74 ; 0x5a <__bad_interrupt>
10: 24 c0 rjmp .+72 ; 0x5a <__bad_interrupt>
12: 23 c0 rjmp .+70 ; 0x5a <__bad_interrupt>
14: 22 c0 rjmp .+68 ; 0x5a <__bad_interrupt>
16: 21 c0 rjmp .+66 ; 0x5a <__bad_interrupt>
18: 20 c0 rjmp .+64 ; 0x5a <__bad_interrupt>
1a: 1f c0 rjmp .+62 ; 0x5a <__bad_interrupt>
1c: 1e c0 rjmp .+60 ; 0x5a <__bad_interrupt>
1e: 1d c0 rjmp .+58 ; 0x5a <__bad_interrupt>
20: 1c c0 rjmp .+56 ; 0x5a <__bad_interrupt>
22: 1b c0 rjmp .+54 ; 0x5a <__bad_interrupt>
24: 1a c0 rjmp .+52 ; 0x5a <__bad_interrupt>
00000026 <__ctors_end>:
26: 11 24 eor r1, r1
28: 1f be out 0x3f, r1 ; 63
2a: cf e5 ldi r28, 0x5F ; 95
2c: d4 e0 ldi r29, 0x04 ; 4
2e: de bf out 0x3e, r29 ; 62
30: cd bf out 0x3d, r28 ; 61
00000032 <__do_copy_data>:
32: 10 e0 ldi r17, 0x00 ; 0
34: a0 e6 ldi r26, 0x60 ; 96
36: b0 e0 ldi r27, 0x00 ; 0
38: e4 e7 ldi r30, 0x74 ; 116
3a: f5 e0 ldi r31, 0x05 ; 5
3c: 02 c0 rjmp .+4 ; 0x42 <.do_copy_data_start>
0000003e <.do_copy_data_loop>:
3e: 05 90 lpm r0, Z+
40: 0d 92 st X+, r0
00000042 <.do_copy_data_start>:
42: ae 3a cpi r26, 0xAE ; 174
44: b1 07 cpc r27, r17
46: d9 f7 brne .-10 ; 0x3e <.do_copy_data_loop>
00000048 <__do_clear_bss>:
48: 10 e0 ldi r17, 0x00 ; 0
4a: ae ea ldi r26, 0xAE ; 174
4c: b0 e0 ldi r27, 0x00 ; 0
4e: 01 c0 rjmp .+2 ; 0x52 <.do_clear_bss_start>
00000050 <.do_clear_bss_loop>:
50: 1d 92 st X+, r1
00000052 <.do_clear_bss_start>:
52: a2 3b cpi r26, 0xB2 ; 178
54: b1 07 cpc r27, r17
56: e1 f7 brne .-8 ; 0x50 <.do_clear_bss_loop>
58: 30 c2 rjmp .+1120 ; 0x4ba <main>
0000005a <__bad_interrupt>:
5a: d2 cf rjmp .-92 ; 0x0 <__vectors>
0000005c <delay_us>:
void delay_us(int time)//245*time 微秒
{
do
{
time--;
5c: 01 97 sbiw r24, 0x01 ; 1
}
5e: 82 30 cpi r24, 0x02 ; 2
60: 91 05 cpc r25, r1
62: e4 f7 brge .-8 ; 0x5c <delay_us>
64: 08 95 ret
00000066 <t1_init>:
while (time>1);
}
void t1_init(void)
{
TCCR1B|=(1<<CS10)|(1<<WGM12);
66: 8e b5 in r24, 0x2e ; 46
68: 89 60 ori r24, 0x09 ; 9
6a: 8e bd out 0x2e, r24 ; 46
TIMSK|=(1<< OCIE1A);
6c: 89 b7 in r24, 0x39 ; 57
6e: 80 61 ori r24, 0x10 ; 16
70: 89 bf out 0x39, r24 ; 57
OCR1A = 32768;
72: 80 e0 ldi r24, 0x00 ; 0
74: 90 e8 ldi r25, 0x80 ; 128
76: 9b bd out 0x2b, r25 ; 43
78: 8a bd out 0x2a, r24 ; 42
7a: 08 95 ret
0000007c <port_init>:
}
void port_init(void)
{
PORTB |=~0xc7;
7c: 88 b3 in r24, 0x18 ; 24
7e: 88 63 ori r24, 0x38 ; 56
80: 88 bb out 0x18, r24 ; 24
PORTC &= 0xc0;
82: 90 ec ldi r25, 0xC0 ; 192
84: 85 b3 in r24, 0x15 ; 21
86: 89 23 and r24, r25
88: 85 bb out 0x15, r24 ; 21
PORTD &= 0xc0;
8a: 82 b3 in r24, 0x12 ; 18
8c: 89 23 and r24, r25
8e: 82 bb out 0x12, r24 ; 18
DDRB &= 0xc7;
90: 87 b3 in r24, 0x17 ; 23
92: 87 7c andi r24, 0xC7 ; 199
94: 87 bb out 0x17, r24 ; 23
DDRC &= 0xc0;
96: 84 b3 in r24, 0x14 ; 20
98: 89 23 and r24, r25
9a: 84 bb out 0x14, r24 ; 20
DDRD &= 0xc0;
9c: 81 b3 in r24, 0x11 ; 17
9e: 89 23 and r24, r25
a0: 81 bb out 0x11, r24 ; 17
a2: 08 95 ret
000000a4 <disp_seconds>:
}
//=================== sub ====================//
void disp_seconds(void)
{
DDRD &= 0xc0;
a4: 81 b3 in r24, 0x11 ; 17
a6: 80 7c andi r24, 0xC0 ; 192
a8: 81 bb out 0x11, r24 ; 17
DDRC &= 0xc0;
aa: 84 b3 in r24, 0x14 ; 20
ac: 80 7c andi r24, 0xC0 ; 192
ae: 84 bb out 0x14, r24 ; 20
PORTD &= 0xc0;
b0: 82 b3 in r24, 0x12 ; 18
b2: 80 7c andi r24, 0xC0 ; 192
b4: 82 bb out 0x12, r24 ; 18
PORTC &= 0xc0;
b6: 85 b3 in r24, 0x15 ; 21
b8: 80 7c andi r24, 0xC0 ; 192
ba: 85 bb out 0x15, r24 ; 21
if (ORING[seconds] <= 6)
bc: 80 91 af 00 lds r24, 0x00AF
c0: e8 2f mov r30, r24
c2: ff 27 eor r31, r31
c4: e2 59 subi r30, 0x92 ; 146
c6: ff 4f sbci r31, 0xFF ; 255
c8: 80 81 ld r24, Z
ca: 87 30 cpi r24, 0x07 ; 7
cc: 50 f5 brcc .+84 ; 0x122 <disp_seconds+0x7e>
{
PORTD |= (1 << (6 - ORING[seconds]));
ce: 80 91 af 00 lds r24, 0x00AF
d2: e8 2f mov r30, r24
d4: ff 27 eor r31, r31
d6: e2 59 subi r30, 0x92 ; 146
d8: ff 4f sbci r31, 0xFF ; 255
da: 80 81 ld r24, Z
dc: 46 e0 ldi r20, 0x06 ; 6
de: 50 e0 ldi r21, 0x00 ; 0
e0: 9a 01 movw r18, r20
e2: 28 1b sub r18, r24
e4: 31 09 sbc r19, r1
e6: c9 01 movw r24, r18
e8: 61 e0 ldi r22, 0x01 ; 1
ea: 70 e0 ldi r23, 0x00 ; 0
ec: 9b 01 movw r18, r22
ee: 02 c0 rjmp .+4 ; 0xf4 <disp_seconds+0x50>
f0: 22 0f add r18, r18
f2: 33 1f adc r19, r19
f4: 8a 95 dec r24
f6: e2 f7 brpl .-8 ; 0xf0 <disp_seconds+0x4c>
f8: 82 b3 in r24, 0x12 ; 18
fa: 82 2b or r24, r18
fc: 82 bb out 0x12, r24 ; 18
DDRD |= (1 << (6 - ORING[seconds]));
fe: 80 91 af 00 lds r24, 0x00AF
102: e8 2f mov r30, r24
104: ff 27 eor r31, r31
106: e2 59 subi r30, 0x92 ; 146
108: ff 4f sbci r31, 0xFF ; 255
10a: 80 81 ld r24, Z
10c: 48 1b sub r20, r24
10e: 51 09 sbc r21, r1
110: 02 c0 rjmp .+4 ; 0x116 <disp_seconds+0x72>
112: 66 0f add r22, r22
114: 77 1f adc r23, r23
116: 4a 95 dec r20
118: e2 f7 brpl .-8 ; 0x112 <disp_seconds+0x6e>
11a: 81 b3 in r24, 0x11 ; 17
11c: 86 2b or r24, r22
11e: 81 bb out 0x11, r24 ; 17
120: 29 c0 rjmp .+82 ; 0x174 <disp_seconds+0xd0>
}
else
{
PORTC |= (1 << (12 - ORING[seconds]));
122: 80 91 af 00 lds r24, 0x00AF
126: e8 2f mov r30, r24
128: ff 27 eor r31, r31
12a: e2 59 subi r30, 0x92 ; 146
12c: ff 4f sbci r31, 0xFF ; 255
12e: 80 81 ld r24, Z
130: 4c e0 ldi r20, 0x0C ; 12
132: 50 e0 ldi r21, 0x00 ; 0
134: 9a 01 movw r18, r20
136: 28 1b sub r18, r24
138: 31 09 sbc r19, r1
13a: c9 01 movw r24, r18
13c: 61 e0 ldi r22, 0x01 ; 1
13e: 70 e0 ldi r23, 0x00 ; 0
140: 9b 01 movw r18, r22
142: 02 c0 rjmp .+4 ; 0x148 <disp_seconds+0xa4>
144: 22 0f add r18, r18
146: 33 1f adc r19, r19
148: 8a 95 dec r24
14a: e2 f7 brpl .-8 ; 0x144 <disp_seconds+0xa0>
14c: 85 b3 in r24, 0x15 ; 21
14e: 82 2b or r24, r18
150: 85 bb out 0x15, r24 ; 21
DDRC |= (1 << (12 - ORING[seconds]));
152: 80 91 af 00 lds r24, 0x00AF
156: e8 2f mov r30, r24
158: ff 27 eor r31, r31
15a: e2 59 subi r30, 0x92 ; 146
15c: ff 4f sbci r31, 0xFF ; 255
15e: 80 81 ld r24, Z
160: 48 1b sub r20, r24
162: 51 09 sbc r21, r1
164: 02 c0 rjmp .+4 ; 0x16a <disp_seconds+0xc6>
166: 66 0f add r22, r22
168: 77 1f adc r23, r23
16a: 4a 95 dec r20
16c: e2 f7 brpl .-8 ; 0x166 <disp_seconds+0xc2>
16e: 84 b3 in r24, 0x14 ; 20
170: 86 2b or r24, r22
172: 84 bb out 0x14, r24 ; 20
}
if (ORING[seconds+ 1] <= 6)
174: 80 91 af 00 lds r24, 0x00AF
178: e8 2f mov r30, r24
17a: ff 27 eor r31, r31
17c: e2 59 subi r30, 0x92 ; 146
17e: ff 4f sbci r31, 0xFF ; 255
180: 81 81 ldd r24, Z+1 ; 0x01
182: 87 30 cpi r24, 0x07 ; 7
184: b0 f4 brcc .+44 ; 0x1b2 <disp_seconds+0x10e>
{
DDRD |= (1 << (6 - ORING[seconds+ 1]));
186: 80 91 af 00 lds r24, 0x00AF
18a: e8 2f mov r30, r24
18c: ff 27 eor r31, r31
18e: e2 59 subi r30, 0x92 ; 146
190: ff 4f sbci r31, 0xFF ; 255
192: 21 81 ldd r18, Z+1 ; 0x01
194: 86 e0 ldi r24, 0x06 ; 6
196: 90 e0 ldi r25, 0x00 ; 0
198: 82 1b sub r24, r18
19a: 91 09 sbc r25, r1
19c: 21 e0 ldi r18, 0x01 ; 1
19e: 30 e0 ldi r19, 0x00 ; 0
1a0: 02 c0 rjmp .+4 ; 0x1a6 <disp_seconds+0x102>
1a2: 22 0f add r18, r18
1a4: 33 1f adc r19, r19
1a6: 8a 95 dec r24
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