ht1621b.h

倒车雷达的原理图与源码

/*
***************************************************************************************************
* Copyright (C),2007
* Author        : YanZhongsan
* Email         : [e-mail]
* Date          : 2007-10-17
* File name     : HT1621B.h
* Description   : Define the HT1621B's constant and I/O port
* Version       : V 1.0
* Others        : None
***************************************************************************************************
*/
#ifndef HT1621B_H
#define HT1621B_H

/****Function prototype description****/
void Init_HT1621B(void);
void HT1621BClearAll(void);
UCHAR_8 HT1621BReaddata(UCHAR_8 addr);
void HT1621BSendCommand(UCHAR_8 subcommand);
void HT1621BWritedata(UCHAR_8 addr,const UCHAR_8 data);

/****Define the communication port****/

// Define HT1621B's chip select pin
// When the CS is logic high, The data and command read from or write to the TH1621B
// are disable.The serial interface circuit is also reset,If the CS is logic low,The
// data and command transmission between the host controller and HT1621B are all enable
#define HT_CS_PORT              PORTC
#define HT_CS_DDR               DDRC
#define HT_CS_PIN               PINC
#define HT_CS                   (1<<PC5)
#define SET_HT_CS_HIGH          HT_CS_PORT |= HT_CS
#define SET_HT_CS_LOW           HT_CS_PORT &= (~HT_CS)

// Define HT1621B's RD line
// Data in HT1621B's RAM are clocked out on the falling edge of the RD signal
// The clocked out data will appear on the data line,The host controller can use the next
// rising edge to latch the clocked out data
#define HT_RD_PORT              PORTD
#define HT_RD_DDR               DDRD
#define HT_RD_PIN               PIND
#define HT_RD                   (1<<PD2)
#define SET_HT_RD_HIGH          HT_RD_PORT |= HT_RD
#define SET_HT_RD_LOW           HT_RD_PORT &= (~(HT_RD))

// Define HT1621B's WR line
// Data on the data line are latched into HT1621B on the rising edge of WR signal
#define HT_WR_PORT              PORTC
#define HT_WR_DDR               DDRC
#define HT_WR_PIN               PINC
#define HT_WR                   (1<<PC4)
#define SET_HT_WR_HIGH          HT_WR_PORT |= HT_WR
#define SET_HT_WR_LOW           HT_WR_PORT &= (~HT_WR)

// Define HT1621B's data line
// Serial data input and output line
#define HT_DATA_PORT            PORTC
#define HT_DATA_DDR             DDRC
#define HT_DATA_PIN             PINC
#define HT_DATA                 (1<<PC3)
#define SET_HT_DATA_HIGH        HT_DATA_PORT |= HT_DATA
#define SET_HT_DATA_LOW         HT_DATA_PORT &= (~HT_DATA)

#define SET_HT_DATA_OUT         HT_DATA_DDR |= HT_DATA
#define SET_HT_DATA_IN          HT_DATA_DDR &= (~(HT_DATA))

#define HT_DATA_IS_HIGH         (0x00!=(HT_DATA_PIN & HT_DATA))
#define HT_DATA_IS_LOW          (0x00==(HT_DATA_PIN & HT_DATA))


/****Define the command****/
// After send the command to HT1621B,Should send the data
// Bit9-bit4 are used for the address,bit3-bit0 are used for data
// Bit12-bit10 are used for the command
#define HT_READ_COMMAND         0x0180U

// After send the command to HT1621B,Should send the data
// Bit9-bit4 are used for the address,bit3-bit0 are used for data
// Bit12-bit10 are used for the command
#define HT_WRITE_COMMAND        0x0140U

// Read data from HT1621B then modify it and rewrite it to HT1621B
// Bit9-bit4 are used for the address,bit3-bit0 are used for data
// Bit12-bit10 are used for the command
// This command can continus modify the data
// After send the command to HT1621B,Should send the data
#define HT_READ_MODIFY_WRITE    0x0140U


////////////////////////////////////////////////////////////////////////////////////////////////

// Send the command to the HT1621B,bit11-bit9 are the command head,bit8-bit0 are the subcommand
// Should send the subcommand
#define HT_COMMAND_COMMAND      0x0800U

// The follow command should send to HT1621B after send the command COMMAND_COMMAND
// So,All of them are nemed SUB_

// Turn off both system oscillator and LCD bias generator,Power on reset default
#define HT_SUB_SYS_DISABLE      0x0000U

// Turn on system oscillator
#define HT_SUB_SYS_ENABLE       0x0001U

// Turn off LCD bias generator,Power on reset default
#define HT_SUB_LCD_OFF          0x0002U

// Turn on LCD bias generator
#define HT_SUB_LCD_ON           0x0003U

// Disable timer base output
#define HT_SUB_TIMER_DISABLE    0x0004U

// Disable watchdog time-out flag output
#define HT_SUB_WDT_DISABLE      0x0005U

// Enable timer base output
#define HT_SUB_TIMER_ENABLE     0x0006U

// Enable watchdog time-out flag output
#define HT_SUB_WDT_ENABLE       0x0007U

// Turn off tone output,Power on reset default
#define HT_SUB_TONE_OFF         0x0008U

// Turn on tone ouput
#define HT_SUB_TONE_ON          0x0009U

// Clear the constents of time base generator
#define HT_SUB_CLEAR_TIMER      0x000CU

// Clear the constents of watchdog stage
#define HT_SUB_CLEAR_WDT        0x000EU

// Select the crystal oscillator as HT1621B's clock source
#define HT_SUB_XTAL_32K         0x0014U

// Select the on-chip RC oscillator as HT1621B's clock source,Power on reset default
#define HT_SUB_RC_256K          0x0018U

// Select the external clock source as HT1621B's clock source
#define HT_SUB_EXT_256K         0x001CU

// Select LCD 1/2 bias option
// Select 2 commons option
#define HT_SUB_BIAS12_2         0x0020U

// Select 3 commons option
#define HT_SUB_BIAS12_3         0x0024U

// Select 4 commons option
#define HT_SUB_BIAS12_4         0x0028U

// Select LCD 1/3 bias option
// Select 2 commons option
#define HT_SUB_BIAS13_2         0x0021U

// Select 3 commons option
#define HT_SUB_BIAS13_3         0x0025U

// Select 4 commons option
#define HT_SUB_BIAS13_4         0x0029U

// Select 4KHz for tone frequency
#define HT_SUB_TONE_4K          0x0040U

// Select 2KHz for tone frequency
#define HT_SUB_TONE_2K          0x0060U

// Disable IRQ output,Power on reset default
#define HT_SUB_IRQ_DISABLE      0x0080U

// Enable IRQ output
#define HT_SUB_IRQ_ENABLE       0x0088U

// Select 1Hz for time base and WDT clock output frequency
// The WDT time-out flag after: 4s
#define HT_SUB_F1               0x00A0U

// Select 2Hz for time base and WDT clock output frequency
// The WDT time-out flag after: 2s
#define HT_SUB_F2               0x00A1U

// Select 4Hz for time base and WDT clock output frequency
// The WDT time-out flag after: 1s
#define HT_SUB_F4               0x00A2U

// Select 8Hz for time base and WDT clock output frequency
// The WDT time-out flag after: 1/2s
#define HT_SUB_F8               0x00A3U

// Select 16Hz for time base and WDT clock output frequency
// The WDT time-out flag after: 1/4s
#define HT_SUB_F16              0x00A4U

// Select 32Hz for time base and WDT clock output frequency
// The WDT time-out flag after: 1/8s
#define HT_SUB_F32              0x00A5U

// Select 64Hz for time base and WDT clock output frequency
// The WDT time-out flag after: 1/16s
#define HT_SUB_F64              0x00A6U

// Select 128Hz for time base and WDT clock output frequency
// The WDT time-out flag after: 1/32s
// Power on reset default
#define HT_SUB_F128             0x00A7U

// Set HT1621B in normal model,Power on reset default
#define HT_SUB_NORMAL           0x00E3U

#endif