controller.map.summary

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Analysis & Synthesis Status : Successful - Thu Nov 06 10:37:32 2008
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Full Version
Revision Name : CONTROLLER
Top-level Entity Name : CONTROLLER
Family : Stratix II
Logic utilization : N/A
    Combinational ALUTs : 15
    Dedicated logic registers : 15
Total registers : 15
Total pins : 7
Total virtual pins : 0
Total block memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0