📄 isd51.lst
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A51 MACRO ASSEMBLER ISD51 11/27/2009 21:11:38 PAGE 5
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265
266
267 ;------------------------------------------------------------------------------
268 ;----------------- !!! Do not modify code sections below !!! ------------------
269 ;------------------------------------------------------------------------------
270
271 NAME ISD51_CONFIGURATION
272
273
274 SBYTE MACRO ; Transmit Byte in ACC via serial UART
275 JNB_TI $
276 CLR_TI
277 WR_SBUF ; MOV SBUF,A
278 ENDM
279
280 RBYTE MACRO ; Read one Byte from serial UART to ACC
281 RD_SBUF ; MOV A,SBUF
282 CLR_RI
283 ENDM
284
285 GBYTE MACRO ; Receive one Character from 8051 Serial Interface
286 JNB_RI $
287 RBYTE
288 ENDM
289
290
291
0080 292 sfr P0 = 0x80;
0090 293 sfr P1 = 0x90;
00A0 294 sfr P2 = 0xA0;
00B0 295 sfr P3 = 0xB0;
00D0 296 sfr PSW = 0xD0;
00E0 297 sfr ACC = 0xE0;
00F0 298 sfr B = 0xF0;
0081 299 sfr SP = 0x81;
0082 300 sfr DPL = 0x82;
0083 301 sfr DPH = 0x83;
008E 302 sfr AUXR = 0x8E;
00E4 303 sfr PH_FMCON = 0xE4; // for Philips LPC900 devices
00E6 304 sfr PH_FMADRL = 0xE6; // for Philips LPC900 devices
305
306
00FF 307 ?ISD?RAMTOP EQU 0x100-1
0000 308 ?ISD?CMP_S EQU 0x0
FFFF 309 ?ISD?CMP_E EQU 0xFFFF
310
311 EXTRN NUMBER (?ISD?CORE)
312
313 PUBLIC ?ISD?RAMTOP
314 PUBLIC ?ISD?RESTART
315 PUBLIC ?ISD?CMDLOOP
316 PUBLIC ?ISD?GETBYTE
317 PUBLIC ?ISD?SENDBYTE
318 PUBLIC ?ISD?READSFR00
319 PUBLIC ?ISD?READSFR01
320 PUBLIC ?ISD?READSFR02
321 PUBLIC ?ISD?READSFR03
322 PUBLIC ?ISD?READSFR04
A51 MACRO ASSEMBLER ISD51 11/27/2009 21:11:38 PAGE 6
323 PUBLIC ?ISD?READSFR05
324 PUBLIC ?ISD?READSFR06
325 PUBLIC ?ISD?READSFR07
326 PUBLIC ?ISD?READSFR08
327 PUBLIC ?ISD?READSFR09
328 PUBLIC ?ISD?READSFR10
329 PUBLIC ?ISD?READSFR11
330 PUBLIC ?ISD?READSFR12
331 PUBLIC ?ISD?READSFR13
332 PUBLIC ?ISD?READSFR14
333 PUBLIC ?ISD?READSFR15
334 PUBLIC ?ISD?READSFR16
335 PUBLIC ?ISD?READSFR17
336 PUBLIC ?ISD?READSFR18
337 PUBLIC ?ISD?WRITESFR00
338 PUBLIC ?ISD?WRITESFR01
339 PUBLIC ?ISD?WRITESFR02
340 PUBLIC ?ISD?WRITESFR03
341
345 PUBLIC ?ISD?VERSION
346 PUBLIC ?ISD?CMP_S
347 PUBLIC ?ISD?CMP_E
348 PUBLIC __isd_init
349
350
351 PUBLIC ?ISD?CBLK_SIZE ; block size for FLASH IAP Routine
352
0000 353 ?ISD?CBLK_SIZE EQU 0
0010 354 CBLK EQU 10H ; Start address for FLASH buffer
355
00CD 356 ?ISD?VERSION EQU 205 ; Version 2.05
357
363
364
365 ?PR?ISD51 SEGMENT CODE INBLOCK
366
---- 367 CSEG AT SINTRVEC ; Serial Interrupt
0023 020000 F 368 LJMP SerialInterrupt
369
370
371
A51 MACRO ASSEMBLER ISD51 11/27/2009 21:11:38 PAGE 7
447
448
---- 449 RSEG ?PR?ISD51
450 USING 0 ; Assume Registerbank 0 for ARx symbols
451
452
A51 MACRO ASSEMBLER ISD51 11/27/2009 21:11:38 PAGE 8
459
0000 460 SerialInterrupt:
0000 C0D0 461 PUSH PSW
0002 C0E0 462 PUSH ACC
463 JNB_RI NoSerBreak
465 RBYTE ; Check for 0A5H Break Code
466+1 RD_SBUF ; MOV A,SBUF
468+1 CLR_RI
470
000B F500 F 471 MOV _ISD_CHAR,A
472
000D B4A55E 473 CJNE A,#0A5H,ReturnI
474
475 SET_TI
0012 75D000 477 MOV PSW,#0 ; Select Register Bank 0
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