vectors.asm

该代码为TI公司TMS320C54X系列DSP的中断向量文件

;
;  Copyright 2003 by Texas Instruments Incorporated.
;  All rights reserved. Property of Texas Instruments Incorporated.
;  Restricted rights to use, duplicate or disclose this code are
;  granted through contract.
;  
;
; "@(#) DSP/BIOS 4.90.270 01-13-05 (barracuda-o07)"
;
;  ======== vectors.asm ========
;  Plug in the entry point at RESET in the interrupt vector table
;
;
;  ======== unused ========
;  plug inifinite loop -- with nested branches to
;  disable interrupts -- for all undefined vectors
;

        .sect ".vectors"

        .ref _c_int00           ; C entry point

        .align  0x80            ; must be aligned on page boundary

RESET:                          ; reset vector
        BD _c_int00                             ; branch to C entry point
        STM #200,SP                             ; stack size of 200
nmi:    RETE                    ; enable interrupts and return from one
                NOP
                NOP
                NOP                                     ;NMI~

                ; software interrupts
sint17 .space 4*16
sint18 .space 4*16
sint19 .space 4*16
sint20 .space 4*16
sint21 .space 4*16
sint22 .space 4*16
sint23 .space 4*16
sint24 .space 4*16
sint25 .space 4*16
sint26 .space 4*16
sint27 .space 4*16
sint28 .space 4*16
sint29 .space 4*16
sint30 .space 4*16

int0:   RETE
                NOP
                NOP
                NOP
int1:   RETE
                NOP 
                NOP
                NOP
int2:   RETE
                NOP
                NOP
                NOP
tint0:   RETE
                NOP
                NOP
                NOP
brint0:  RETE
                NOP
                NOP
                NOP
bxint0:  RETE
                NOP
                NOP
                NOP
dmac0:  RETE
                NOP
                NOP
                NOP
tint1:  RETE
                NOP
                NOP
                NOP
int3:   RETE
                NOP
                NOP
                NOP
hpint:   RETE
                NOP
                NOP
                NOP
brint1:   RETE
                NOP 
                NOP
                NOP
bxint1:   RETE
                NOP
                NOP
                NOP
dmac4:   RETE
                NOP
                NOP
                NOP
dmac5:  RETE
                NOP
                NOP
                NOP

                .end
                
                
     	.ref  _timer0,_codec_ch0_in 
		.ref  _c_int00
    		
		.sect ".vectors"
		
rs: BD _c_int00			;reset, SINTR
	NOP
	NOP
nmi: rete 			;NMI, SINT16
	NOP
	NOP
	NOP
sint17: BD _c_int00 		;SINT17
	NOP
	NOP
sint18: BD _c_int00 		;SINT18
	NOP
	NOP
sint19: BD _c_int00 		;SINT19
	NOP
	NOP
sint20: BD _c_int00 		;SINT20
	NOP
	NOP
sint21: BD _c_int00 		;SINT21
	NOP
	NOP
sint22: BD _c_int00 		;SINT22
	NOP
	NOP
sint23: BD sint23 		;SINT23
	NOP
	NOP
sint24: BD sint24 		;SINT24
	NOP
	NOP
sint25: BD sint25 		;SINT25
	NOP
	NOP
sint26: BD sint26 		;SINT26
	NOP
	NOP
sint27: BD sint27 		;SINT27
	NOP
	NOP
sint28: BD sint28 		;SINT28
	NOP
	NOP
sint29: BD sint29 		;SINT29
	NOP
	NOP
sint30: BD sint30 		;SINT30
	NOP
	NOP
int0: BD int0 			;INT0, SINT0
	NOP
	NOP
int1: BD int1 			;INT1, SINT1
	NOP
	NOP
int2: BD int2 			;INT2, SINT2
	NOP
	NOP
tint0: BD _timer0 		;TINT0, SINT3
	NOP
	NOP
brint0: BD _codec_ch0_in  	;BRINT0, SINT4
	NOP
	NOP
bxint0: BD bxint0 		;BXINT0, SINT5
	NOP
	NOP
dmac0: BD dmac0 		;DMAC0, brint2, SINT6
	NOP
	NOP
dmac1: BD _c_int00 		;DMAC1, bxint2, SINT7 ??
	NOP
	NOP
int3: BD int3 			;INT3, SINT8
	NOP
	NOP
hpint: BD _c_int00 		;HPINT, SINT9
	NOP
	NOP
brint1: BD brint1 		;BRINT1 or DMAC2, SINT10
	NOP
	NOP
;bxint1: BD mcbsp1 		;BXINT1 or DMAC3, SINT11
bxint1: BD _c_int00 		;BXINT1 or DMAC3, SINT11
	NOP
	NOP
dmac4: BD dmac4 		;DMAC4, SINT12
	NOP
	NOP
dmac5: BD dmac5 		;DMAC5, SINT13
	NOP
	NOP
rsvd1: BD rsvd1 		;reserved
	NOP
	NOP
rsvd2: BD rsvd2 		;reserved
	NOP
	NOP


	.end