📄 xc5000.c
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/* * Driver for Xceive XC5000 "QAM/8VSB single chip tuner" * * Copyright (c) 2007 Xceive Corporation * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */#include <linux/module.h>#include <linux/moduleparam.h>#include <linux/videodev2.h>#include <linux/delay.h>#include <linux/dvb/frontend.h>#include <linux/i2c.h>#include "dvb_frontend.h"#include "xc5000.h"#include "tuner-i2c.h"static int debug;module_param(debug, int, 0644);MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");static int xc5000_load_fw_on_attach;module_param_named(init_fw, xc5000_load_fw_on_attach, int, 0644);MODULE_PARM_DESC(init_fw, "Load firmware during driver initialization.");static DEFINE_MUTEX(xc5000_list_mutex);static LIST_HEAD(hybrid_tuner_instance_list);#define dprintk(level, fmt, arg...) if (debug >= level) \ printk(KERN_INFO "%s: " fmt, "xc5000", ## arg)#define XC5000_DEFAULT_FIRMWARE "dvb-fe-xc5000-1.1.fw"#define XC5000_DEFAULT_FIRMWARE_SIZE 12332struct xc5000_priv { struct tuner_i2c_props i2c_props; struct list_head hybrid_tuner_instance_list; u32 if_khz; u32 freq_hz; u32 bandwidth; u8 video_standard; u8 rf_mode;};/* Misc Defines */#define MAX_TV_STANDARD 23#define XC_MAX_I2C_WRITE_LENGTH 64/* Signal Types */#define XC_RF_MODE_AIR 0#define XC_RF_MODE_CABLE 1/* Result codes */#define XC_RESULT_SUCCESS 0#define XC_RESULT_RESET_FAILURE 1#define XC_RESULT_I2C_WRITE_FAILURE 2#define XC_RESULT_I2C_READ_FAILURE 3#define XC_RESULT_OUT_OF_RANGE 5/* Product id */#define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000#define XC_PRODUCT_ID_FW_LOADED 0x1388/* Registers */#define XREG_INIT 0x00#define XREG_VIDEO_MODE 0x01#define XREG_AUDIO_MODE 0x02#define XREG_RF_FREQ 0x03#define XREG_D_CODE 0x04#define XREG_IF_OUT 0x05#define XREG_SEEK_MODE 0x07#define XREG_POWER_DOWN 0x0A#define XREG_SIGNALSOURCE 0x0D /* 0=Air, 1=Cable */#define XREG_SMOOTHEDCVBS 0x0E#define XREG_XTALFREQ 0x0F#define XREG_FINERFFREQ 0x10#define XREG_DDIMODE 0x11#define XREG_ADC_ENV 0x00#define XREG_QUALITY 0x01#define XREG_FRAME_LINES 0x02#define XREG_HSYNC_FREQ 0x03#define XREG_LOCK 0x04#define XREG_FREQ_ERROR 0x05#define XREG_SNR 0x06#define XREG_VERSION 0x07#define XREG_PRODUCT_ID 0x08#define XREG_BUSY 0x09/* Basic firmware description. This will remain with the driver for documentation purposes. This represents an I2C firmware file encoded as a string of unsigned char. Format is as follows: char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB char[1 ]=len0_LSB -> length of first write transaction char[2 ]=data0 -> first byte to be sent char[3 ]=data1 char[4 ]=data2 char[ ]=... char[M ]=dataN -> last byte to be sent char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB char[M+2]=len1_LSB -> length of second write transaction char[M+3]=data0 char[M+4]=data1 ... etc. The [len] value should be interpreted as follows: len= len_MSB _ len_LSB len=1111_1111_1111_1111 : End of I2C_SEQUENCE len=0000_0000_0000_0000 : Reset command: Do hardware reset len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767) len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms For the RESET and WAIT commands, the two following bytes will contain immediately the length of the following transaction.*/struct XC_TV_STANDARD { char *Name; u16 AudioMode; u16 VideoMode;};/* Tuner standards */#define MN_NTSC_PAL_BTSC 0#define MN_NTSC_PAL_A2 1#define MN_NTSC_PAL_EIAJ 2#define MN_NTSC_PAL_Mono 3#define BG_PAL_A2 4#define BG_PAL_NICAM 5#define BG_PAL_MONO 6#define I_PAL_NICAM 7#define I_PAL_NICAM_MONO 8#define DK_PAL_A2 9#define DK_PAL_NICAM 10#define DK_PAL_MONO 11#define DK_SECAM_A2DK1 12#define DK_SECAM_A2LDK3 13#define DK_SECAM_A2MONO 14#define L_SECAM_NICAM 15#define LC_SECAM_NICAM 16#define DTV6 17#define DTV8 18#define DTV7_8 19#define DTV7 20#define FM_Radio_INPUT2 21#define FM_Radio_INPUT1 22static struct XC_TV_STANDARD XC5000_Standard[MAX_TV_STANDARD] = { {"M/N-NTSC/PAL-BTSC", 0x0400, 0x8020}, {"M/N-NTSC/PAL-A2", 0x0600, 0x8020}, {"M/N-NTSC/PAL-EIAJ", 0x0440, 0x8020}, {"M/N-NTSC/PAL-Mono", 0x0478, 0x8020}, {"B/G-PAL-A2", 0x0A00, 0x8049}, {"B/G-PAL-NICAM", 0x0C04, 0x8049}, {"B/G-PAL-MONO", 0x0878, 0x8059}, {"I-PAL-NICAM", 0x1080, 0x8009}, {"I-PAL-NICAM-MONO", 0x0E78, 0x8009}, {"D/K-PAL-A2", 0x1600, 0x8009}, {"D/K-PAL-NICAM", 0x0E80, 0x8009}, {"D/K-PAL-MONO", 0x1478, 0x8009}, {"D/K-SECAM-A2 DK1", 0x1200, 0x8009}, {"D/K-SECAM-A2 L/DK3", 0x0E00, 0x8009}, {"D/K-SECAM-A2 MONO", 0x1478, 0x8009}, {"L-SECAM-NICAM", 0x8E82, 0x0009}, {"L'-SECAM-NICAM", 0x8E82, 0x4009}, {"DTV6", 0x00C0, 0x8002}, {"DTV8", 0x00C0, 0x800B}, {"DTV7/8", 0x00C0, 0x801B}, {"DTV7", 0x00C0, 0x8007}, {"FM Radio-INPUT2", 0x9802, 0x9002}, {"FM Radio-INPUT1", 0x0208, 0x9002}};static int xc5000_is_firmware_loaded(struct dvb_frontend *fe);static int xc5000_writeregs(struct xc5000_priv *priv, u8 *buf, u8 len);static int xc5000_readregs(struct xc5000_priv *priv, u8 *buf, u8 len);static void xc5000_TunerReset(struct dvb_frontend *fe);static int xc_send_i2c_data(struct xc5000_priv *priv, u8 *buf, int len){ return xc5000_writeregs(priv, buf, len) ? XC_RESULT_I2C_WRITE_FAILURE : XC_RESULT_SUCCESS;}static int xc_read_i2c_data(struct xc5000_priv *priv, u8 *buf, int len){ return xc5000_readregs(priv, buf, len) ? XC_RESULT_I2C_READ_FAILURE : XC_RESULT_SUCCESS;}static int xc_reset(struct dvb_frontend *fe){ xc5000_TunerReset(fe); return XC_RESULT_SUCCESS;}static void xc_wait(int wait_ms){ msleep(wait_ms);}static void xc5000_TunerReset(struct dvb_frontend *fe){ struct xc5000_priv *priv = fe->tuner_priv; int ret; dprintk(1, "%s()\n", __func__); if (fe->callback) { ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ? fe->dvb->priv : priv->i2c_props.adap->algo_data, DVB_FRONTEND_COMPONENT_TUNER, XC5000_TUNER_RESET, 0); if (ret) printk(KERN_ERR "xc5000: reset failed\n"); } else printk(KERN_ERR "xc5000: no tuner reset callback function, fatal\n");}static int xc_write_reg(struct xc5000_priv *priv, u16 regAddr, u16 i2cData){ u8 buf[4]; int WatchDogTimer = 5; int result; buf[0] = (regAddr >> 8) & 0xFF; buf[1] = regAddr & 0xFF; buf[2] = (i2cData >> 8) & 0xFF; buf[3] = i2cData & 0xFF; result = xc_send_i2c_data(priv, buf, 4); if (result == XC_RESULT_SUCCESS) { /* wait for busy flag to clear */ while ((WatchDogTimer > 0) && (result == XC_RESULT_SUCCESS)) { buf[0] = 0; buf[1] = XREG_BUSY; result = xc_send_i2c_data(priv, buf, 2); if (result == XC_RESULT_SUCCESS) { result = xc_read_i2c_data(priv, buf, 2); if (result == XC_RESULT_SUCCESS) { if ((buf[0] == 0) && (buf[1] == 0)) { /* busy flag cleared */ break; } else { xc_wait(100); /* wait 5 ms */ WatchDogTimer--; } } } } } if (WatchDogTimer < 0) result = XC_RESULT_I2C_WRITE_FAILURE; return result;}static int xc_read_reg(struct xc5000_priv *priv, u16 regAddr, u16 *i2cData){ u8 buf[2]; int result; buf[0] = (regAddr >> 8) & 0xFF; buf[1] = regAddr & 0xFF; result = xc_send_i2c_data(priv, buf, 2); if (result != XC_RESULT_SUCCESS) return result; result = xc_read_i2c_data(priv, buf, 2); if (result != XC_RESULT_SUCCESS) return result; *i2cData = buf[0] * 256 + buf[1]; return result;}static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence){ struct xc5000_priv *priv = fe->tuner_priv; int i, nbytes_to_send, result; unsigned int len, pos, index; u8 buf[XC_MAX_I2C_WRITE_LENGTH]; index = 0; while ((i2c_sequence[index] != 0xFF) || (i2c_sequence[index + 1] != 0xFF)) { len = i2c_sequence[index] * 256 + i2c_sequence[index+1]; if (len == 0x0000) { /* RESET command */ result = xc_reset(fe); index += 2; if (result != XC_RESULT_SUCCESS) return result; } else if (len & 0x8000) { /* WAIT command */ xc_wait(len & 0x7FFF); index += 2; } else { /* Send i2c data whilst ensuring individual transactions * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes. */ index += 2; buf[0] = i2c_sequence[index]; buf[1] = i2c_sequence[index + 1]; pos = 2; while (pos < len) { if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2) nbytes_to_send = XC_MAX_I2C_WRITE_LENGTH; else nbytes_to_send = (len - pos + 2); for (i = 2; i < nbytes_to_send; i++) { buf[i] = i2c_sequence[index + pos + i - 2]; } result = xc_send_i2c_data(priv, buf, nbytes_to_send); if (result != XC_RESULT_SUCCESS) return result; pos += nbytes_to_send - 2; } index += len; } } return XC_RESULT_SUCCESS;}static int xc_initialize(struct xc5000_priv *priv){ dprintk(1, "%s()\n", __func__); return xc_write_reg(priv, XREG_INIT, 0);}static int xc_SetTVStandard(struct xc5000_priv *priv, u16 VideoMode, u16 AudioMode){ int ret; dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, VideoMode, AudioMode); dprintk(1, "%s() Standard = %s\n", __func__, XC5000_Standard[priv->video_standard].Name); ret = xc_write_reg(priv, XREG_VIDEO_MODE, VideoMode); if (ret == XC_RESULT_SUCCESS) ret = xc_write_reg(priv, XREG_AUDIO_MODE, AudioMode); return ret;}static int xc_shutdown(struct xc5000_priv *priv){ return XC_RESULT_SUCCESS; /* Fixme: cannot bring tuner back alive once shutdown * without reloading the driver modules. * return xc_write_reg(priv, XREG_POWER_DOWN, 0); */}static int xc_SetSignalSource(struct xc5000_priv *priv, u16 rf_mode){ dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode, rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE"); if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) { rf_mode = XC_RF_MODE_CABLE; printk(KERN_ERR "%s(), Invalid mode, defaulting to CABLE", __func__); } return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode);}static const struct dvb_tuner_ops xc5000_tuner_ops;static int xc_set_RF_frequency(struct xc5000_priv *priv, u32 freq_hz){ u16 freq_code; dprintk(1, "%s(%u)\n", __func__, freq_hz); if ((freq_hz > xc5000_tuner_ops.info.frequency_max) || (freq_hz < xc5000_tuner_ops.info.frequency_min)) return XC_RESULT_OUT_OF_RANGE; freq_code = (u16)(freq_hz / 15625); return xc_write_reg(priv, XREG_RF_FREQ, freq_code);}#if 0/* We'll probably need these for analog support */static int xc_FineTune_RF_frequency(struct xc5000_priv *priv, u32 freq_hz){ u16 freq_code = (u16)(freq_hz / 15625); if ((freq_hz > xc5000_tuner_ops.info.frequency_max) || (freq_hz < xc5000_tuner_ops.info.frequency_min)) return XC_RESULT_OUT_OF_RANGE; return xc_write_reg(priv, XREG_FINERFFREQ, freq_code);}static int xc_set_Xtal_frequency(struct xc5000_priv *priv, u32 xtalFreqInKHz){ u16 xtalRatio = (32000 * 0x8000)/xtalFreqInKHz; return xc_write_reg(priv, XREG_XTALFREQ, xtalRatio);}#endifstatic int xc_set_IF_frequency(struct xc5000_priv *priv, u32 freq_khz){ u32 freq_code = (freq_khz * 1024)/1000; dprintk(1, "%s(freq_khz = %d) freq_code = 0x%x\n", __func__, freq_khz, freq_code); return xc_write_reg(priv, XREG_IF_OUT, freq_code);}static int xc_get_ADC_Envelope(struct xc5000_priv *priv, u16 *adc_envelope){ return xc_read_reg(priv, XREG_ADC_ENV, adc_envelope);}static int xc_get_frequency_error(struct xc5000_priv *priv, u32 *freq_error_hz){ int result; u16 regData; u32 tmp; result = xc_read_reg(priv, XREG_FREQ_ERROR, ®Data); if (result) return result; tmp = (u32)regData; (*freq_error_hz) = (tmp * 15625) / 1000; return result;}static int xc_get_lock_status(struct xc5000_priv *priv, u16 *lock_status){ return xc_read_reg(priv, XREG_LOCK, lock_status);}static int xc_get_version(struct xc5000_priv *priv, u8 *hw_majorversion, u8 *hw_minorversion, u8 *fw_majorversion, u8 *fw_minorversion){ u16 data; int result; result = xc_read_reg(priv, XREG_VERSION, &data); if (result) return result; (*hw_majorversion) = (data >> 12) & 0x0F; (*hw_minorversion) = (data >> 8) & 0x0F; (*fw_majorversion) = (data >> 4) & 0x0F; (*fw_minorversion) = data & 0x0F; return 0;}static int xc_get_hsync_freq(struct xc5000_priv *priv, u32 *hsync_freq_hz){ u16 regData; int result; result = xc_read_reg(priv, XREG_HSYNC_FREQ, ®Data); if (result) return result; (*hsync_freq_hz) = ((regData & 0x0fff) * 763)/100; return result;}static int xc_get_frame_lines(struct xc5000_priv *priv, u16 *frame_lines){ return xc_read_reg(priv, XREG_FRAME_LINES, frame_lines);}static int xc_get_quality(struct xc5000_priv *priv, u16 *quality){ return xc_read_reg(priv, XREG_QUALITY, quality);}static u16 WaitForLock(struct xc5000_priv *priv){ u16 lockState = 0; int watchDogCount = 40; while ((lockState == 0) && (watchDogCount > 0)) { xc_get_lock_status(priv, &lockState); if (lockState != 1) { xc_wait(5); watchDogCount--; } } return lockState;
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