si21xx.c

trident tm5600的linux驱动

		volt == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??");


	val = (0x80 | si21_readreg(state, LNB_CTRL_REG_1));

	switch (volt) {
	case SEC_VOLTAGE_18:
		return si21_writereg(state, LNB_CTRL_REG_1, val | 0x40);
		break;
	case SEC_VOLTAGE_13:
		return si21_writereg(state, LNB_CTRL_REG_1, (val & ~0x40));
		break;
	default:
		return -EINVAL;
	};
}

static int si21xx_init(struct dvb_frontend *fe)
{
	struct si21xx_state *state = fe->demodulator_priv;
	int i;
	int status = 0;
	u8 reg1;
	u8 val;
	u8 reg2[2];

	dprintk("%s\n", __func__);

	for (i = 0; ; i += 2) {
		reg1 = serit_sp1511lhb_inittab[i];
		val = serit_sp1511lhb_inittab[i+1];
		if (reg1 == 0xff && val == 0xff)
			break;
		si21_writeregs(state, reg1, &val, 1);
	}

	/*DVB QPSK SYSTEM MODE REG*/
	reg1 = 0x08;
	si21_writeregs(state, SYSTEM_MODE_REG, &reg1, 0x01);

	/*transport stream config*/
	/*
	mode = PARALLEL;
	sdata_form = LSB_FIRST;
	clk_edge = FALLING_EDGE;
	clk_mode = CLK_GAPPED_MODE;
	strt_len = BYTE_WIDE;
	sync_pol = ACTIVE_HIGH;
	val_pol = ACTIVE_HIGH;
	err_pol = ACTIVE_HIGH;
	sclk_rate = 0x00;
	parity = 0x00 ;
	data_delay = 0x00;
	clk_delay = 0x00;
	pclk_smooth = 0x00;
	*/
	reg2[0] =
		PARALLEL + (LSB_FIRST << 1)
		+ (FALLING_EDGE << 2) + (CLK_GAPPED_MODE << 3)
		+ (BYTE_WIDE << 4) + (ACTIVE_HIGH << 5)
		+ (ACTIVE_HIGH << 6) + (ACTIVE_HIGH << 7);

	reg2[1] = 0;
	/*	sclk_rate + (parity << 2)
		+ (data_delay << 3) + (clk_delay << 4)
		+ (pclk_smooth << 5);
	*/
	status |= si21_writeregs(state, TS_CTRL_REG_1, reg2, 0x02);
	if (status != 0)
		dprintk(" %s : TS Set Error\n", __func__);

#if 0
	lnb_cmd.tone = ON; /* 22khz continuous */
	lnb_cmd.mmsg = OFF; /* diseqc more message */
	/* diseqc  command */
	lnb_cmd.msg[6] = { "0xE0", "0x10", "0x38", "0xF0" };
	lnb_cmd.msg_len = OFF; /* diseqc command length */
	lnb_cmd.burst = OFF; /* tone burst a,b */
	lnb_cmd.volt = OFF; /* 13v 18v select */

	status |= si21xx_set_lnb_msg(state, lnb_cmd);
	if (status != PASS)
		dprintk("%s LNB Set Error\n", __func__);
#endif
	return 0;

}

static int si21_read_status(struct dvb_frontend *fe, fe_status_t *status)
{
	struct si21xx_state *state = fe->demodulator_priv;
	u8 regs_read[2];
	u8 reg_read;
	u8 i;
	u8 lock;
	u8 signal = si21_readreg(state, ANALOG_AGC_POWER_LEVEL_REG);

	si21_readregs(state, LOCK_STATUS_REG_1, regs_read, 0x02);
	reg_read = 0;

	for (i = 0; i < 7; ++i)
		reg_read |= ((regs_read[0] >> i) & 0x01) << (6 - i);

	lock = ((reg_read & 0x7f) | (regs_read[1] & 0x80));

	dprintk("%s : FE_READ_STATUS : VSTATUS: 0x%02x\n", __func__, lock);
	*status = 0;

	if (signal > 10)
		*status |= FE_HAS_SIGNAL;

	if (lock & 0x2)
		*status |= FE_HAS_CARRIER;

	if (lock & 0x20)
		*status |= FE_HAS_VITERBI;

	if (lock & 0x40)
		*status |= FE_HAS_SYNC;

	if ((lock & 0x7b) == 0x7b)
		*status |= FE_HAS_LOCK;

	return 0;
}

static int si21_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
{
	struct si21xx_state *state = fe->demodulator_priv;

	/*status = si21_readreg(state, ANALOG_AGC_POWER_LEVEL_REG,
						(u8*)agclevel, 0x01);*/

	u16 signal = (3 * si21_readreg(state, 0x27) *
					si21_readreg(state, 0x28));

	dprintk("%s : AGCPWR: 0x%02x%02x, signal=0x%04x\n", __func__,
		si21_readreg(state, 0x27),
		si21_readreg(state, 0x28), (int) signal);

	signal  <<= 4;
	*strength = signal;

	return 0;
}

static int si21_read_ber(struct dvb_frontend *fe, u32 *ber)
{
	struct si21xx_state *state = fe->demodulator_priv;

	dprintk("%s\n", __func__);

	if (state->errmode != STATUS_BER)
		return 0;

	*ber = (si21_readreg(state, 0x1d) << 8) |
				si21_readreg(state, 0x1e);

	return 0;
}

static int si21_read_snr(struct dvb_frontend *fe, u16 *snr)
{
	struct si21xx_state *state = fe->demodulator_priv;

	s32 xsnr = 0xffff - ((si21_readreg(state, 0x24) << 8) |
					si21_readreg(state, 0x25));
	xsnr = 3 * (xsnr - 0xa100);
	*snr = (xsnr > 0xffff) ? 0xffff : (xsnr < 0) ? 0 : xsnr;

	dprintk("%s\n", __func__);

	return 0;
}

static int si21_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
{
	struct si21xx_state *state = fe->demodulator_priv;

	dprintk("%s\n", __func__);

	if (state->errmode != STATUS_UCBLOCKS)
		*ucblocks = 0;
	else
		*ucblocks = (si21_readreg(state, 0x1d) << 8) |
					si21_readreg(state, 0x1e);

	return 0;
}

/*	initiates a channel acquisition sequence
	using the specified symbol rate and code rate */
static int si21xx_setacquire(struct dvb_frontend *fe, int symbrate,
						fe_code_rate_t crate)
{

	struct si21xx_state *state = fe->demodulator_priv;
	u8 coderates[] = {
				0x0, 0x01, 0x02, 0x04, 0x00,
				0x8, 0x10, 0x20, 0x00, 0x3f
	};

	u8 coderate_ptr;
	int status;
	u8 start_acq = 0x80;
	u8 reg, regs[3];

	dprintk("%s\n", __func__);

	status = PASS;
	coderate_ptr = coderates[crate];

	si21xx_set_symbolrate(fe, symbrate);

	/* write code rates to use in the Viterbi search */
	status |= si21_writeregs(state,
				VIT_SRCH_CTRL_REG_1,
				&coderate_ptr, 0x01);

	/* clear acq_start bit */
	status |= si21_readregs(state, ACQ_CTRL_REG_2, &reg, 0x01);
	reg &= ~start_acq;
	status |= si21_writeregs(state, ACQ_CTRL_REG_2, &reg, 0x01);

	/* use new Carrier Frequency Offset Estimator (QuickLock) */
	regs[0] = 0xCB;
	regs[1] = 0x40;
	regs[2] = 0xCB;

	status |= si21_writeregs(state,
				TWO_DB_BNDWDTH_THRSHLD_REG,
				&regs[0], 0x03);
	reg = 0x56;
	status |= si21_writeregs(state,
				LSA_CTRL_REG_1, &reg, 1);
	reg = 0x05;
	status |= si21_writeregs(state,
				BLIND_SCAN_CTRL_REG, &reg, 1);
	/* start automatic acq */
	status |= si21_writeregs(state,
				ACQ_CTRL_REG_2, &start_acq, 0x01);

	return status;
}

static int si21xx_set_property(struct dvb_frontend *fe, struct dtv_property *p)
{
	dprintk("%s(..)\n", __func__);
	return 0;
}

static int si21xx_get_property(struct dvb_frontend *fe, struct dtv_property *p)
{
	dprintk("%s(..)\n", __func__);
	return 0;
}

static int si21xx_set_frontend(struct dvb_frontend *fe,
					struct dvb_frontend_parameters *dfp)
{
	struct si21xx_state *state = fe->demodulator_priv;
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;

	/* freq		Channel carrier frequency in KHz (i.e. 1550000 KHz)
	 datarate	Channel symbol rate in Sps (i.e. 22500000 Sps)*/

	/* in MHz */
	unsigned char coarse_tune_freq;
	int fine_tune_freq;
	unsigned char sample_rate = 0;
	/* boolean */
	unsigned int inband_interferer_ind;

	/* INTERMEDIATE VALUES */
	int icoarse_tune_freq; /* MHz */
	int ifine_tune_freq; /* MHz */
	unsigned int band_high;
	unsigned int band_low;
	unsigned int x1;
	unsigned int x2;
	int i;
	unsigned int inband_interferer_div2[ALLOWABLE_FS_COUNT] = {
			FALSE, FALSE, FALSE, FALSE, FALSE,
			FALSE, FALSE, FALSE, FALSE, FALSE
	};
	unsigned int inband_interferer_div4[ALLOWABLE_FS_COUNT] = {
			FALSE, FALSE, FALSE, FALSE, FALSE,
			FALSE, FALSE, FALSE, FALSE, FALSE
	};

	int status;

	/* allowable sample rates for ADC in MHz */
	int afs[ALLOWABLE_FS_COUNT] = { 200, 192, 193, 194, 195,
					196, 204, 205, 206, 207
	};
	/* in MHz */
	int if_limit_high;
	int if_limit_low;
	int lnb_lo;
	int lnb_uncertanity;

	int rf_freq;
	int data_rate;
	unsigned char regs[4];

	dprintk("%s : FE_SET_FRONTEND\n", __func__);

	if (c->delivery_system != SYS_DVBS) {
			dprintk("%s: unsupported delivery system selected (%d)\n",
				__func__, c->delivery_system);
			return -EOPNOTSUPP;
	}

	for (i = 0; i < ALLOWABLE_FS_COUNT; ++i)
		inband_interferer_div2[i] = inband_interferer_div4[i] = FALSE;

	if_limit_high = -700000;
	if_limit_low = -100000;
	/* in MHz */
	lnb_lo = 0;
	lnb_uncertanity = 0;

	rf_freq = 10 * c->frequency ;
	data_rate = c->symbol_rate / 100;

	status = PASS;

	band_low = (rf_freq - lnb_lo) - ((lnb_uncertanity * 200)
					+ (data_rate * 135)) / 200;

	band_high = (rf_freq - lnb_lo) + ((lnb_uncertanity * 200)
					+ (data_rate * 135)) / 200;


	icoarse_tune_freq = 100000 *
				(((rf_freq - lnb_lo) -
					(if_limit_low + if_limit_high) / 2)
								/ 100000);

	ifine_tune_freq = (rf_freq - lnb_lo) - icoarse_tune_freq ;

	for (i = 0; i < ALLOWABLE_FS_COUNT; ++i) {
		x1 = ((rf_freq - lnb_lo) / (afs[i] * 2500)) *
					(afs[i] * 2500) + afs[i] * 2500;

		x2 = ((rf_freq - lnb_lo) / (afs[i] * 2500)) *
							(afs[i] * 2500);

		if (((band_low < x1) && (x1 < band_high)) ||
					((band_low < x2) && (x2 < band_high)))
					inband_interferer_div4[i] = TRUE;

	}

	for (i = 0; i < ALLOWABLE_FS_COUNT; ++i) {
		x1 = ((rf_freq - lnb_lo) / (afs[i] * 5000)) *
					(afs[i] * 5000) + afs[i] * 5000;

		x2 = ((rf_freq - lnb_lo) / (afs[i] * 5000)) *
					(afs[i] * 5000);

		if (((band_low < x1) && (x1 < band_high)) ||
					((band_low < x2) && (x2 < band_high)))
					inband_interferer_div2[i] = TRUE;
	}

	inband_interferer_ind = TRUE;
	for (i = 0; i < ALLOWABLE_FS_COUNT; ++i)
		inband_interferer_ind &= inband_interferer_div2[i] |
						inband_interferer_div4[i];

	if (inband_interferer_ind) {
		for (i = 0; i < ALLOWABLE_FS_COUNT; ++i) {
			if (inband_interferer_div2[i] == FALSE) {
				sample_rate = (u8) afs[i];
				break;
			}
		}
	} else {
		for (i = 0; i < ALLOWABLE_FS_COUNT; ++i) {
			if ((inband_interferer_div2[i] |
					inband_interferer_div4[i]) == FALSE) {
				sample_rate = (u8) afs[i];
				break;
			}
		}

	}

	if (sample_rate > 207 || sample_rate < 192)
		sample_rate = 200;

	fine_tune_freq = ((0x4000 * (ifine_tune_freq / 10)) /
					((sample_rate) * 1000));

	coarse_tune_freq = (u8)(icoarse_tune_freq / 100000);

	regs[0] = sample_rate;
	regs[1] = coarse_tune_freq;
	regs[2] = fine_tune_freq & 0xFF;
	regs[3] = fine_tune_freq >> 8 & 0xFF;

	status |= si21_writeregs(state, PLL_DIVISOR_REG, &regs[0], 0x04);

	state->fs = sample_rate;/*ADC MHz*/
	si21xx_setacquire(fe, c->symbol_rate, c->fec_inner);

	return 0;
}

static int si21xx_sleep(struct dvb_frontend *fe)
{
	struct si21xx_state *state = fe->demodulator_priv;
	u8 regdata;

	dprintk("%s\n", __func__);

	si21_readregs(state, SYSTEM_MODE_REG, &regdata, 0x01);
	regdata |= 1 << 6;
	si21_writeregs(state, SYSTEM_MODE_REG, &regdata, 0x01);
	state->initialised = 0;

	return 0;
}

static void si21xx_release(struct dvb_frontend *fe)
{
	struct si21xx_state *state = fe->demodulator_priv;

	dprintk("%s\n", __func__);

	kfree(state);
}

static struct dvb_frontend_ops si21xx_ops = {

	.info = {
		.name			= "SL SI21XX DVB-S",
		.type			= FE_QPSK,
		.frequency_min		= 950000,
		.frequency_max		= 2150000,
		.frequency_stepsize	= 125,	 /* kHz for QPSK frontends */
		.frequency_tolerance	= 0,
		.symbol_rate_min	= 1000000,
		.symbol_rate_max	= 45000000,
		.symbol_rate_tolerance	= 500,	/* ppm */
		.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
		FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
		FE_CAN_QPSK |
		FE_CAN_FEC_AUTO
	},

	.release = si21xx_release,
	.init = si21xx_init,
	.sleep = si21xx_sleep,
	.write = si21_write,
	.read_status = si21_read_status,
	.read_ber = si21_read_ber,
	.read_signal_strength = si21_read_signal_strength,
	.read_snr = si21_read_snr,
	.read_ucblocks = si21_read_ucblocks,
	.diseqc_send_master_cmd = si21xx_send_diseqc_msg,
	.diseqc_send_burst = si21xx_send_diseqc_burst,
	.set_tone = si21xx_set_tone,
	.set_voltage = si21xx_set_voltage,

	.set_property = si21xx_set_property,
	.get_property = si21xx_get_property,
	.set_frontend = si21xx_set_frontend,
};

struct dvb_frontend *si21xx_attach(const struct si21xx_config *config,
						struct i2c_adapter *i2c)
{
	struct si21xx_state *state = NULL;
	int id;

	dprintk("%s\n", __func__);

	/* allocate memory for the internal state */
	state = kmalloc(sizeof(struct si21xx_state), GFP_KERNEL);
	if (state == NULL)
		goto error;

	/* setup the state */
	state->config = config;
	state->i2c = i2c;
	state->initialised = 0;
	state->errmode = STATUS_BER;

	/* check if the demod is there */
	id = si21_readreg(state, SYSTEM_MODE_REG);
	si21_writereg(state, SYSTEM_MODE_REG, id | 0x40); /* standby off */
	msleep(200);
	id = si21_readreg(state, 0x00);

	/* register 0x00 contains:
		0x34 for SI2107
		0x24 for SI2108
		0x14 for SI2109
		0x04 for SI2110
	*/
	if (id != 0x04 && id != 0x14)
		goto error;

	/* create dvb_frontend */
	memcpy(&state->frontend.ops, &si21xx_ops,
					sizeof(struct dvb_frontend_ops));
	state->frontend.demodulator_priv = state;
	return &state->frontend;

error:
	kfree(state);
	return NULL;
}
EXPORT_SYMBOL(si21xx_attach);

module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");

MODULE_DESCRIPTION("SL SI21XX DVB Demodulator driver");
MODULE_AUTHOR("Igor M. Liplianin");
MODULE_LICENSE("GPL");