📄 stm8s_spi.ls
字号:
993 00aa 88 push a
994 00000001 OFST: set 1
997 ; 328 u8 crcreg = 0;
999 00ab 0f01 clr (OFST+0,sp)
1000 ; 331 assert_param(IS_SPI_CRC_OK(SPI_CRC));
1002 ; 333 if (SPI_CRC != SPI_CRC_RX)
1004 00ad 4d tnz a
1005 00ae 2705 jreq L154
1006 ; 335 crcreg = SPI->TXCRCR; /* Get the Tx CRC register*/
1008 00b0 c65207 ld a,20999
1010 00b3 2003 jra L354
1011 00b5 L154:
1012 ; 339 crcreg = SPI->RXCRCR; /* Get the Rx CRC register*/
1014 00b5 c65206 ld a,20998
1015 00b8 L354:
1016 ; 343 return crcreg;
1020 00b8 5b01 addw sp,#1
1021 00ba 81 ret
1046 ; 359 void SPI_ResetCRC(void)
1046 ; 360 {
1047 switch .text
1048 00bb _SPI_ResetCRC:
1052 ; 363 SPI_CalculateCRCCmd(ENABLE);
1054 00bb a601 ld a,#1
1055 00bd add7 call _SPI_CalculateCRCCmd
1057 ; 366 SPI_Cmd(ENABLE);
1059 00bf a601 ld a,#1
1061 ; 367 }
1064 00c1 2083 jp _SPI_Cmd
1088 ; 384 u8 SPI_GetCRCPolynomial(void)
1088 ; 385 {
1089 switch .text
1090 00c3 _SPI_GetCRCPolynomial:
1094 ; 386 return SPI->CRCPR; /* Return the CRC polynomial register */
1096 00c3 c65205 ld a,20997
1099 00c6 81 ret
1155 ; 402 void SPI_BiDirectionalLineConfig(SPI_Direction_TypeDef SPI_Direction)
1155 ; 403 {
1156 switch .text
1157 00c7 _SPI_BiDirectionalLineConfig:
1161 ; 405 assert_param(IS_SPI_DIRECTION_OK(SPI_Direction));
1163 ; 407 if (SPI_Direction != SPI_DIRECTION_RX)
1165 00c7 4d tnz a
1166 00c8 2705 jreq L325
1167 ; 409 SPI->CR2 |= SPI_CR2_BDOE; /* Set the Tx only mode*/
1169 00ca 721c5201 bset 20993,#6
1172 00ce 81 ret
1173 00cf L325:
1174 ; 413 SPI->CR2 &= (u8)(~SPI_CR2_BDOE); /* Set the Rx only mode*/
1176 00cf 721d5201 bres 20993,#6
1177 ; 415 }
1180 00d3 81 ret
1301 ; 435 FlagStatus SPI_GetFlagStatus(SPI_Flag_TypeDef SPI_FLAG)
1301 ; 436 {
1302 switch .text
1303 00d4 _SPI_GetFlagStatus:
1305 00d4 88 push a
1306 00000001 OFST: set 1
1309 ; 437 FlagStatus status = RESET;
1311 00d5 0f01 clr (OFST+0,sp)
1312 ; 439 assert_param(IS_SPI_FLAGS_OK(SPI_FLAG));
1314 ; 442 if ((SPI->SR & (u8)SPI_FLAG) != (u8)RESET)
1316 00d7 c45203 and a,20995
1317 00da 2702 jreq L306
1318 ; 444 status = SET; /* SPI_FLAG is set */
1320 00dc a601 ld a,#1
1322 00de L306:
1323 ; 448 status = RESET; /* SPI_FLAG is reset*/
1325 ; 452 return status;
1329 00de 5b01 addw sp,#1
1330 00e0 81 ret
1365 ; 479 void SPI_ClearFlag(SPI_Flag_TypeDef SPI_FLAG)
1365 ; 480 {
1366 switch .text
1367 00e1 _SPI_ClearFlag:
1371 ; 481 assert_param(IS_SPI_CLEAR_FLAGS_OK(SPI_FLAG));
1373 ; 483 SPI->SR = (u8)(~SPI_FLAG);
1375 00e1 43 cpl a
1376 00e2 c75203 ld 20995,a
1377 ; 484 }
1380 00e5 81 ret
1462 ; 509 ITStatus SPI_GetITStatus(SPI_IT_TypeDef SPI_IT)
1462 ; 510 {
1463 switch .text
1464 00e6 _SPI_GetITStatus:
1466 00e6 88 push a
1467 00e7 89 pushw x
1468 00000002 OFST: set 2
1471 ; 511 ITStatus pendingbitstatus = RESET;
1473 ; 512 u8 itpos = 0;
1475 ; 513 u8 itmask1 = 0;
1477 ; 514 u8 itmask2 = 0;
1479 ; 515 u8 enablestatus = 0;
1481 ; 516 assert_param(IS_SPI_GET_IT_OK(SPI_IT));
1483 ; 518 itpos = (u8)((u8)1 << ((u8)SPI_IT & (u8)0x0F));
1485 00e8 7b03 ld a,(OFST+1,sp)
1486 00ea a40f and a,#15
1487 00ec 5f clrw x
1488 00ed 97 ld xl,a
1489 00ee a601 ld a,#1
1490 00f0 5d tnzw x
1491 00f1 2704 jreq L65
1492 00f3 L06:
1493 00f3 48 sll a
1494 00f4 5a decw x
1495 00f5 26fc jrne L06
1496 00f7 L65:
1497 00f7 6b01 ld (OFST-1,sp),a
1498 ; 521 itmask1 = (u8)((u8)SPI_IT >> (u8)4);
1500 00f9 7b03 ld a,(OFST+1,sp)
1501 00fb 4e swap a
1502 00fc a40f and a,#15
1503 00fe 6b02 ld (OFST+0,sp),a
1504 ; 523 itmask2 = (u8)((u8)1 << itmask1);
1506 0100 5f clrw x
1507 0101 97 ld xl,a
1508 0102 a601 ld a,#1
1509 0104 5d tnzw x
1510 0105 2704 jreq L26
1511 0107 L46:
1512 0107 48 sll a
1513 0108 5a decw x
1514 0109 26fc jrne L46
1515 010b L26:
1516 ; 525 enablestatus = (u8)((u8)SPI->ICR & itmask2);
1518 010b c45202 and a,20994
1519 010e 6b02 ld (OFST+0,sp),a
1520 ; 527 if (((SPI->SR & itpos) != RESET) && enablestatus)
1522 0110 c65203 ld a,20995
1523 0113 1501 bcp a,(OFST-1,sp)
1524 0115 2708 jreq L766
1526 0117 7b02 ld a,(OFST+0,sp)
1527 0119 2704 jreq L766
1528 ; 530 pendingbitstatus = SET;
1530 011b a601 ld a,#1
1532 011d 2001 jra L176
1533 011f L766:
1534 ; 535 pendingbitstatus = RESET;
1536 011f 4f clr a
1537 0120 L176:
1538 ; 538 return pendingbitstatus;
1542 0120 5b03 addw sp,#3
1543 0122 81 ret
1588 ; 564 void SPI_ClearITPendingBit(SPI_IT_TypeDef SPI_IT)
1588 ; 565 {
1589 switch .text
1590 0123 _SPI_ClearITPendingBit:
1592 0123 88 push a
1593 00000001 OFST: set 1
1596 ; 566 u8 itpos = 0;
1598 0124 0f01 clr (OFST+0,sp)
1599 ; 567 assert_param(IS_SPI_CLEAR_IT_OK(SPI_IT));
1601 ; 572 itpos = (u8)((u8)1 << (((u8)SPI_IT & (u8)0xF0) >> 4));
1603 0126 4e swap a
1604 0127 a40f and a,#15
1605 0129 5f clrw x
1606 012a 97 ld xl,a
1607 012b a601 ld a,#1
1608 012d 5d tnzw x
1609 012e 2704 jreq L07
1610 0130 L27:
1611 0130 48 sll a
1612 0131 5a decw x
1613 0132 26fc jrne L27
1614 0134 L07:
1615 ; 574 SPI->SR = (u8)(~itpos);
1617 0134 43 cpl a
1618 0135 c75203 ld 20995,a
1619 ; 576 }
1622 0138 84 pop a
1623 0139 81 ret
1636 xdef _SPI_ClearITPendingBit
1637 xdef _SPI_GetITStatus
1638 xdef _SPI_ClearFlag
1639 xdef _SPI_GetFlagStatus
1640 xdef _SPI_BiDirectionalLineConfig
1641 xdef _SPI_GetCRCPolynomial
1642 xdef _SPI_ResetCRC
1643 xdef _SPI_GetCRC
1644 xdef _SPI_CalculateCRCCmd
1645 xdef _SPI_TransmitCRC
1646 xdef _SPI_NSSInternalSoftwareCmd
1647 xdef _SPI_ReceiveData
1648 xdef _SPI_SendData
1649 xdef _SPI_ITConfig
1650 xdef _SPI_Cmd
1651 xdef _SPI_Init
1652 xdef _SPI_DeInit
1671 end
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