📄 stm8s_uart3.ls
字号:
802 ; 249 UART3->CR6 |= itpos;
804 0173 c65249 ld a,21065
805 0176 1a02 or a,(OFST+0,sp)
806 0178 2035 jp LC001
807 017a L772:
808 ; 255 if (uartreg == 0x01)
810 017a 7b01 ld a,(OFST-1,sp)
811 017c a101 cp a,#1
812 017e 260b jrne L713
813 ; 257 UART3->CR1 &= (u8)(~itpos);
815 0180 7b02 ld a,(OFST+0,sp)
816 0182 43 cpl a
817 0183 c45244 and a,21060
818 0186 LC003:
819 0186 c75244 ld 21060,a
821 0189 2027 jra L513
822 018b L713:
823 ; 259 else if (uartreg == 0x02)
825 018b a102 cp a,#2
826 018d 260b jrne L323
827 ; 261 UART3->CR2 &= (u8)(~itpos);
829 018f 7b02 ld a,(OFST+0,sp)
830 0191 43 cpl a
831 0192 c45245 and a,21061
832 0195 LC002:
833 0195 c75245 ld 21061,a
835 0198 2018 jra L513
836 019a L323:
837 ; 263 else if (uartreg == 0x03)
839 019a a103 cp a,#3
840 019c 260b jrne L723
841 ; 265 UART3->CR4 &= (u8)(~itpos);
843 019e 7b02 ld a,(OFST+0,sp)
844 01a0 43 cpl a
845 01a1 c45247 and a,21063
846 01a4 LC004:
847 01a4 c75247 ld 21063,a
849 01a7 2009 jra L513
850 01a9 L723:
851 ; 269 UART3->CR6 &= (u8)(~itpos);
853 01a9 7b02 ld a,(OFST+0,sp)
854 01ab 43 cpl a
855 01ac c45249 and a,21065
856 01af LC001:
857 01af c75249 ld 21065,a
858 01b2 L513:
859 ; 272 }
862 01b2 5b04 addw sp,#4
863 01b4 81 ret
922 ; 290 void UART3_LINBreakDetectionConfig(UART3_LINBreakDetectionLength_TypeDef UART3_LINBreakDetectionLength)
922 ; 291 {
923 switch .text
924 01b5 _UART3_LINBreakDetectionConfig:
928 ; 292 assert_param(IS_UART3_LINBREAKDETECTIONLENGTH_OK(UART3_LINBreakDetectionLength));
930 ; 294 if (UART3_LINBreakDetectionLength != UART3_LINBREAKDETECTIONLENGTH_10BITS)
932 01b5 4d tnz a
933 01b6 2705 jreq L163
934 ; 296 UART3->CR4 |= UART3_CR4_LBDL;
936 01b8 721a5247 bset 21063,#5
939 01bc 81 ret
940 01bd L163:
941 ; 300 UART3->CR4 &= ((u8)~UART3_CR4_LBDL);
943 01bd 721b5247 bres 21063,#5
944 ; 302 }
947 01c1 81 ret
1068 ; 324 void UART3_LINConfig(UART3_LinMode_TypeDef UART3_Mode, UART3_LinAutosync_TypeDef UART3_Autosync, UART3_LinDivUp_TypeDef UART3_DivUp)
1068 ; 325 {
1069 switch .text
1070 01c2 _UART3_LINConfig:
1072 01c2 89 pushw x
1073 00000000 OFST: set 0
1076 ; 326 assert_param(IS_UART3_SLAVE_OK(UART3_Mode));
1078 ; 328 assert_param(IS_UART3_AUTOSYNC_OK(UART3_Autosync));
1080 ; 330 assert_param(IS_UART3_DIVUP_OK(UART3_DivUp));
1082 ; 332 if (UART3_Mode != UART3_LIN_MODE_MASTER)
1084 01c3 9e ld a,xh
1085 01c4 4d tnz a
1086 01c5 2706 jreq L344
1087 ; 334 UART3->CR6 |= UART3_CR6_LSLV;
1089 01c7 721a5249 bset 21065,#5
1091 01cb 2004 jra L544
1092 01cd L344:
1093 ; 338 UART3->CR6 &= ((u8)~UART3_CR6_LSLV);
1095 01cd 721b5249 bres 21065,#5
1096 01d1 L544:
1097 ; 341 if (UART3_Autosync != UART3_LIN_AUTOSYNC_DISABLE)
1099 01d1 7b02 ld a,(OFST+2,sp)
1100 01d3 2706 jreq L744
1101 ; 343 UART3->CR6 |= UART3_CR6_LASE ;
1103 01d5 72185249 bset 21065,#4
1105 01d9 2004 jra L154
1106 01db L744:
1107 ; 347 UART3->CR6 &= ((u8)~ UART3_CR6_LASE );
1109 01db 72195249 bres 21065,#4
1110 01df L154:
1111 ; 350 if (UART3_DivUp != UART3_LIN_DIVUP_LBRR1)
1113 01df 7b05 ld a,(OFST+5,sp)
1114 01e1 2706 jreq L354
1115 ; 352 UART3->CR6 |= UART3_CR6_LDUM;
1117 01e3 721e5249 bset 21065,#7
1119 01e7 2004 jra L554
1120 01e9 L354:
1121 ; 356 UART3->CR6 &= ((u8)~ UART3_CR6_LDUM);
1123 01e9 721f5249 bres 21065,#7
1124 01ed L554:
1125 ; 359 }
1128 01ed 85 popw x
1129 01ee 81 ret
1164 ; 379 void UART3_LINCmd(FunctionalState NewState)
1164 ; 380 {
1165 switch .text
1166 01ef _UART3_LINCmd:
1170 ; 381 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1172 ; 383 if (NewState != DISABLE)
1174 01ef 4d tnz a
1175 01f0 2705 jreq L574
1176 ; 386 UART3->CR3 |= UART3_CR3_LINEN;
1178 01f2 721c5246 bset 21062,#6
1181 01f6 81 ret
1182 01f7 L574:
1183 ; 391 UART3->CR3 &= ((u8)~UART3_CR3_LINEN);
1185 01f7 721d5246 bres 21062,#6
1186 ; 393 }
1189 01fb 81 ret
1246 ; 412 void UART3_WakeUpConfig(UART3_WakeUp_TypeDef UART3_WakeUp)
1246 ; 413 {
1247 switch .text
1248 01fc _UART3_WakeUpConfig:
1252 ; 414 assert_param(IS_UART3_WAKEUP_OK(UART3_WakeUp));
1254 ; 416 UART3->CR1 &= ((u8)~UART3_CR1_WAKE);
1256 01fc 72175244 bres 21060,#3
1257 ; 417 UART3->CR1 |= (u8)UART3_WakeUp;
1259 0200 ca5244 or a,21060
1260 0203 c75244 ld 21060,a
1261 ; 418 }
1264 0206 81 ret
1300 ; 438 void UART3_ReceiverWakeUpCmd(FunctionalState NewState)
1300 ; 439 {
1301 switch .text
1302 0207 _UART3_ReceiverWakeUpCmd:
1306 ; 440 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1308 ; 442 if (NewState != DISABLE)
1310 0207 4d tnz a
1311 0208 2705 jreq L545
1312 ; 445 UART3->CR2 |= UART3_CR2_RWU;
1314 020a 72125245 bset 21061,#1
1317 020e 81 ret
1318 020f L545:
1319 ; 450 UART3->CR2 &= ((u8)~UART3_CR2_RWU);
1321 020f 72135245 bres 21061,#1
1322 ; 452 }
1325 0213 81 ret
1348 ; 470 u8 UART3_ReceiveData8(void)
1348 ; 471 {
1349 switch .text
1350 0214 _UART3_ReceiveData8:
1354 ; 472 return ((u8)UART3->DR);
1356 0214 c65241 ld a,21057
1359 0217 81 ret
1382 ; 490 u16 UART3_ReceiveData9(void)
1382 ; 491 {
1383 switch .text
1384 0218 _UART3_ReceiveData9:
1386 0218 89 pushw x
1387 00000002 OFST: set 2
1390 ; 492 return (u16)((((u16)UART3->DR) | ((u16)(((u16)((u16)UART3->CR1 & (u16)UART3_CR1_R8)) << 1))) & ((u16)0x01FF));
1392 0219 c65244 ld a,21060
1393 021c a480 and a,#128
1394 021e 5f clrw x
1395 021f 02 rlwa x,a
1396 0220 58 sllw x
1397 0221 1f01 ldw (OFST-1,sp),x
1398 0223 5f clrw x
1399 0224 c65241 ld a,21057
1400 0227 97 ld xl,a
1401 0228 01 rrwa x,a
1402 0229 1a02 or a,(OFST+0,sp)
1403 022b 01 rrwa x,a
1404 022c 1a01 or a,(OFST-1,sp)
1405 022e a401 and a,#1
1406 0230 01 rrwa x,a
1409 0231 5b02 addw sp,#2
1410 0233 81 ret
1444 ; 514 void UART3_SendData8(u8 Data)
1444 ; 515 {
1445 switch .text
1446 0234 _UART3_SendData8:
1450 ; 517 UART3->DR = Data;
1452 0234 c75241 ld 21057,a
1453 ; 518 }
1456 0237 81 ret
1490 ; 537 void UART3_SendData9(u16 Data)
1490 ; 538 {
1491 switch .text
1492 0238 _UART3_SendData9:
1494 0238 89 pushw x
1495 00000000 OFST: set 0
1498 ; 539 UART3->CR1 &= ((u8)~UART3_CR1_T8); /**< Clear the transmit data bit 8 */
1500 0239 721d5244 bres 21060,#6
1501 ; 540 UART3->CR1 |= (u8)(((u8)(Data >> 2)) & UART3_CR1_T8); /**< Write the transmit data bit [8] */
1503 023d 54 srlw x
1504 023e 54 srlw x
1505 023f 9f ld a,xl
1506 0240 a440 and a,#64
1507 0242 ca5244 or a,21060
1508 0245 c75244 ld 21060,a
1509 ; 541 UART3->DR = (u8)(Data); /**< Write the transmit data bit [0:7] */
1511 0248 7b02 ld a,(OFST+2,sp)
1512 024a c75241 ld 21057,a
1513 ; 543 }
1516 024d 85 popw x
1517 024e 81 ret
1540 ; 558 void UART3_SendBreak(void)
1540 ; 559 {
1541 switch .text
1542 024f _UART3_SendBreak:
1546 ; 560 UART3->CR2 |= UART3_CR2_SBK;
1548 024f 72105245 bset 21061,#0
1549 ; 561 }
1552 0253 81 ret
1586 ; 580 void UART3_SetAddress(u8 UART3_Address)
1586 ; 581 {
1587 switch .text
1588 0254 _UART3_SetAddress:
1590 0254 88 push a
1591 00000000 OFST: set 0
1594 ; 583 assert_param(IS_UART3_ADDRESS_OK(UART3_Address));
1596 ; 586 UART3->CR4 &= ((u8)~UART3_CR4_ADD);
1598 0255 c65247 ld a,21063
1599 0258 a4f0 and a,#240
1600 025a c75247 ld 21063,a
1601 ; 588 UART3->CR4 |= UART3_Address;
1603 025d c65247 ld a,21063
1604 0260 1a01 or a,(OFST+1,sp)
1605 0262 c75247 ld 21063,a
1606 ; 589 }
1609 0265 84 pop a
1610 0266 81 ret
1767 ; 609 FlagStatus UART3_GetFlagStatus(UART3_Flag_TypeDef UART3_FLAG)
1767 ; 610 {
1768 switch .text
1769 0267 _UART3_GetFlagStatus:
1771 0267 89 pushw x
1772 0268 88 push a
1773 00000001 OFST: set 1
1776 ; 611 FlagStatus status = RESET;
1778 0269 0f01 clr (OFST+0,sp)
1779 ; 614 assert_param(IS_UART3_FLAG_OK(UART3_FLAG));
1781 ; 617 if (UART3_FLAG == UART3_FLAG_LBDF)
1783 026b a30210 cpw x,#528
1784 026e 2608 jrne L147
1785 ; 619 if ((UART3->CR4 & (u8)UART3_FLAG) != (u8)0x00)
1787 0270 9f ld a,xl
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -