📄 stm8s_uart3.ls
字号:
1 ; C Compiler for STM8 (COSMIC Software)
2 ; Generator V4.2.8 - 03 Dec 2008
3 ; Optimizer V4.2.8 - 03 Dec 2008
44 ; 66 void UART3_DeInit(void)
44 ; 67 {
46 switch .text
47 0000 _UART3_DeInit:
49 0000 88 push a
50 00000001 OFST: set 1
53 ; 68 u8 dummy = 0;
55 0001 0f01 clr (OFST+0,sp)
56 ; 71 dummy = UART3->SR;
58 0003 c65240 ld a,21056
59 ; 72 dummy = UART3->DR;
61 0006 c65241 ld a,21057
62 ; 74 UART3->BRR2 = UART3_BRR2_RESET_VALUE; /*< Set UART3_BRR2 to reset value 0x00 */
64 0009 725f5243 clr 21059
65 ; 75 UART3->BRR1 = UART3_BRR1_RESET_VALUE; /*< Set UART3_BRR1 to reset value 0x00 */
67 000d 725f5242 clr 21058
68 ; 77 UART3->CR1 = UART3_CR1_RESET_VALUE; /*< Set UART3_CR1 to reset value 0x00 */
70 0011 725f5244 clr 21060
71 ; 78 UART3->CR2 = UART3_CR2_RESET_VALUE; /*< Set UART3_CR2 to reset value 0x00 */
73 0015 725f5245 clr 21061
74 ; 79 UART3->CR3 = UART3_CR3_RESET_VALUE; /*< Set UART3_CR3 to reset value 0x00 */
76 0019 725f5246 clr 21062
77 ; 80 UART3->CR4 = UART3_CR4_RESET_VALUE; /*< Set UART3_CR4 to reset value 0x00 */
79 001d 725f5247 clr 21063
80 ; 81 UART3->CR6 = UART3_CR6_RESET_VALUE; /*< Set UART3_CR6 to reset value 0x00 */
82 0021 725f5249 clr 21065
83 ; 83 }
86 0025 84 pop a
87 0026 81 ret
314 .const: section .text
315 0000 L41:
316 0000 00000064 dc.l 100
317 ; 102 void UART3_Init(u32 BaudRate, UART3_WordLength_TypeDef WordLength, UART3_StopBits_TypeDef StopBits, UART3_Parity_TypeDef Parity, UART3_Mode_TypeDef Mode)
317 ; 103 {
318 switch .text
319 0027 _UART3_Init:
321 0027 520e subw sp,#14
322 0000000e OFST: set 14
325 ; 104 u8 BRR2_1, BRR2_2 = 0;
327 ; 105 u32 BaudRate_Mantissa, BaudRate_Mantissa100 = 0;
329 0029 96 ldw x,sp
330 002a 1c0007 addw x,#OFST-7
331 002d cd0000 call c_ltor
333 ; 107 assert_param(IS_UART3_WORDLENGTH_OK(WordLength));
335 ; 109 assert_param(IS_UART3_STOPBITS_OK(StopBits));
337 ; 111 assert_param(IS_UART3_PARITY_OK(Parity));
339 ; 114 assert_param(IS_UART3_BAUDRATE_OK(BaudRate));
341 ; 117 assert_param(IS_UART3_MODE_OK((u8)Mode));
343 ; 122 UART3->CR1 &= (u8)(~UART3_CR1_M); /**< Clear the word length bit */
345 0030 72195244 bres 21060,#4
346 ; 123 UART3->CR1 |= (u8)WordLength; /**< Set the word length bit according to UART3_WordLength value */
348 0034 c65244 ld a,21060
349 0037 1a15 or a,(OFST+7,sp)
350 0039 c75244 ld 21060,a
351 ; 125 UART3->CR3 &= (u8)(~UART3_CR3_STOP); /**< Clear the STOP bits */
353 003c c65246 ld a,21062
354 003f a4cf and a,#207
355 0041 c75246 ld 21062,a
356 ; 126 UART3->CR3 |= (u8)StopBits; /**< Set the STOP bits number according to UART3_StopBits value */
358 0044 c65246 ld a,21062
359 0047 1a16 or a,(OFST+8,sp)
360 0049 c75246 ld 21062,a
361 ; 128 UART3->CR1 &= (u8)(~(UART3_CR1_PCEN | UART3_CR1_PS)); /**< Clear the Parity Control bit */
363 004c c65244 ld a,21060
364 004f a4f9 and a,#249
365 0051 c75244 ld 21060,a
366 ; 129 UART3->CR1 |= (u8)Parity; /**< Set the Parity Control bit to UART3_Parity value */
368 0054 c65244 ld a,21060
369 0057 1a17 or a,(OFST+9,sp)
370 0059 c75244 ld 21060,a
371 ; 131 UART3->BRR1 &= (u8)(~UART3_BRR1_DIVM); /**< Clear the LSB mantissa of UART3DIV */
373 005c 725f5242 clr 21058
374 ; 132 UART3->BRR2 &= (u8)(~UART3_BRR2_DIVM); /**< Clear the MSB mantissa of UART3DIV */
376 0060 c65243 ld a,21059
377 0063 a40f and a,#15
378 0065 c75243 ld 21059,a
379 ; 133 UART3->BRR2 &= (u8)(~UART3_BRR2_DIVF); /**< Clear the Fraction bits of UART3DIV */
381 0068 c65243 ld a,21059
382 006b a4f0 and a,#240
383 006d c75243 ld 21059,a
384 ; 136 BaudRate_Mantissa = ((u32)CLK_GetClockFreq() / (BaudRate << 4));
386 0070 96 ldw x,sp
387 0071 1c0011 addw x,#OFST+3
388 0074 cd0000 call c_ltor
390 0077 a604 ld a,#4
391 0079 cd0000 call c_llsh
393 007c 96 ldw x,sp
394 007d 5c incw x
395 007e cd0000 call c_rtol
397 0081 cd0000 call _CLK_GetClockFreq
399 0084 96 ldw x,sp
400 0085 5c incw x
401 0086 cd0000 call c_ludv
403 0089 96 ldw x,sp
404 008a 1c000b addw x,#OFST-3
405 008d cd0000 call c_rtol
407 ; 137 BaudRate_Mantissa100 = (((u32)CLK_GetClockFreq() * 100) / (BaudRate << 4));
409 0090 96 ldw x,sp
410 0091 1c0011 addw x,#OFST+3
411 0094 cd0000 call c_ltor
413 0097 a604 ld a,#4
414 0099 cd0000 call c_llsh
416 009c 96 ldw x,sp
417 009d 5c incw x
418 009e cd0000 call c_rtol
420 00a1 cd0000 call _CLK_GetClockFreq
422 00a4 a664 ld a,#100
423 00a6 cd0000 call c_smul
425 00a9 96 ldw x,sp
426 00aa 5c incw x
427 00ab cd0000 call c_ludv
429 00ae 96 ldw x,sp
430 00af 1c0007 addw x,#OFST-7
431 00b2 cd0000 call c_rtol
433 ; 139 BRR2_1 = (u8)((u8)(((BaudRate_Mantissa100 - (BaudRate_Mantissa * 100))
433 ; 140 << 4) / 100) & (u8)0x0F); /**< Set the fraction of UART3DIV */
435 00b5 96 ldw x,sp
436 00b6 1c000b addw x,#OFST-3
437 00b9 cd0000 call c_ltor
439 00bc a664 ld a,#100
440 00be cd0000 call c_smul
442 00c1 96 ldw x,sp
443 00c2 5c incw x
444 00c3 cd0000 call c_rtol
446 00c6 96 ldw x,sp
447 00c7 1c0007 addw x,#OFST-7
448 00ca cd0000 call c_ltor
450 00cd 96 ldw x,sp
451 00ce 5c incw x
452 00cf cd0000 call c_lsub
454 00d2 a604 ld a,#4
455 00d4 cd0000 call c_llsh
457 00d7 ae0000 ldw x,#L41
458 00da cd0000 call c_ludv
460 00dd b603 ld a,c_lreg+3
461 00df a40f and a,#15
462 00e1 6b05 ld (OFST-9,sp),a
463 ; 141 BRR2_2 = (u8)((BaudRate_Mantissa >> 4) & (u8)0xF0);
465 00e3 96 ldw x,sp
466 00e4 1c000b addw x,#OFST-3
467 00e7 cd0000 call c_ltor
469 00ea a604 ld a,#4
470 00ec cd0000 call c_lursh
472 00ef b603 ld a,c_lreg+3
473 00f1 a4f0 and a,#240
474 00f3 b703 ld c_lreg+3,a
475 00f5 3f02 clr c_lreg+2
476 00f7 3f01 clr c_lreg+1
477 00f9 3f00 clr c_lreg
478 00fb 6b06 ld (OFST-8,sp),a
479 ; 143 UART3->BRR2 = (u8)(BRR2_1 | BRR2_2);
481 00fd 1a05 or a,(OFST-9,sp)
482 00ff c75243 ld 21059,a
483 ; 144 UART3->BRR1 = (u8)BaudRate_Mantissa; /**< Set the LSB mantissa of UART3DIV */
485 0102 7b0e ld a,(OFST+0,sp)
486 0104 c75242 ld 21058,a
487 ; 146 if ((u8)Mode&(u8)UART3_MODE_TX_ENABLE)
489 0107 7b18 ld a,(OFST+10,sp)
490 0109 a504 bcp a,#4
491 010b 2706 jreq L551
492 ; 148 UART3->CR2 |= UART3_CR2_TEN; /**< Set the Transmitter Enable bit */
494 010d 72165245 bset 21061,#3
496 0111 2004 jra L751
497 0113 L551:
498 ; 152 UART3->CR2 &= (u8)(~UART3_CR2_TEN); /**< Clear the Transmitter Disable bit */
500 0113 72175245 bres 21061,#3
501 0117 L751:
502 ; 154 if ((u8)Mode & (u8)UART3_MODE_RX_ENABLE)
504 0117 a508 bcp a,#8
505 0119 2706 jreq L161
506 ; 156 UART3->CR2 |= UART3_CR2_REN; /**< Set the Receiver Enable bit */
508 011b 72145245 bset 21061,#2
510 011f 2004 jra L361
511 0121 L161:
512 ; 160 UART3->CR2 &= (u8)(~UART3_CR2_REN); /**< Clear the Receiver Disable bit */
514 0121 72155245 bres 21061,#2
515 0125 L361:
516 ; 162 }
519 0125 5b0e addw sp,#14
520 0127 81 ret
575 ; 182 void UART3_Cmd(FunctionalState NewState)
575 ; 183 {
576 switch .text
577 0128 _UART3_Cmd:
581 ; 185 if (NewState != DISABLE)
583 0128 4d tnz a
584 0129 2705 jreq L312
585 ; 187 UART3->CR1 &= (u8)(~UART3_CR1_UARTD); /**< UART3 Enable */
587 012b 721b5244 bres 21060,#5
590 012f 81 ret
591 0130 L312:
592 ; 191 UART3->CR1 |= UART3_CR1_UARTD; /**< UART3 Disable (for low power consumption) */
594 0130 721a5244 bset 21060,#5
595 ; 193 }
598 0134 81 ret
730 ; 220 void UART3_ITConfig(UART3_IT_TypeDef UART3_IT, FunctionalState NewState)
730 ; 221 {
731 switch .text
732 0135 _UART3_ITConfig:
734 0135 89 pushw x
735 0136 89 pushw x
736 00000002 OFST: set 2
739 ; 222 u8 uartreg, itpos = 0x00;
741 ; 223 assert_param(IS_UART3_CONFIG_IT_OK(UART3_IT));
743 ; 224 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
745 ; 227 uartreg = (u8)(UART3_IT >> 0x08);
747 0137 7b03 ld a,(OFST+1,sp)
748 0139 6b01 ld (OFST-1,sp),a
749 ; 230 itpos = (u8)((u8)1 << (u8)((u8)UART3_IT & (u8)0x0F));
751 013b 7b04 ld a,(OFST+2,sp)
752 013d a40f and a,#15
753 013f 5f clrw x
754 0140 97 ld xl,a
755 0141 a601 ld a,#1
756 0143 5d tnzw x
757 0144 2704 jreq L22
758 0146 L42:
759 0146 48 sll a
760 0147 5a decw x
761 0148 26fc jrne L42
762 014a L22:
763 014a 6b02 ld (OFST+0,sp),a
764 ; 232 if (NewState != DISABLE)
766 014c 7b07 ld a,(OFST+5,sp)
767 014e 272a jreq L772
768 ; 235 if (uartreg == 0x01)
770 0150 7b01 ld a,(OFST-1,sp)
771 0152 a101 cp a,#1
772 0154 2607 jrne L103
773 ; 237 UART3->CR1 |= itpos;
775 0156 c65244 ld a,21060
776 0159 1a02 or a,(OFST+0,sp)
778 015b 2029 jp LC003
779 015d L103:
780 ; 239 else if (uartreg == 0x02)
782 015d a102 cp a,#2
783 015f 2607 jrne L503
784 ; 241 UART3->CR2 |= itpos;
786 0161 c65245 ld a,21061
787 0164 1a02 or a,(OFST+0,sp)
789 0166 202d jp LC002
790 0168 L503:
791 ; 243 else if (uartreg == 0x03)
793 0168 a103 cp a,#3
794 016a 2607 jrne L113
795 ; 245 UART3->CR4 |= itpos;
797 016c c65247 ld a,21063
798 016f 1a02 or a,(OFST+0,sp)
800 0171 2031 jp LC004
801 0173 L113:
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -