📄 stm8s_tim2.ls
字号:
3335 ; 1409 u16 tmpccr3 = 0;
3337 ; 1410 u8 tmpccr3l=0, tmpccr3h=0;
3341 ; 1412 tmpccr3h = TIM2->CCR3H;
3343 038e c65313 ld a,21267
3344 0391 6b02 ld (OFST-2,sp),a
3345 ; 1413 tmpccr3l = TIM2->CCR3L;
3347 0393 c65314 ld a,21268
3348 0396 6b01 ld (OFST-3,sp),a
3349 ; 1415 tmpccr3 = (u16)(tmpccr3l);
3351 0398 5f clrw x
3352 0399 97 ld xl,a
3353 039a 1f03 ldw (OFST-1,sp),x
3354 ; 1416 tmpccr3 |= (u16)((u16)tmpccr3h << 8);
3356 039c 7b02 ld a,(OFST-2,sp)
3357 039e 97 ld xl,a
3358 039f 7b04 ld a,(OFST+0,sp)
3359 03a1 01 rrwa x,a
3360 03a2 1a03 or a,(OFST-1,sp)
3361 03a4 01 rrwa x,a
3362 ; 1418 return (u16)tmpccr3;
3366 03a5 5b04 addw sp,#4
3367 03a7 81 ret
3390 ; 1437 u16 TIM2_GetCounter(void)
3390 ; 1438 {
3391 switch .text
3392 03a8 _TIM2_GetCounter:
3394 03a8 89 pushw x
3395 00000002 OFST: set 2
3398 ; 1440 return (u16)(((u16)TIM2->CNTRH << 8) | (u16)(TIM2->CNTRL));
3400 03a9 c6530b ld a,21259
3401 03ac 5f clrw x
3402 03ad 97 ld xl,a
3403 03ae 1f01 ldw (OFST-1,sp),x
3404 03b0 c6530a ld a,21258
3405 03b3 97 ld xl,a
3406 03b4 7b02 ld a,(OFST+0,sp)
3407 03b6 01 rrwa x,a
3408 03b7 1a01 or a,(OFST-1,sp)
3409 03b9 01 rrwa x,a
3412 03ba 5b02 addw sp,#2
3413 03bc 81 ret
3437 ; 1460 TIM2_Prescaler_TypeDef TIM2_GetPrescaler(void)
3437 ; 1461 {
3438 switch .text
3439 03bd _TIM2_GetPrescaler:
3443 ; 1463 return (TIM2_Prescaler_TypeDef)(TIM2->PSCR);
3445 03bd c6530c ld a,21260
3448 03c0 81 ret
3587 ; 1490 FlagStatus TIM2_GetFlagStatus(TIM2_FLAG_TypeDef TIM2_FLAG)
3587 ; 1491 {
3588 switch .text
3589 03c1 _TIM2_GetFlagStatus:
3591 03c1 89 pushw x
3592 03c2 5203 subw sp,#3
3593 00000003 OFST: set 3
3596 ; 1492 FlagStatus bitstatus = RESET;
3598 03c4 7b03 ld a,(OFST+0,sp)
3599 03c6 97 ld xl,a
3600 ; 1496 assert_param(IS_TIM2_GET_FLAG_OK(TIM2_FLAG));
3602 ; 1498 tim2_flag_l = (u8)(TIM2_FLAG);
3604 03c7 7b05 ld a,(OFST+2,sp)
3605 03c9 6b02 ld (OFST-1,sp),a
3606 ; 1499 tim2_flag_h = (u8)(TIM2_FLAG >> 8);
3608 03cb 7b04 ld a,(OFST+1,sp)
3609 03cd 6b03 ld (OFST+0,sp),a
3610 ; 1501 if (((TIM2->SR1 & tim2_flag_l) | (TIM2->SR2 & tim2_flag_h)) != (u8)RESET )
3612 03cf c45303 and a,21251
3613 03d2 6b01 ld (OFST-2,sp),a
3614 03d4 c65302 ld a,21250
3615 03d7 1402 and a,(OFST-1,sp)
3616 03d9 1a01 or a,(OFST-2,sp)
3617 03db 2702 jreq L7271
3618 ; 1503 bitstatus = SET;
3620 03dd a601 ld a,#1
3622 03df L7271:
3623 ; 1507 bitstatus = RESET;
3625 ; 1509 return (FlagStatus)bitstatus;
3629 03df 5b05 addw sp,#5
3630 03e1 81 ret
3665 ; 1535 void TIM2_ClearFlag(TIM2_FLAG_TypeDef TIM2_FLAG)
3665 ; 1536 {
3666 switch .text
3667 03e2 _TIM2_ClearFlag:
3669 03e2 89 pushw x
3670 00000000 OFST: set 0
3673 ; 1538 assert_param(IS_TIM2_CLEAR_FLAG_OK(TIM2_FLAG));
3675 ; 1541 TIM2->SR1 = (u8)(~((u8)(TIM2_FLAG)));
3677 03e3 9f ld a,xl
3678 03e4 43 cpl a
3679 03e5 c75302 ld 21250,a
3680 ; 1542 TIM2->SR2 = (u8)(~((u8)(TIM2_FLAG >> 8)));
3682 03e8 7b01 ld a,(OFST+1,sp)
3683 03ea 43 cpl a
3684 03eb c75303 ld 21251,a
3685 ; 1543 }
3688 03ee 85 popw x
3689 03ef 81 ret
3753 ; 1567 ITStatus TIM2_GetITStatus(TIM2_IT_TypeDef TIM2_IT)
3753 ; 1568 {
3754 switch .text
3755 03f0 _TIM2_GetITStatus:
3757 03f0 88 push a
3758 03f1 89 pushw x
3759 00000002 OFST: set 2
3762 ; 1569 ITStatus bitstatus = RESET;
3764 ; 1571 u8 TIM2_itStatus = 0x0, TIM2_itEnable = 0x0;
3768 03f2 7b02 ld a,(OFST+0,sp)
3769 03f4 97 ld xl,a
3770 ; 1574 assert_param(IS_TIM2_GET_IT_OK(TIM2_IT));
3772 ; 1576 TIM2_itStatus = (u8)(TIM2->SR1 & TIM2_IT);
3774 03f5 c65302 ld a,21250
3775 03f8 1403 and a,(OFST+1,sp)
3776 03fa 6b01 ld (OFST-1,sp),a
3777 ; 1578 TIM2_itEnable = (u8)(TIM2->IER & TIM2_IT);
3779 03fc c65301 ld a,21249
3780 03ff 1403 and a,(OFST+1,sp)
3781 0401 6b02 ld (OFST+0,sp),a
3782 ; 1580 if ((TIM2_itStatus != (u8)RESET ) && (TIM2_itEnable != (u8)RESET ))
3784 0403 7b01 ld a,(OFST-1,sp)
3785 0405 2708 jreq L3002
3787 0407 7b02 ld a,(OFST+0,sp)
3788 0409 2704 jreq L3002
3789 ; 1582 bitstatus = SET;
3791 040b a601 ld a,#1
3793 040d 2001 jra L5002
3794 040f L3002:
3795 ; 1586 bitstatus = RESET;
3797 040f 4f clr a
3798 0410 L5002:
3799 ; 1588 return (ITStatus)(bitstatus);
3803 0410 5b03 addw sp,#3
3804 0412 81 ret
3840 ; 1611 void TIM2_ClearITPendingBit(TIM2_IT_TypeDef TIM2_IT)
3840 ; 1612 {
3841 switch .text
3842 0413 _TIM2_ClearITPendingBit:
3846 ; 1614 assert_param(IS_TIM2_IT_OK(TIM2_IT));
3848 ; 1617 TIM2->SR1 = (u8)(~TIM2_IT);
3850 0413 43 cpl a
3851 0414 c75302 ld 21250,a
3852 ; 1618 }
3855 0417 81 ret
3907 ; 1646 static void TI1_Config(u8 TIM2_ICPolarity,
3907 ; 1647 u8 TIM2_ICSelection,
3907 ; 1648 u8 TIM2_ICFilter)
3907 ; 1649 {
3908 switch .text
3909 0418 L3_TI1_Config:
3911 0418 89 pushw x
3912 00000001 OFST: set 1
3915 ; 1651 TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC1E);
3917 0419 72115308 bres 21256,#0
3918 041d 88 push a
3919 ; 1654 TIM2->CCMR1 = (u8)((TIM2->CCMR1 & (u8)(~( TIM2_CCMR_CCxS | TIM2_CCMR_ICxF ))) | (u8)(( (TIM2_ICSelection)) | ((u8)( TIM2_ICFilter << 4))));
3921 041e 7b06 ld a,(OFST+5,sp)
3922 0420 97 ld xl,a
3923 0421 a610 ld a,#16
3924 0423 42 mul x,a
3925 0424 9f ld a,xl
3926 0425 1a03 or a,(OFST+2,sp)
3927 0427 6b01 ld (OFST+0,sp),a
3928 0429 c65305 ld a,21253
3929 042c a40c and a,#12
3930 042e 1a01 or a,(OFST+0,sp)
3931 0430 c75305 ld 21253,a
3932 ; 1657 if (TIM2_ICPolarity != TIM2_ICPOLARITY_RISING)
3934 0433 7b02 ld a,(OFST+1,sp)
3935 0435 2706 jreq L3502
3936 ; 1659 TIM2->CCER1 |= TIM2_CCER1_CC1P;
3938 0437 72125308 bset 21256,#1
3940 043b 2004 jra L5502
3941 043d L3502:
3942 ; 1663 TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC1P);
3944 043d 72135308 bres 21256,#1
3945 0441 L5502:
3946 ; 1666 TIM2->CCER1 |= TIM2_CCER1_CC1E;
3948 0441 72105308 bset 21256,#0
3949 ; 1667 }
3952 0445 5b03 addw sp,#3
3953 0447 81 ret
4005 ; 1695 static void TI2_Config(u8 TIM2_ICPolarity,
4005 ; 1696 u8 TIM2_ICSelection,
4005 ; 1697 u8 TIM2_ICFilter)
4005 ; 1698 {
4006 switch .text
4007 0448 L5_TI2_Config:
4009 0448 89 pushw x
4010 00000001 OFST: set 1
4013 ; 1700 TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC2E);
4015 0449 72195308 bres 21256,#4
4016 044d 88 push a
4017 ; 1703 TIM2->CCMR2 = (u8)((TIM2->CCMR2 & (u8)(~( TIM2_CCMR_CCxS | TIM2_CCMR_ICxF ))) | (u8)(( (TIM2_ICSelection)) | ((u8)( TIM2_ICFilter << 4))));
4019 044e 7b06 ld a,(OFST+5,sp)
4020 0450 97 ld xl,a
4021 0451 a610 ld a,#16
4022 0453 42 mul x,a
4023 0454 9f ld a,xl
4024 0455 1a03 or a,(OFST+2,sp)
4025 0457 6b01 ld (OFST+0,sp),a
4026 0459 c65306 ld a,21254
4027 045c a40c and a,#12
4028 045e 1a01 or a,(OFST+0,sp)
4029 0460 c75306 ld 21254,a
4030 ; 1707 if (TIM2_ICPolarity != TIM2_ICPOLARITY_RISING)
4032 0463 7b02 ld a,(OFST+1,sp)
4033 0465 2706 jreq L5012
4034 ; 1709 TIM2->CCER1 |= TIM2_CCER1_CC2P;
4036 0467 721a5308 bset 21256,#5
4038 046b 2004 jra L7012
4039 046d L5012:
4040 ; 1713 TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC2P);
4042 046d 721b5308 bres 21256,#5
4043 0471 L7012:
4044 ; 1717 TIM2->CCER1 |= TIM2_CCER1_CC2E;
4046 0471 72185308 bset 21256,#4
4047 ; 1719 }
4050 0475 5b03 addw sp,#3
4051 0477 81 ret
4103 ; 1744 static void TI3_Config(u8 TIM2_ICPolarity, u8 TIM2_ICSelection,
4103 ; 1745 u8 TIM2_ICFilter)
4103 ; 1746 {
4104 switch .text
4105 0478 L7_TI3_Config:
4107 0478 89 pushw x
4108 00000001 OFST: set 1
4111 ; 1748 TIM2->CCER2 &= (u8)(~TIM2_CCER2_CC3E);
4113 0479 72115309 bres 21257,#0
4114 047d 88 push a
4115 ; 1751 TIM2->CCMR3 = (u8)((TIM2->CCMR3 & (u8)(~( TIM2_CCMR_CCxS | TIM2_CCMR_ICxF ))) | (u8)(( (TIM2_ICSelection)) | ((u8)( TIM2_ICFilter << 4))));
4117 047e 7b06 ld a,(OFST+5,sp)
4118 0480 97 ld xl,a
4119 0481 a610 ld a,#16
4120 0483 42 mul x,a
4121 0484 9f ld a,xl
4122 0485 1a03 or a,(OFST+2,sp)
4123 0487 6b01 ld (OFST+0,sp),a
4124 0489 c65307 ld a,21255
4125 048c a40c and a,#12
4126 048e 1a01 or a,(OFST+0,sp)
4127 0490 c75307 ld 21255,a
4128 ; 1755 if (TIM2_ICPolarity != TIM2_ICPOLARITY_RISING)
4130 0493 7b02 ld a,(OFST+1,sp)
4131 0495 2706 jreq L7312
4132 ; 1757 TIM2->CCER2 |= TIM2_CCER2_CC3P;
4134 0497 72125309 bset 21257,#1
4136 049b 2004 jra L1412
4137 049d L7312:
4138 ; 1761 TIM2->CCER2 &= (u8)(~TIM2_CCER2_CC3P);
4140 049d 72135309 bres 21257,#1
4141 04a1 L1412:
4142 ; 1764 TIM2->CCER2 |= TIM2_CCER2_CC3E;
4144 04a1 72105309 bset 21257,#0
4145 ; 1765 }
4148 04a5 5b03 addw sp,#3
4149 04a7 81 ret
4162 xdef _TIM2_ClearITPendingBit
4163 xdef _TIM2_GetITStatus
4164 xdef _TIM2_ClearFlag
4165 xdef _TIM2_GetFlagStatus
4166 xdef _TIM2_GetPrescaler
4167 xdef _TIM2_GetCounter
4168 xdef _TIM2_GetCapture3
4169 xdef _TIM2_GetCapture2
4170 xdef _TIM2_GetCapture1
4171 xdef _TIM2_SetIC3Prescaler
4172 xdef _TIM2_SetIC2Prescaler
4173 xdef _TIM2_SetIC1Prescaler
4174 xdef _TIM2_SetCompare3
4175 xdef _TIM2_SetCompare2
4176 xdef _TIM2_SetCompare1
4177 xdef _TIM2_SetAutoreload
4178 xdef _TIM2_SetCounter
4179 xdef _TIM2_SelectOCxM
4180 xdef _TIM2_CCxCmd
4181 xdef _TIM2_OC3PolarityConfig
4182 xdef _TIM2_OC2PolarityConfig
4183 xdef _TIM2_OC1PolarityConfig
4184 xdef _TIM2_GenerateEvent
4185 xdef _TIM2_OC3PreloadConfig
4186 xdef _TIM2_OC2PreloadConfig
4187 xdef _TIM2_OC1PreloadConfig
4188 xdef _TIM2_ARRPreloadConfig
4189 xdef _TIM2_ForcedOC3Config
4190 xdef _TIM2_ForcedOC2Config
4191 xdef _TIM2_ForcedOC1Config
4192 xdef _TIM2_PrescalerConfig
4193 xdef _TIM2_SelectOnePulseMode
4194 xdef _TIM2_UpdateRequestConfig
4195 xdef _TIM2_UpdateDisableConfig
4196 xdef _TIM2_ITConfig
4197 xdef _TIM2_Cmd
4198 xdef _TIM2_PWMIConfig
4199 xdef _TIM2_ICInit
4200 xdef _TIM2_OC3Init
4201 xdef _TIM2_OC2Init
4202 xdef _TIM2_OC1Init
4203 xdef _TIM2_TimeBaseInit
4204 xdef _TIM2_DeInit
4223 end
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -