📄 stm8s_uart2.ls
字号:
946 01b0 7b02 ld a,(OFST+0,sp)
947 01b2 43 cpl a
948 01b3 c45244 and a,21060
949 01b6 LC003:
950 01b6 c75244 ld 21060,a
952 01b9 2027 jra L553
953 01bb L753:
954 ; 275 else if (uartreg == 0x02)
956 01bb a102 cp a,#2
957 01bd 260b jrne L363
958 ; 277 UART2->CR2 &= (u8)(~itpos);
960 01bf 7b02 ld a,(OFST+0,sp)
961 01c1 43 cpl a
962 01c2 c45245 and a,21061
963 01c5 LC002:
964 01c5 c75245 ld 21061,a
966 01c8 2018 jra L553
967 01ca L363:
968 ; 279 else if (uartreg == 0x03)
970 01ca a103 cp a,#3
971 01cc 260b jrne L763
972 ; 281 UART2->CR4 &= (u8)(~itpos);
974 01ce 7b02 ld a,(OFST+0,sp)
975 01d0 43 cpl a
976 01d1 c45247 and a,21063
977 01d4 LC004:
978 01d4 c75247 ld 21063,a
980 01d7 2009 jra L553
981 01d9 L763:
982 ; 285 UART2->CR6 &= (u8)(~itpos);
984 01d9 7b02 ld a,(OFST+0,sp)
985 01db 43 cpl a
986 01dc c45249 and a,21065
987 01df LC001:
988 01df c75249 ld 21065,a
989 01e2 L553:
990 ; 288 }
993 01e2 5b04 addw sp,#4
994 01e4 81 ret
1051 ; 306 void UART2_IrDAConfig(UART2_IrDAMode_TypeDef UART2_IrDAMode)
1051 ; 307 {
1052 switch .text
1053 01e5 _UART2_IrDAConfig:
1057 ; 308 assert_param(IS_UART2_IRDAMODE_OK(UART2_IrDAMode));
1059 ; 310 if (UART2_IrDAMode != UART2_IRDAMODE_NORMAL)
1061 01e5 4d tnz a
1062 01e6 2705 jreq L124
1063 ; 312 UART2->CR5 |= UART2_CR5_IRLP;
1065 01e8 72145248 bset 21064,#2
1068 01ec 81 ret
1069 01ed L124:
1070 ; 316 UART2->CR5 &= ((u8)~UART2_CR5_IRLP);
1072 01ed 72155248 bres 21064,#2
1073 ; 318 }
1076 01f1 81 ret
1111 ; 337 void UART2_IrDACmd(FunctionalState NewState)
1111 ; 338 {
1112 switch .text
1113 01f2 _UART2_IrDACmd:
1117 ; 341 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1119 ; 343 if (NewState != DISABLE)
1121 01f2 4d tnz a
1122 01f3 2705 jreq L344
1123 ; 346 UART2->CR5 |= UART2_CR5_IREN;
1125 01f5 72125248 bset 21064,#1
1128 01f9 81 ret
1129 01fa L344:
1130 ; 351 UART2->CR5 &= ((u8)~UART2_CR5_IREN);
1132 01fa 72135248 bres 21064,#1
1133 ; 353 }
1136 01fe 81 ret
1195 ; 371 void UART2_LINBreakDetectionConfig(UART2_LINBreakDetectionLength_TypeDef UART2_LINBreakDetectionLength)
1195 ; 372 {
1196 switch .text
1197 01ff _UART2_LINBreakDetectionConfig:
1201 ; 373 assert_param(IS_UART2_LINBREAKDETECTIONLENGTH_OK(UART2_LINBreakDetectionLength));
1203 ; 375 if (UART2_LINBreakDetectionLength != UART2_LINBREAKDETECTIONLENGTH_10BITS)
1205 01ff 4d tnz a
1206 0200 2705 jreq L574
1207 ; 377 UART2->CR4 |= UART2_CR4_LBDL;
1209 0202 721a5247 bset 21063,#5
1212 0206 81 ret
1213 0207 L574:
1214 ; 381 UART2->CR4 &= ((u8)~UART2_CR4_LBDL);
1216 0207 721b5247 bres 21063,#5
1217 ; 383 }
1220 020b 81 ret
1341 ; 405 void UART2_LINConfig(UART2_LinMode_TypeDef UART2_Mode, UART2_LinAutosync_TypeDef UART2_Autosync, UART2_LinDivUp_TypeDef UART2_DivUp)
1341 ; 406 {
1342 switch .text
1343 020c _UART2_LINConfig:
1345 020c 89 pushw x
1346 00000000 OFST: set 0
1349 ; 407 assert_param(IS_UART2_SLAVE_OK(UART2_Mode));
1351 ; 409 assert_param(IS_UART2_AUTOSYNC_OK(UART2_Autosync));
1353 ; 411 assert_param(IS_UART2_DIVUP_OK(UART2_DivUp));
1355 ; 413 if (UART2_Mode != UART2_LIN_MODE_MASTER)
1357 020d 9e ld a,xh
1358 020e 4d tnz a
1359 020f 2706 jreq L755
1360 ; 415 UART2->CR6 |= UART2_CR6_LSLV;
1362 0211 721a5249 bset 21065,#5
1364 0215 2004 jra L165
1365 0217 L755:
1366 ; 419 UART2->CR6 &= ((u8)~UART2_CR6_LSLV);
1368 0217 721b5249 bres 21065,#5
1369 021b L165:
1370 ; 422 if (UART2_Autosync != UART2_LIN_AUTOSYNC_DISABLE)
1372 021b 7b02 ld a,(OFST+2,sp)
1373 021d 2706 jreq L365
1374 ; 424 UART2->CR6 |= UART2_CR6_LASE ;
1376 021f 72185249 bset 21065,#4
1378 0223 2004 jra L565
1379 0225 L365:
1380 ; 428 UART2->CR6 &= ((u8)~ UART2_CR6_LASE );
1382 0225 72195249 bres 21065,#4
1383 0229 L565:
1384 ; 431 if (UART2_DivUp != UART2_LIN_DIVUP_LBRR1)
1386 0229 7b05 ld a,(OFST+5,sp)
1387 022b 2706 jreq L765
1388 ; 433 UART2->CR6 |= UART2_CR6_LDUM;
1390 022d 721e5249 bset 21065,#7
1392 0231 2004 jra L175
1393 0233 L765:
1394 ; 437 UART2->CR6 &= ((u8)~ UART2_CR6_LDUM);
1396 0233 721f5249 bres 21065,#7
1397 0237 L175:
1398 ; 440 }
1401 0237 85 popw x
1402 0238 81 ret
1437 ; 460 void UART2_LINCmd(FunctionalState NewState)
1437 ; 461 {
1438 switch .text
1439 0239 _UART2_LINCmd:
1443 ; 462 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1445 ; 464 if (NewState != DISABLE)
1447 0239 4d tnz a
1448 023a 2705 jreq L116
1449 ; 467 UART2->CR3 |= UART2_CR3_LINEN;
1451 023c 721c5246 bset 21062,#6
1454 0240 81 ret
1455 0241 L116:
1456 ; 472 UART2->CR3 &= ((u8)~UART2_CR3_LINEN);
1458 0241 721d5246 bres 21062,#6
1459 ; 474 }
1462 0245 81 ret
1497 ; 493 void UART2_SmartCardCmd(FunctionalState NewState)
1497 ; 494 {
1498 switch .text
1499 0246 _UART2_SmartCardCmd:
1503 ; 495 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1505 ; 497 if (NewState != DISABLE)
1507 0246 4d tnz a
1508 0247 2705 jreq L336
1509 ; 500 UART2->CR5 |= UART2_CR5_SCEN;
1511 0249 721a5248 bset 21064,#5
1514 024d 81 ret
1515 024e L336:
1516 ; 505 UART2->CR5 &= ((u8)(~UART2_CR5_SCEN));
1518 024e 721b5248 bres 21064,#5
1519 ; 507 }
1522 0252 81 ret
1558 ; 527 void UART2_SmartCardNACKCmd(FunctionalState NewState)
1558 ; 528 {
1559 switch .text
1560 0253 _UART2_SmartCardNACKCmd:
1564 ; 529 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1566 ; 531 if (NewState != DISABLE)
1568 0253 4d tnz a
1569 0254 2705 jreq L556
1570 ; 534 UART2->CR5 |= UART2_CR5_NACK;
1572 0256 72185248 bset 21064,#4
1575 025a 81 ret
1576 025b L556:
1577 ; 539 UART2->CR5 &= ((u8)~(UART2_CR5_NACK));
1579 025b 72195248 bres 21064,#4
1580 ; 541 }
1583 025f 81 ret
1640 ; 559 void UART2_WakeUpConfig(UART2_WakeUp_TypeDef UART2_WakeUp)
1640 ; 560 {
1641 switch .text
1642 0260 _UART2_WakeUpConfig:
1646 ; 561 assert_param(IS_UART2_WAKEUP_OK(UART2_WakeUp));
1648 ; 563 UART2->CR1 &= ((u8)~UART2_CR1_WAKE);
1650 0260 72175244 bres 21060,#3
1651 ; 564 UART2->CR1 |= (u8)UART2_WakeUp;
1653 0264 ca5244 or a,21060
1654 0267 c75244 ld 21060,a
1655 ; 565 }
1658 026a 81 ret
1694 ; 585 void UART2_ReceiverWakeUpCmd(FunctionalState NewState)
1694 ; 586 {
1695 switch .text
1696 026b _UART2_ReceiverWakeUpCmd:
1700 ; 587 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1702 ; 589 if (NewState != DISABLE)
1704 026b 4d tnz a
1705 026c 2705 jreq L527
1706 ; 592 UART2->CR2 |= UART2_CR2_RWU;
1708 026e 72125245 bset 21061,#1
1711 0272 81 ret
1712 0273 L527:
1713 ; 597 UART2->CR2 &= ((u8)~UART2_CR2_RWU);
1715 0273 72135245 bres 21061,#1
1716 ; 599 }
1719 0277 81 ret
1742 ; 617 u8 UART2_ReceiveData8(void)
1742 ; 618 {
1743 switch .text
1744 0278 _UART2_ReceiveData8:
1748 ; 619 return ((u8)UART2->DR);
1750 0278 c65241 ld a,21057
1753 027b 81 ret
1776 ; 637 u16 UART2_ReceiveData9(void)
1776 ; 638 {
1777 switch .text
1778 027c _UART2_ReceiveData9:
1780 027c 89 pushw x
1781 00000002 OFST: set 2
1784 ; 639 return (u16)((((u16)UART2->DR) | ((u16)(((u16)((u16)UART2->CR1 & (u16)UART2_CR1_R8)) << 1))) & ((u16)0x01FF));
1786 027d c65244 ld a,21060
1787 0280 a480 and a,#128
1788 0282 5f clrw x
1789 0283 02 rlwa x,a
1790 0284 58 sllw x
1791 0285 1f01 ldw (OFST-1,sp),x
1792 0287 5f clrw x
1793 0288 c65241 ld a,21057
1794 028b 97 ld xl,a
1795 028c 01 rrwa x,a
1796 028d 1a02 or a,(OFST+0,sp)
1797 028f 01 rrwa x,a
1798 0290 1a01 or a,(OFST-1,sp)
1799 0292 a401 and a,#1
1800 0294 01 rrwa x,a
1803 0295 5b02 addw sp,#2
1804 0297 81 ret
1838 ; 661 void UART2_SendData8(u8 Data)
1838 ; 662 {
1839 switch .text
1840 0298 _UART2_SendData8:
1844 ; 664 UART2->DR = Data;
1846 0298 c75241 ld 21057,a
1847 ; 665 }
1850 029b 81 ret
1884 ; 684 void UART2_SendData9(u16 Data)
1884 ; 685 {
1885 switch .text
1886 029c _UART2_SendData9:
1888 029c 89 pushw x
1889 00000000 OFST: set 0
1892 ; 686 UART2->CR1 &= ((u8)~UART2_CR1_T8); /**< Clear the transmit data bit 8 */
1894 029d 721d5244 bres 21060,#6
1895 ; 687 UART2->CR1 |= (u8)(((u8)(Data >> 2)) & UART2_CR1_T8); /**< Write the transmit data bit [8] */
1897 02a1 54 srlw x
1898 02a2 54 srlw x
1899 02a3 9f ld a,xl
1900 02a4 a440 and a,#64
1901 02a6 ca5244 or a,21060
1902 02a9 c75244 ld 21060,a
1903 ; 688 UART2->DR = (u8)(Data); /**< Write the transmit data bit [0:7] */
1905 02ac 7b02 ld a,(OFST+2,sp)
1906 02ae c75241 ld 21057,a
1907 ; 690 }
1910 02b1 85 popw x
1911 02b2 81 ret
1934 ; 705 void UART2_SendBreak(void)
1934 ; 706 {
1935 switch .text
1936 02b3 _UART2_SendBreak:
1940 ; 707 UART2->CR2 |= UART2_CR2_SBK;
1942 02b3 72105245 bset 21061,#0
1943 ; 708 }
1946 02b7 81 ret
1980 ; 727 void UART2_SetAddress(u8 UART2_Address)
1980 ; 728 {
1981 switch .text
1982 02b8 _UART2_SetAddress:
1984 02b8 88 push a
1985 00000000 OFST: set 0
1988 ; 730 assert_param(IS_UART2_ADDRESS_OK(UART2_Address));
1990 ; 733 UART2->CR4 &= ((u8)~UART2_CR4_ADD);
1992 02b9 c65247 ld a,21063
1993 02bc a4f0 and a,#240
1994 02be c75247 ld 21063,a
1995 ; 735 UART2->CR4 |= UART2_Address;
1997 02c1 c65247 ld a,21063
1998 02c4 1a01 or a,(OFST+1,sp)
1999 02c6 c75247 ld 21063,a
2000 ; 736 }
2003 02c9 84 pop a
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -