📄 stm8s_adc1.ls
字号:
1 ; C Compiler for STM8 (COSMIC Software)
2 ; Generator V4.2.8 - 03 Dec 2008
3 ; Optimizer V4.2.8 - 03 Dec 2008
33 ; 65 void ADC1_DeInit(void)
33 ; 66 {
35 switch .text
36 0000 _ADC1_DeInit:
40 ; 67 ADC1->CSR = ADC1_CSR_RESET_VALUE;
42 0000 725f5400 clr 21504
43 ; 68 ADC1->CR1 = ADC1_CR1_RESET_VALUE;
45 0004 725f5401 clr 21505
46 ; 69 ADC1->CR2 = ADC1_CR2_RESET_VALUE;
48 0008 725f5402 clr 21506
49 ; 70 ADC1->CR3 = ADC1_CR3_RESET_VALUE;
51 000c 725f5403 clr 21507
52 ; 71 ADC1->TDRH = ADC1_TDRH_RESET_VALUE;
54 0010 725f5406 clr 21510
55 ; 72 ADC1->TDRL = ADC1_TDRL_RESET_VALUE;
57 0014 725f5407 clr 21511
58 ; 73 ADC1->HTRH = ADC1_HTRH_RESET_VALUE;
60 0018 35035408 mov 21512,#3
61 ; 74 ADC1->HTRL = ADC1_HTRL_RESET_VALUE;
63 001c 35ff5409 mov 21513,#255
64 ; 75 ADC1->LTRH = ADC1_LTRH_RESET_VALUE;
66 0020 725f540a clr 21514
67 ; 76 ADC1->LTRL = ADC1_LTRL_RESET_VALUE;
69 0024 725f540b clr 21515
70 ; 77 ADC1->AWCRH = ADC1_AWCRH_RESET_VALUE;
72 0028 725f540e clr 21518
73 ; 78 ADC1->AWCRL = ADC1_AWCRL_RESET_VALUE;
75 002c 725f540f clr 21519
76 ; 79 }
79 0030 81 ret
604 ; 115 void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel, ADC1_PresSel_TypeDef ADC1_PrescalerSelection, ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState ADC1_ExtTrigState, ADC1_Align_TypeDef ADC1_Align, ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState ADC1_SchmittTriggerState)
604 ; 116 {
605 switch .text
606 0031 _ADC1_Init:
608 0031 89 pushw x
609 00000000 OFST: set 0
612 ; 119 assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
614 ; 120 assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
616 ; 121 assert_param(IS_ADC1_PRESSEL_OK(ADC1_PrescalerSelection));
618 ; 122 assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger));
620 ; 123 assert_param(IS_FUNCTIONALSTATE_OK(((ADC1_ExtTrigState))));
622 ; 124 assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
624 ; 125 assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
626 ; 126 assert_param(IS_FUNCTIONALSTATE_OK(ADC1_SchmittTriggerState));
628 ; 131 ADC1_ConversionConfig(ADC1_ConversionMode, ADC1_Channel, ADC1_Align);
630 0032 7b08 ld a,(OFST+8,sp)
631 0034 88 push a
632 0035 7b02 ld a,(OFST+2,sp)
633 0037 95 ld xh,a
634 0038 cd0122 call _ADC1_ConversionConfig
636 003b 84 pop a
637 ; 133 ADC1_PrescalerConfig(ADC1_PrescalerSelection);
639 003c 7b05 ld a,(OFST+5,sp)
640 003e ad54 call _ADC1_PrescalerConfig
642 ; 138 ADC1_ExternalTriggerConfig(ADC1_ExtTrigger, ADC1_ExtTrigState);
644 0040 7b07 ld a,(OFST+7,sp)
645 0042 97 ld xl,a
646 0043 7b06 ld a,(OFST+6,sp)
647 0045 95 ld xh,a
648 0046 cd014f call _ADC1_ExternalTriggerConfig
650 ; 143 ADC1_SchmittTriggerConfig(ADC1_SchmittTriggerChannel, ADC1_SchmittTriggerState);
652 0049 7b0a ld a,(OFST+10,sp)
653 004b 97 ld xl,a
654 004c 7b09 ld a,(OFST+9,sp)
655 004e 95 ld xh,a
656 004f ad56 call _ADC1_SchmittTriggerConfig
658 ; 146 ADC1->CR1 |= ADC1_CR1_ADON;
660 0051 72105401 bset 21505,#0
661 ; 148 }
664 0055 85 popw x
665 0056 81 ret
700 ; 165 void ADC1_Cmd(FunctionalState NewState)
700 ; 166 {
701 switch .text
702 0057 _ADC1_Cmd:
706 ; 169 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
708 ; 171 if (NewState != DISABLE)
710 0057 4d tnz a
711 0058 2705 jreq L703
712 ; 173 ADC1->CR1 |= ADC1_CR1_ADON;
714 005a 72105401 bset 21505,#0
717 005e 81 ret
718 005f L703:
719 ; 177 ADC1->CR1 &= (u8)(~ADC1_CR1_ADON);
721 005f 72115401 bres 21505,#0
722 ; 180 }
725 0063 81 ret
760 ; 196 void ADC1_ScanModeCmd(FunctionalState NewState)
760 ; 197 {
761 switch .text
762 0064 _ADC1_ScanModeCmd:
766 ; 200 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
768 ; 202 if (NewState != DISABLE)
770 0064 4d tnz a
771 0065 2705 jreq L133
772 ; 204 ADC1->CR2 |= ADC1_CR2_SCAN;
774 0067 72125402 bset 21506,#1
777 006b 81 ret
778 006c L133:
779 ; 208 ADC1->CR2 &= (u8)(~ADC1_CR2_SCAN);
781 006c 72135402 bres 21506,#1
782 ; 211 }
785 0070 81 ret
820 ; 227 void ADC1_DataBufferCmd(FunctionalState NewState)
820 ; 228 {
821 switch .text
822 0071 _ADC1_DataBufferCmd:
826 ; 231 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
828 ; 233 if (NewState != DISABLE)
830 0071 4d tnz a
831 0072 2705 jreq L353
832 ; 235 ADC1->CR3 |= ADC1_CR3_DBUF;
834 0074 721e5403 bset 21507,#7
837 0078 81 ret
838 0079 L353:
839 ; 239 ADC1->CR3 &= (u8)(~ADC1_CR3_DBUF);
841 0079 721f5403 bres 21507,#7
842 ; 242 }
845 007d 81 ret
994 ; 262 void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState ADC1_ITEnable)
994 ; 263 {
995 switch .text
996 007e _ADC1_ITConfig:
998 007e 89 pushw x
999 00000000 OFST: set 0
1002 ; 266 assert_param(IS_ADC1_IT_OK(ADC1_IT));
1004 ; 267 assert_param(IS_FUNCTIONALSTATE_OK(ADC1_ITEnable));
1006 ; 269 if (ADC1_ITEnable != DISABLE)
1008 007f 7b05 ld a,(OFST+5,sp)
1009 0081 2706 jreq L144
1010 ; 272 ADC1->CSR |= (u8)ADC1_IT;
1012 0083 9f ld a,xl
1013 0084 ca5400 or a,21504
1015 0087 2006 jra L344
1016 0089 L144:
1017 ; 277 ADC1->CSR &= (u8)(~ADC1_IT);
1019 0089 7b02 ld a,(OFST+2,sp)
1020 008b 43 cpl a
1021 008c c45400 and a,21504
1022 008f L344:
1023 008f c75400 ld 21504,a
1024 ; 280 }
1027 0092 85 popw x
1028 0093 81 ret
1064 ; 297 void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler)
1064 ; 298 {
1065 switch .text
1066 0094 _ADC1_PrescalerConfig:
1068 0094 88 push a
1069 00000000 OFST: set 0
1072 ; 301 assert_param(IS_ADC1_PRESSEL_OK(ADC1_Prescaler));
1074 ; 304 ADC1->CR1 &= (u8)(~ADC1_CR1_SPSEL);
1076 0095 c65401 ld a,21505
1077 0098 a48f and a,#143
1078 009a c75401 ld 21505,a
1079 ; 306 ADC1->CR1 |= (u8)(ADC1_Prescaler);
1081 009d c65401 ld a,21505
1082 00a0 1a01 or a,(OFST+1,sp)
1083 00a2 c75401 ld 21505,a
1084 ; 308 }
1087 00a5 84 pop a
1088 00a6 81 ret
1136 ; 328 void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState ADC1_SchmittTriggerState)
1136 ; 329 {
1137 switch .text
1138 00a7 _ADC1_SchmittTriggerConfig:
1140 00a7 89 pushw x
1141 00000000 OFST: set 0
1144 ; 332 assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
1146 ; 333 assert_param(IS_FUNCTIONALSTATE_OK(ADC1_SchmittTriggerState));
1148 ; 335 if (ADC1_SchmittTriggerChannel == ADC1_SCHMITTTRIG_ALL)
1150 00a8 9e ld a,xh
1151 00a9 a11f cp a,#31
1152 00ab 261d jrne L505
1153 ; 337 if (ADC1_SchmittTriggerState != DISABLE)
1155 00ad 9f ld a,xl
1156 00ae 4d tnz a
1157 00af 270a jreq L705
1158 ; 339 ADC1->TDRL &= (u8)0x0;
1160 00b1 725f5407 clr 21511
1161 ; 340 ADC1->TDRH &= (u8)0x0;
1163 00b5 725f5406 clr 21510
1165 00b9 2065 jra L315
1166 00bb L705:
1167 ; 344 ADC1->TDRL |= (u8)0xFF;
1169 00bb c65407 ld a,21511
1170 00be aaff or a,#255
1171 00c0 c75407 ld 21511,a
1172 ; 345 ADC1->TDRH |= (u8)0xFF;
1174 00c3 c65406 ld a,21510
1175 00c6 aaff or a,#255
1176 00c8 2053 jp LC001
1177 00ca L505:
1178 ; 348 else if (ADC1_SchmittTriggerChannel < ADC1_SCHMITTTRIG_CHANNEL8)
1180 00ca 7b01 ld a,(OFST+1,sp)
1181 00cc a108 cp a,#8
1182 00ce 0d02 tnz (OFST+2,sp)
1183 00d0 2426 jruge L515
1184 ; 350 if (ADC1_SchmittTriggerState != DISABLE)
1186 00d2 2714 jreq L715
1187 ; 352 ADC1->TDRL &= (u8)(~(u8)((u8)0x01 << (u8)ADC1_SchmittTriggerChannel));
1189 00d4 5f clrw x
1190 00d5 97 ld xl,a
1191 00d6 a601 ld a,#1
1192 00d8 5d tnzw x
1193 00d9 2704 jreq L43
1194 00db L63:
1195 00db 48 sll a
1196 00dc 5a decw x
1197 00dd 26fc jrne L63
1198 00df L43:
1199 00df 43 cpl a
1200 00e0 c45407 and a,21511
1201 00e3 LC002:
1202 00e3 c75407 ld 21511,a
1204 00e6 2038 jra L315
1205 00e8 L715:
1206 ; 356 ADC1->TDRL |= (u8)((u8)0x01 << (u8)ADC1_SchmittTriggerChannel);
1208 00e8 5f clrw x
1209 00e9 97 ld xl,a
1210 00ea a601 ld a,#1
1211 00ec 5d tnzw x
1212 00ed 2704 jreq L04
1213 00ef L24:
1214 00ef 48 sll a
1215 00f0 5a decw x
1216 00f1 26fc jrne L24
1217 00f3 L04:
1218 00f3 ca5407 or a,21511
1219 00f6 20eb jp LC002
1220 00f8 L515:
1221 ; 361 if (ADC1_SchmittTriggerState != DISABLE)
1223 00f8 2713 jreq L525
1224 ; 363 ADC1->TDRH &= (u8)(~(u8)((u8)0x01 << ((u8)ADC1_SchmittTriggerChannel - (u8)8)));
1226 00fa a008 sub a,#8
1227 00fc 5f clrw x
1228 00fd 97 ld xl,a
1229 00fe a601 ld a,#1
1230 0100 5d tnzw x
1231 0101 2704 jreq L44
1232 0103 L64:
1233 0103 48 sll a
1234 0104 5a decw x
1235 0105 26fc jrne L64
1236 0107 L44:
1237 0107 43 cpl a
1238 0108 c45406 and a,21510
1240 010b 2010 jp LC001
1241 010d L525:
1242 ; 367 ADC1->TDRH |= (u8)((u8)0x01 << ((u8)ADC1_SchmittTriggerChannel - (u8)8));
1244 010d a008 sub a,#8
1245 010f 5f clrw x
1246 0110 97 ld xl,a
1247 0111 a601 ld a,#1
1248 0113 5d tnzw x
1249 0114 2704 jreq L05
1250 0116 L25:
1251 0116 48 sll a
1252 0117 5a decw x
1253 0118 26fc jrne L25
1254 011a L05:
1255 011a ca5406 or a,21510
1256 011d LC001:
1257 011d c75406 ld 21510,a
1258 0120 L315:
1259 ; 371 }
1262 0120 85 popw x
1263 0121 81 ret
1320 ; 393 void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel, ADC1_Align_TypeDef ADC1_Align)
1320 ; 394 {
1321 switch .text
1322 0122 _ADC1_ConversionConfig:
1324 00000000 OFST: set 0
1327 ; 397 assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
1329 ; 398 assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
1331 ; 399 assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
1333 ; 402 ADC1->CR2 &= (u8)(~ADC1_CR2_ALIGN);
1335 0122 72175402 bres 21506,#3
1336 0126 89 pushw x
1337 ; 404 ADC1->CR2 |= (u8)(ADC1_Align);
1339 0127 c65402 ld a,21506
1340 012a 1a05 or a,(OFST+5,sp)
1341 012c c75402 ld 21506,a
1342 ; 406 if (ADC1_ConversionMode == ADC1_CONVERSIONMODE_CONTINUOUS)
1344 012f 9e ld a,xh
1345 0130 4a dec a
1346 0131 2606 jrne L755
1347 ; 409 ADC1->CR1 |= ADC1_CR1_CONT;
1349 0133 72125401 bset 21505,#1
1351 0137 2004 jra L165
1352 0139 L755:
1353 ; 414 ADC1->CR1 &= (u8)(~ADC1_CR1_CONT);
1355 0139 72135401 bres 21505,#1
1356 013d L165:
1357 ; 418 ADC1->CSR &= (u8)(~ADC1_CSR_CH);
1359 013d c65400 ld a,21504
1360 0140 a4f0 and a,#240
1361 0142 c75400 ld 21504,a
1362 ; 420 ADC1->CSR |= (u8)(ADC1_Channel);
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