📄 sp6608.h
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// ,FFFE, FFFF. After the timer reaches 'FFFF', and INT signal is generated// and is sent to INT controller for processing. At the same time, N will be// reloaded into timer and count up again.#define P_Tmr_Ctrl 0x701A// Source of Timer B// 000 - Fosc// 001 - Fosc/2// 010 - Fosc/4// 010 - 32768// 100 - T32KHz (4KHz,8KHz,16KHz,32KHz)// 101 - T2KHz (256Hz,512Hz,1KHz,2KHz)// TMB_En 110 - T128Hz (16Hz,32Hz,64Hz,128Hz)// 0 - disable 111 - T8Hz (1Hz,2Hz,4Hz,8Hz)// 1 - enable (P_TimeBaseSet, 0x7018)// 5432 1098 7654 XXXX// 0101 0101 0101 0000 <- at off-line sleep// TMA_En Source 1 of Timer A// 0 - disable 00 - External Clock (IOD0)// 1 - enable 01 - 0Hz (VDD)// TMA_Ctrl 10 - T128Hz (16Hz,32Hz,64Hz,128Hz)// 0 - TMA_Sel 11 - T8Hz (1Hz,2Hz,4Hz,8Hz)// 1 - source1,2 Source 2 of Timer A// TMA_Sel 000 - External Clock (IOD1)// 0 - Fosc 001 - 0Hz (VDD)// 1 - Timer B Overflow 010 - Fosc/2// 011 - Fosc/4// 100 - Fosc/8// 101 - 32768// P_TimeBaseSet 110 - T32KHz (4KHz,8KHz,16KHz,32KHz)// (0x7018) 111 - T2KHz (256Hz,512Hz,1KHz,2KHz)#define P_TmrA_Data 0x701B // R/W, up-counter#define P_TmrA_Load 0x701C // W, write any value to load data to timer A#define P_TmrB_Data 0x701E // R/W, up-counter#define P_TmrB_Load 0x701F // W, write any value to load data to timer B//----------------------------------------------------------------------------------*/// Low Voltage Detect *///----------------------------------------------------------------------------------*/#define P_BatDet 0x7021 // XXXX XXXX 765X X210 // 00x0 0000 -> at off-line sleep // adjust low-battery threshold // 0002.2V, 0012.3V, 0102.4V, 0112.5V // 1002.6V, 1012.7V, 1102.8V, 1112.9V // 0 - voltage is lower than threshold // 1 - voltage is higher than threshold // 0 - detect battery voltage (*) // 1 - detect VDD voltage // 0/1- disable/enable battery detect // 50us is a must to get detect result !!!//----------------------------------------------------------------------------------*/// DTMF & Tone Generator *///----------------------------------------------------------------------------------*/#define P_DtmfTone 0x7022// XXXX XX78 7654 3210// Select Dac1 or DAC2 00 0000 0000 -> at off-line sleep// DAC enable // enable DTMF column frequency DTMF row frequency select// Tone1 enable Tone0 enable// DTMF column frequency select enable DTMF row frequency//================================================================================= #define B_DtmfColEn 0x0080#define B_Tone1En 0x0040#define B_DtmfRowEn 0x0008#define B_Tone0En 0x0004#define B_DacEn 0x0100#define B_Dac2Sel 0x0200//================================================================================= #define P_Ch0Envelope 0x7023 // 5432 1098 XXXX XXXX // envelope output#define P_Ch1Envelope 0x7024 // 5432 1098 XXXX XXXX // envelope output//----------------------------------------------------------------------------------*/// A/D & AGC *///----------------------------------------------------------------------------------*/#define P_AgcCtrl 0x7025 // XXXX XXXX 7XXX 3210 // 0000 -> at off-line sleep // auto gain control // 0001 - Gain 1/2 // 0011 - Gain 2 // 0111 - Gain 8 // 1111 - Gain 32 // enable ADC quick charge #define B_AdcQuickCharge 0x0080#define P_AdcCtrl 0x7026 // XXXX XXXX 76XX XXXX // 00 -> at off-line sleep // A/D sampling rate select (R/W) // 0/1 - 8K / TimerA (<8K) // enable AGC & ADC (R/W)#define P_Adc 0x7027 // (R) 8-bit ADC (b15~b8) // 5432 1098 XXXX XXXX // ADC result#define P_Dac0 0x7029 // (R) 10-bit ADC (b15~b6) #define P_RiDet 0x7028 // (R/W) // XXXX XXXX 76XX XXXX // 1xxx xx -> at off-line sleep // 00 - ring wake-up/interrupt at falling edge // 01 - ring wake-up/interrupt at rising edge // 1x - ring wake-up/interrupt at both edges // 0/1 - ring is on/off (read only) // 0/1 - disable/enable built-in ring detector#define B_RiDet 0x0040#define B_EnRiDet 0x0080//----------------------------------------------------------------------------------*/// L C D *///----------------------------------------------------------------------------------*/#define P_LcdCtrl 0x7020 // XXXX XXXX 7654 3210 // 1100 xxxx -> at off-line sleep // adjust LCD supply voltage // 00002.7V, 00012.8V, 00102.9V, 00113.0V // 01003.1V, 01013.2V, 01103.3V, 01113.4V // 10003.5V, 10013.6V, 10103.7V, 10113.8V // 11003.9V, 11014.0V, 11104.1V, 11114.2V // turn off all dots of LCD // turn on all dots of LCD // turn on charge pump of LCD // enable LCD // After powering on, enable charge pump (b61) at first, but do not // enable LCD (b70) for the time being. After a 10ms delay for bias // generation circuit stabilzation, enable LCD (b71)//================================================================================= #define B_PumpEn 0x0040 // First, enable LCD charge pump#define B_LcdEn 0x0080 // Next, after a 10ms delay, enable LCD#define B_LcdAllOn 0x0020#define B_LcdAllOff 0x0010#define B_Com0 0x0001#define B_Com1 0x0002#define B_Com2 0x0004#define B_Com3 0x0008#define B_Com4 0x0010#define B_Com5 0x0020#define B_Com6 0x0040#define B_Com7 0x0080#define P_Seg0 0x7100#define P_Seg1 0x7101#define P_Seg2 0x7102#define P_Seg3 0x7103#define P_Seg4 0x7104#define P_Seg5 0x7105#define P_Seg6 0x7106#define P_Seg7 0x7107#define P_Seg8 0x7108#define P_Seg9 0x7109#define P_Seg10 0x710A#define P_Seg11 0x710B#define P_Seg12 0x710C#define P_Seg13 0x710D#define P_Seg14 0x710E#define P_Seg15 0x710F#define P_Seg16 0x7110#define P_Seg17 0x7111#define P_Seg18 0x7112#define P_Seg19 0x7113#define P_Seg20 0x7114#define P_Seg21 0x7115#define P_Seg22 0x7116#define P_Seg23 0x7117#define P_Seg24 0x7118#define P_Seg25 0x7119#define P_Seg26 0x711A#define P_Seg27 0x711B//================================================================================= //----------------------------------------------------------------------------------*/// SPLC501 Interference *///----------------------------------------------------------------------------------*/#define P_Lcd501Ctrl 0x7040#define P_Lcd501Data 0x7041#define P_Lcd501ReadData 0x7041#define P_Lcd501BdySelect 0x7042//----------------------------------------------------------------------------------*/// SPR1024 Interference *///----------------------------------------------------------------------------------*/#define P_SerialFlashData 0x7030#define P_SerialFlashAddr1 0x7031#define P_SerialFlashAddr2 0x7032#define P_SerialFlashAddr3 0x7033#define P_SerialFlashCtrl 0x7034#define P_SerialFlashStart 0x7035#define P_SerialFlashStop 0x7036#define B_SerialFlashWorking 0x0080#define P_UARTCmd1 0x7049#define P_UARTCmd2 0x704A#define CMask_UARTAcRDY 0x0001#define P_UARTData 0x704B#define P_UARTBR_Low 0x704C //Set clock/M#define P_UARTBR_High 0x704D#define P_UARTABR_Low 0x704E //System clock/4 2.8M Hz/4700kHz#define CB_UARTBpsLow 0x0058#define P_UARTABR_High 0x704F#define CB_UARTBpsHigh 0x0002#endif
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