📄 dsp281x_device.h
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//###########################################################################
//
// FILE: DSP281x_Device.h
//
// TITLE: DSP281x Device Definitions.
//
//###########################################################################
//
// Ver | dd mmm yyyy | Who | Description of changes
// =====|=============|======|===============================================
// 1.00| 11 Sep 2003 | L.H. | Changes since previous version (v.58 Alpha)
// | | | Added symbols created by the linker
// | | | cmd file for relocating code.
// | | | Added float to the datatype typedefs
// | | | Added #if DSP28_DATA_TYPES wrapper around the
// | | | typedefs
// | | | Added DSP28_BIOS and DSP28_NONBIOS switches
// | | | to include or not include the default ISR's
// | | | Moved files and info specific to the DSP28 examples
// | | | to DSP28_common\include\DSP28_Examples.h
// | | | Changed F2812 -> DSP28_F2812
// | | | Changed F2810 -> DSP28_F2810
//###########################################################################
#ifndef DSP281x_DEVICE_H
#define DSP281x_DEVICE_H
#ifdef __cplusplus
extern "C" {
#endif
#define TARGET 1
#define N 32
//---------------------------------------------------------------------------
// User To Select Target Device:
#define DSP28_F2812 TARGET
#define DSP28_F2810 0
#define CLK_IN 32E6
#define PLL_DIV 0x3
#define HSP_DIV 0x1
#define LSP_DIV 0x2
#define CPU_FREQ CLK_IN*PLL_DIV
#define HSP_FREQ CPU_FREQ/(HSP_DIV*2)
#define LSP_FREQ CPU_FREQ/(LSP_DIV*2)
//---------------------------------------------------------------------------
// Common CPU Definitions:
//
extern cregister volatile unsigned int IFR;
extern cregister volatile unsigned int IER;
#define EINT asm(" clrc INTM")
#define DINT asm(" setc INTM")
#define ERTM asm(" clrc DBGM")
#define DRTM asm(" setc DBGM")
#define EALLOW asm(" EALLOW")
#define EDIS asm(" EDIS")
#define ESTOP0 asm(" ESTOP0")
#define M_INT1 0x0001
#define M_INT2 0x0002
#define M_INT3 0x0004
#define M_INT4 0x0008
#define M_INT5 0x0010
#define M_INT6 0x0020
#define M_INT7 0x0040
#define M_INT8 0x0080
#define M_INT9 0x0100
#define M_INT10 0x0200
#define M_INT11 0x0400
#define M_INT12 0x0800
#define M_INT13 0x1000
#define M_INT14 0x2000
#define M_DLOG 0x4000
#define M_RTOS 0x8000
#define BIT0 0x0001
#define BIT1 0x0002
#define BIT2 0x0004
#define BIT3 0x0008
#define BIT4 0x0010
#define BIT5 0x0020
#define BIT6 0x0040
#define BIT7 0x0080
#define BIT8 0x0100
#define BIT9 0x0200
#define BIT10 0x0400
#define BIT11 0x0800
#define BIT12 0x1000
#define BIT13 0x2000
#define BIT14 0x4000
#define BIT15 0x8000
//---------------------------------------------------------------------------
// For Portability, User Is Recommended To Use Following Data Type Size
// Definitions For 16-bit and 32-Bit Signed/Unsigned Integers:
//
#ifndef DSP28_DATA_TYPES
#define DSP28_DATA_TYPES
typedef int int16;
typedef long int32;
typedef unsigned int Uint16;
typedef unsigned long Uint32;
typedef float float32;
typedef long double float64;
#endif
//-----------------------------------------------------------------------------
// define for contol
struct RTC_TIME
{
unsigned int year;
unsigned int month;
unsigned int date;
unsigned int day;
unsigned int hour;
unsigned int minute;
unsigned int second;
};
struct FLAG_BITS
{
unsigned int param :1; //0: send param
unsigned int lock :1; //1: lock from PPC
unsigned int exopbit:6; //2: start machine ->open average
//3: stop machine -> close average
//4: Uc+= 0.01
//5: Uc-= 0.01
//6: Uc+= 0.1
//7: Uc-= 0.1
unsigned int ipustat1:1; //8: ipu1 is online
unsigned int ipustat2:1; //9: ipu2 is online
unsigned int ipustat3:1; //10:ipu3 is online
unsigned int ipu1 :1; //11: 0/1 shifting to IPU1 normal sending
unsigned int ipu2 :1; //12: 0/1 shifting to IPU2 normal sending
unsigned int ipu3 :1; //13: 0/1 shifting to IPU3 normal sending
unsigned int avr :1; //14: 0/1 shifting to Avr1 normal sending
unsigned int statuab :1; //15: in A else in B
};
union FLAG_REG
{
unsigned int all;
struct FLAG_BITS bit;
};
struct CTRL_BITS
{
unsigned int mast :1; //0: avr is master
unsigned int ipu1 :1; //1: ipu1 is bakup
unsigned int ipu2 :1; //2: ipu2 is bakup
unsigned int ipu3 :1; //3: ipu3 is bakup
unsigned int lawpss :1; //4: pss active
unsigned int lawloec :1; //5: loec active
unsigned int lawnoec :1; //6: noec active
unsigned int keepUc :1; //7: open system
unsigned int keepQe :1; //8: DQe=0
unsigned int automan :1; //9: auto/manual for open system
unsigned int avgperm :1; //10: average permission
unsigned int fing :1; //11: enable intergral
unsigned int monitor :1; //12: monitor
unsigned int run :1; //13: run
unsigned int rsd :2; //14-15: rsd
};
union CTRL_REG
{
unsigned int all;
struct CTRL_BITS bit;
};
struct DATASAMPLE
{
int VoltageAB[N];
int VoltageBC[N];
int VoltageCA[N];
int VoltageAB1[N];
int VoltageBC1[N];
int VoltageCA1[N];
int CurrentIF[N];
int VoltageUF[N];
int CurrentIA[N];
int CurrentIC[N];
int CurrentIFA[N];
int CurrentIFC[N];
int VoltageUSA[N];
int VoltageURESA[N];
int Extend[N];
int VoltStand[N];
};
struct PORT_INPUT_BITS
{
unsigned int PD0 :1; //0 +
unsigned int PD1 :1; //1 -
unsigned int PB2 :1; //2 FMK
unsigned int PB3 :1; //3 MK
unsigned int PB4 :1; //4 STAR
unsigned int PB5 :1; //5 STOP
unsigned int PD5 :1; //6 RST
unsigned int PB7 :1; //7 PSS
unsigned int PD6 :1; //8 AUTO
unsigned int PB9 :1; //9 MAST
unsigned int PB10:1; //10 PROT
unsigned int PB11:1; //11 MONITRO
unsigned int PB12:1; //12 AVER
unsigned int PB13:1; //13 DC POWER
unsigned int PB14:1; //14 AC POWER
unsigned int PB15:1; //15 DQe
unsigned int PE0 :1; //16 DCos
unsigned int PE1 :1; //17 DUc
unsigned int PE2 :1; //18
unsigned int rsd :7; //19-25
unsigned int PF10:1; //26
unsigned int PF11:1; //27
unsigned int PF12:1; //28 A/B set
unsigned int PF13:1; //29
unsigned int PF14:1; //30 unavalabel
unsigned int rsd1:1; //31
};
/*union PORT_INPUT_REG1
{
unsigned int all;
struct PORT_INPUT_BITS1 bit;
};
union PORT_INPUT_REG2
{
unsigned int all;
struct PORT_INPUT_BITS2 bit;
};
struct PORT_INPUT_REGS
{
union PORT_INPUT_REG1 lowword;
union PORT_INPUT_REG2 highword;
};
*/
union PORT_INPUT_REG
{
unsigned long all;
struct PORT_INPUT_BITS bit;
};
//---------------------------------------------------------------------------
// Include All Peripheral Header Files:
//
#include "DSP281x_SysCtrl.h" // System Control/Power Modes
#include "DSP281x_DevEmu.h" // Device Emulation Registers
#include "DSP281x_Xintf.h" // External Interface Registers
#include "DSP281x_CpuTimers.h" // 32-bit CPU Timers
#include "DSP281x_DefaultIsr.h" // Software Prioritization for PIE Interrupts
#include "DSP281x_PieCtrl.h" // PIE Control Registers
#include "DSP281x_PieVect.h" // PIE Vector Table
#include "DSP281x_Spi.h" // SPI Registers
#include "DSP281x_Sci.h" // SCI Registers
#include "DSP281x_Mcbsp.h" // McBSP Registers
#include "DSP281x_ECan.h" // Enhanced eCAN Registers
#include "DSP281x_Gpio.h" // General Purpose I/O Registers
#include "DSP281x_Ev.h" // Event Manager Registers
#include "DSP281x_Adc.h" // ADC Registers
#include "DSP281x_XIntrupt.h" // External Interrupts
#ifdef __cplusplus
}
#endif /* extern "C" */
#endif // end of DSP281x_DEVICE_H definition
//===========================================================================
// No more.
//===========================================================================
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