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📄 music.txt

📁 任选一段乐谱在实验箱上实现自动演奏。本实验以《梁祝》中化蝶部分的乐曲演奏为例
💻 TXT
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1. 底层元件PULSE的VHDL逻辑描述:
-------PULSE元件
	LIBRARY IEEE;
	USE IEEE.STD_LOGIC_1164.ALL;
	USE IEEE.STD_LOGIC_UNSIGNED.ALL;
	ENTITY  PULSE  IS
	    PORT(CLK: IN  STD_LOGIC;
	          D: IN  STD_LOGIC_VECTOR( 13  DOWNTO  0);
	          FOUT:  OUT  STD_LOGIC);
	END  ENTITY  PULSE;
	ARCHITECTURE  BEHAV  OF  PULSE  IS
	    SIGNAL  COUNT :  STD_LOGIC_VECTOR(13  DOWNTO  0);
	    SIGNAL  CAO, CAO1 , CAO2 , LOAD:  STD_LOGIC;
	BEGIN
	    PROCESS(CLK , LOAD , D)
	    BEGIN
	        IF  CLK’EVENT AND CLK=’1’ THEN
	            IF LOAD=’1’ THEN COUNT<=D;
	                  ELSE COUNT<=COUNT-1;
	            END IF;
	        END IF;
	END  PROCESS;
	PROCESS(COUNT)
	BEGIN
	    IF COUNT=0 THEN CAO<=’1’;
	        ELSE CAO<=’0’;
	    END IF;
	    LOAD<=CAO;
	END PROCESS;
	PROCESS(CLK)
	BEGIN
	    IF CLK’EVENT AND CLK=’1’ THEN CAO1<=CAO;
	    END IF;
	END PROCESS;
	PROCESS(CAO1)
	BEGIN
	    IF CAO1’EVENT AND CAO1=’1’ THEN CAO2<=NOT CAO2;
	    END IF;
	FOUT<=CAO2;
	END PROCESS;
    END  ARCHITECTURE  BEHAV;

2. 底层元件TABLE的VHDL逻辑描述: 
	LIBRARY IEEE;
	USE IEEE.STD_LOGIC_1164.ALL;
	ENTITY  TABLE  IS
	    PORT(CLK: IN  STD_LOGIC;
	          AF: OUT  INTEGER RANGE 0 TO 16#3FFF#)
	END  ENTITY  TABLE;
	ARCHITECTURE ONE OF TABLE IS
	    CONSTANT LOW_3: INTEGER:=9100;
	    CONSTANT LOW_5: INTEGER:=7652; 
	CONSTANT LOW_6: INTEGER:=6817;
	CONSTANT LOW_7: INTEGER:=6073;
	CONSTANT MID_1: INTEGER:=5732;
	CONSTANT MID_2: INTEGER:=5107;
	CONSTANT MID_3: INTEGER:=4550; 
	CONSTANT MID_5: INTEGER:=3826;
	CONSTANT MID_6: INTEGER:=3408;
	CONSTANT HIGH_1: INTEGER:=2866;
	CONSTANT STOP: INTEGER:= 0;
	SIGNAL COUNTER: INTEGER RANGE 0 TO 138;
	BEGIN 
	PROCESS(CLK)
	BEGIN   
	    IF COUNTER=138 THEN COUNTER<=0;
	        ELSIF CLK’EVENT AND CLK=’1’ THEN COUNTER<=COUNTER+1;
	    END IF;
	END PROCESS;
	PROCESS(COUNTER)
	BEGIN
	    CASE COUNTER IS
	        WHEN 00=>AF<=LOW_3;
	        WHEN 01=>AF<=LOW_3;
	        WHEN 02=>AF<=LOW_3;
	        WHEN 03=>AF<=LOW_3;
	        WHEN 04=>AF<=LOW_5;
	        WHEN 05=>AF<=LOW_5;
	WHEN 06=>AF<=LOW_5;
	WHEN 07=>AF<=LOW_6;
	WHEN 08=>AF<= MID_1;
	WHEN 09=>AF<= MID _1;
	WHEN 10=>AF<= MID _1;
	WHEN 11=>AF<= MID _2;
	      ---------
	WHEN 134=>AF<=LOW_5;
	WHEN 135=>AF<=LOW_5;
	WHEN 136=>AF<=STOP;
	WHEN 137=>AF<=STOP;
	WHEN 138=>AF<=STOP;
	WHEN OTHERS=>NULL;
        END CASE;
	END PROCESS;
	END  ARCHITECTURE  ONE;

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