lle_gpio.h

BCM 控制demo源代码

/*******************************************************************************/
/**
Copyright (c) 2007 Freescale Semiconductor
\file       lle_GPIO.h
\brief      GPIO pin assignment.
\author     Freescale Semiconductor
\author     B05114
\version    0.1
\date       April/30/2007
*/
/*******************************************************************************/

#ifndef _LLE_GPIO_H
#define _LLE_GPIO_H

/** S12X derivative information */ 
#include <MC9S12XEP100.h>    


/* Interrupt switches */
#define	IRQ2	    /* PE0/XIRQ */
#define	IRQ1	    /* KWP3 */

/* Serial Peripheral Interface SPI1 */
#define	SCLK_MCU	/* SCK1 */
#define	MOSI_MCU	/* MOSI1 */
#define	MISO_MCU	/* MISO1 */

/* Serial Communication Interface */
#define	RX_MAX202	/* PJ0/RXD2 */
#define	TX_MAX202	/* PJ1/TXD2 */

/* I2C */
#define	SCL	        /* SCL1 */
#define	SDA	        /* SDA1 */


/* General purpose switches */
#define	S1	                PORTC_PC7   /* PC7 */
#define	S2	                PORTC_PC6   /* PC6 */

/* SBC: MC33742 pin assignment */
#define	CS_MC33742	        PORTB_PB4   /* PB4 */
#define	WDOG_MC33742	    PORTB_PB5   /* PB5 */
#define	RST_MC33742	        /* RST */
#define	INT_MC33742 	    /* IRQ */  
#define	CAN3_RX	            /* PM6/RXCAN3 */
#define	CAN3_TX	            /* PM7/TXCAN3 */

/* MSDI I: MC33972 pin assignment */
#define	CS_MC33972_I	    PORTD_PD5   /* PD5 */
#define	INT_MC33972_I       /* KWH4 */
#define	AMUX_MC33972_I	    8   /* AN08 */

/* MSDI II: MC33972 pin assignment */
#define	CS_MC33972_II	    PORTD_PD4   /* PD4 */
#define	INT_MC33972_II	    /* KWJ2 */
#define	AMUX_MC33972_II	    1   /* AN01 */


/* COSS: MC33879 pin assignment */
#define	CS_MC33879	        PORTB_PB0   /* PB0 */
#define	EN_MC33879	        PORTB_PB1   /* PB1 */
#define	PWM_IN6_MC33879 	/* PWM7 */
#define	PWM_IN5_MC33879	    /* PWM6 */


/* High Side Switch: MC10XS3412 */
#define	RST_MC10XS3412	    PORTK_PK4   /* PK4 */
#define	CS_MC10XS3412	    PORTC_PC3   /* PC3 */
#define	IN0_MC10XS3412	    PTT_PTT7    /* IOC7 */
#define	IN1_MC10XS3412	    PTT_PTT6    /* IOC6 */
#define	IN2_MC10XS3412	    PTT_PTT5    /* IOC5 */
#define	IN3_MC10XS3412	    PTT_PTT4    /* IOC4 */
#define	FS_MC10XS3412	    PTH_PTH7    /* KWH7 */
#define	CSNS_MC10XS3412	    /* AN10 */

/* High Side Switch: MC15XS3400 */
#define	RST_MC15XS3400	    PORTK_PK6   /* PK6 */
#define	CS_MC15XS3400	    PORTC_PC1   /* PC1 */
#define	IN0_MC15XS3400	    PTT_PTT0    /* IOC0 */
#define	IN1_MC15XS3400	    PORTK_PK2   /* PK2 */
#define	IN2_MC15XS3400      PORTK_PK1	/* PK1 */
#define	IN3_MC15XS3400	    PORTK_PK0   /* PK0 */
#define	FS_MC15XS3400	    PTH_PTH5    /* KWH5 */
#define	CSNS_MC15XS3400	    /* AN09 */

/* High Side Switch: MC35XS3400 */
#define	RST_MC35XS3400	    PORTK_PK5   /* PK5 */
#define	CS_MC35XS3400	    PORTC_PC2   /* PC2 */
#define	IN0_MC35XS3400	    PTT_PTT3    /* IOC3 */
#define	IN1_MC35XS3400	    PTT_PTT2    /* IOC2 */
#define	IN2_MC35XS3400	    PTT_PTT1    /* IOC1 */
#define	IN3_MC35XS3400	    PORTK_PK3   /* PK3 */
#define	FS_MC35XS3400	    PTH_PTH6    /* KWH6 */
#define	CSNS_MC35XS3400	    /* AN02 */

/* MC33887 */
#define	D1_MC33887	        PORTB_PB2   /* PB2 */
#define	EN_MC33887	        PORTB_PB3   /* PB3 */
#define	FB_MC33887	        /* AN03 */
#define	IN2_MC33887	        PTP_PTP5    /* PWM5 */
#define	IN1_MC33887	        PTP_PTP4    /* PWM4 */


/* LIN channels */
#define	LIN0_RX	            PTS_PTS0    /* PS0/RXD0 */
#define	LIN0_TX 	        PTS_PTS1    /* PS1/TXD0 */

#define	LIN1_RX	            PTS_PTS2    /* PS2/RXD1 */
#define	LIN1_TX	            PTS_PTS3    /* PS3/TXD1 */

#define	LIN2_RX	            PTH_PTH2    /* PH2/RXD7 */
#define	LIN2_TX	            PTH_PTH3    /* PH3/TXD7 */
#define	LIN2_EN	            PORTB_PB7   /* PB7 */

#define	LIN3_TX	            PTH_PTH1    /* PH1/TXD6 */
#define	LIN3_RX	            PTH_PTH0    /* PH0/RXD6 */
#define	LIN3_EN 	        PORTB_PB6   /* PB6 */

#define	LIN4_RX	            /* PS0/RXD0 */
#define	LIN4_TX 	        /* PS1/TXD0 */
#define	LIN4_EN	            PORTD_PD7   /* PD7 */

#define	LIN5_RX	            /* PS0/RXD0 */
#define	LIN5_TX 	        /* PS1/TXD0 */
#define	LIN5_EN	            PORTD_PD6   /* PD6 */


/* CAN modules */
#define	CAN0_NERR	        PT1AD0_PT1AD05  /* PAD05 */
#define	CAN0_NSTB       	PT1AD0_PT1AD07  /* PAD07 */
#define	CAN0_EN	            PT1AD1_PT1AD12  /* PAD18 */
#define	CAN0_TX	            /* PM1/TXCAN0 */
#define	CAN0_RX	            /* PM0/RXCAN0 */

#define	CAN1_NERR	        PT0AD0_PT0AD04  /* PAD12 */
#define	CAN1_NSTB	        PT0AD0_PT0AD06  /* PAD14 */
#define	CAN1_EN	            PT1AD1_PT1AD11  /* PAD17 */
#define	CAN1_RX	            /* PM2/RXCAN1 */
#define	CAN1_TX	            /* PM3/TXCAN1 */

#define	CAN2_NERR           PT1AD0_PT1AD04  /* PAD04 */
#define	CAN2_NSTB	        PT1AD0_PT1AD06  /* PAD06 */
#define	CAN2_EN	            PT1AD1_PT1AD10  /* PAD16 */
#define	CAN2_RX	            /* PM4/RXCAN2 */
#define	CAN2_TX	            /* PM5/TXCAN2 */

#define	CAN4_NERR	        PT0AD0_PT0AD03  /* PAD11 */
#define	CAN4_NSTB	        PT0AD0_PT0AD05  /* PAD13 */
#define	CAN4_EN	            PT0AD0_PT0AD07  /* PAD15 */
#define	CAN4_RX	            /* PJ6/RXCAN4 */
#define	CAN4_TX	            /* PJ7/TXCAN4 */


#define	MODE_MC33696	    PORTD_PD0  /* PD0 */
#define	CONFB_MC33696	    PORTD_PD1   /* PD1 */
#define	STROBE_MC33696	    PORTD_PD2   /* PD2 */

#define	MISO_MC33696_MCU	/* MISO0 */
#define	MOSI_MC33696_MCU	/* MOSI0 */
#define	SCLK_MC33696_MCU	/* SCK0 */
#define	CS_MC33696	        /* SS0 */


#endif /* _LLE_GPIO_H */

/*******************************************************************************/