des_mc33696.h

BCM 控制demo源代码

#define ECHO_TC7H	*(volatile unsigned char *)(ECHO_TIMER_ADDRESS+16\
					 +(2*7)+0)
					 						/* Channel 7 IC/OC Register H	 */
#define ECHO_TC7L	*(volatile unsigned char *)(ECHO_TIMER_ADDRESS+16\
					 +(2*7)+1)
					 						/* Channel 7 IC/OC Register L	 */
					 						

/* Timer control reg masks */
#define ECHO_TIMER_ON	0x80				/* OR this value to tmr control  */
											/* reg 1 to enable clock		 */
#define ECHO_TIMER_OFF	0x7F				/* AND this value to tmr control */
											/* reg 1 to disable clock		 */

#define ECHO_IC_OC	((1 << ECHO_TIMER_CHANNEL) | 0x80)	/* IC/OC select mask */
										/* for selected channel + channel 7  */

#define ECHO_TIMER_INT	(1 << ECHO_TIMER_CHANNEL)		/* Interrupt mask	 */
														/* TIE, TFLG1 regs.	 */

#define ECHO_TCRE		0x08			/* Timer counter reset enable		 */

#if ECHO_TIMER_CHANNEL > 3										
	#define ECHO_TIMER_PIN_OFF		(0x03 << (2*(ECHO_TIMER_CHANNEL-4)))    
													/* Turn off channel pin	 */
	#define ECHO_CLEAR_ON_COMPARE	(0x02 << (2*(ECHO_TIMER_CHANNEL-4)))
    												/* Output a 0 NRZ 		 */
	#define ECHO_SET_ON_COMPARE		(0x03 << (2*(ECHO_TIMER_CHANNEL-4)))
    												/* Output a 1 NRZ 		 */
#elif ECHO_TIMER_CHANNEL < 4
	#define ECHO_TIMER_PIN_OFF		(0x03 << (2*ECHO_TIMER_CHANNEL))
													/* Turn off channel pin	 */
	#define ECHO_CLEAR_ON_COMPARE	(0x02 << (2*ECHO_TIMER_CHANNEL))
													/* Output a 0 NRZ 		 */
	#define ECHO_SET_ON_COMPARE		(0x03 << (2*ECHO_TIMER_CHANNEL))
													/* Output a 1 NRZ 		 */
#endif

/* Miscellaneous timer calculations			   								 */
/* #if ECHO_TIMER_CLOCK_SOURCE == 3	*/
/*	#define ECHO_TIMER_CLK_IN_CHANNEL	0*/ 
										/* Timer channel used for clk in	 */
										/* (usually timer ch 0 on HCS08) 	 */
										/* Delete if not using clk input 	 */
// #endif


/******************************************************************************
* This part may need changed to include 304MHz and 916MHz bands...						
******************************************************************************/
#if ECHO_BAND_VALUE == ECHO_F315MHz
	#define ECHO_DIGCLK_DIVISOR		30
	#define ECHO_DATACLK_DIVISOR	60
#else
	#define ECHO_DIGCLK_DIVISOR		40          		/* 434/868MHz band 	 */
	#define ECHO_DATACLK_DIVISOR	80
#endif
/*****************************************************************************/


/* #ifdef ECHO_TIMER_CLK_IN_CHANNEL */	/* If using an external clock source */
/*	#if ECHO_USE_DATACLK == 1
		#undef ECHO_TIMER_CLOCK_SPEED
		#define ECHO_TIMER_CLOCK_SPEED	(ECHO_CRYSTAL_FREQUENCY\
										 /ECHO_DATACLK_DIVISOR)
	#endif
#endif																		 */

/* Calculate the modulus and values											 */
#define ECHO_TIMER_MODULUS  ((ECHO_TIMER_CLOCK_SPEED/ECHO_DATA_RATE)\
							 /ECHO_TIMER_PRESCALE)

#define ECHO_HALF_TIMER_MODULUS		(ECHO_TIMER_MODULUS/2)

#define ECHO_MODH	(ECHO_TIMER_MODULUS/256)
#define ECHO_MODL	(ECHO_TIMER_MODULUS)

#define ECHO_COMH	(ECHO_HALF_TIMER_MODULUS/256)
#define ECHO_COML	(ECHO_HALF_TIMER_MODULUS)

/* Number of bit times for greater than 2ms power on delay (2ms => 500Hz) 	 */
#define ECHO_2MS_DELAY  (((ECHO_TIMER_CLOCK_SPEED/500)/ECHO_TIMER_MODULUS)+1)

/* Number of bit times for 1.2ms Echo config power on delay (1.2ms => 833Hz) */
#define ECHO_1200uS_DELAY  ((ECHO_DATA_RATE/833)+1)

/* Number of bit times for 500 microsecond Tx->Rx mode switch delay 		 */
/* (500uS => 2000Hz)														 */
#define ECHO_500uS_DELAY	((ECHO_DATA_RATE/2000)+1)

/* Number of bit-times for a 200 us preamble period							 */
/* (+1 to make sure >200 us)												 */
/* Also need additional half-bit added because of the way PREAMBLE_1 state	 */ 
/* is implemented:  ast count is cut short to 1/2 bit-time by PWM low true 	 */
/* pulse. Hence, 1 + 1/2 = 3/2 = 7500/5000									 */
#define ECHO_PREAMBLE_200uS		((ECHO_DATA_RATE+7500)/5000)

/* Number of ticks for RSSIC to stay high (around 53 us)					 */
//#define ECHO_RSSIC_TICKS	((32*((ECHO_DIGCLK_DIVISOR*ECHO_TIMER_CLOCK_SPEED)\
//							  /ECHO_CRYSTAL_FREQUENCY)/ECHO_TIMER_PRESCALE)+1)
#define ECHO_RSSIC_TICKS	(((55*ECHO_TIMER_CLOCK_SPEED)/(1000000\
							   *ECHO_TIMER_PRESCALE))+1)

/* Number of ticks for an ADC conversion (max. 60 us)				 */
#define ECHO_ATD_TICKS		(((60*ECHO_TIMER_CLOCK_SPEED)/(1000000\
							   *ECHO_TIMER_PRESCALE))+1)


/******************************************************************************
* Echo registers
******************************************************************************/ 

#define ECHO_CONFIG1_REG	0
#define ECHO_CONFIG2_REG	1
#define ECHO_CONFIG3_REG	2
#define ECHO_COMMAND_REG	3
#define ECHO_F1_REG			4
#define ECHO_F0_REG			5
#define ECHO_FT2_REG		6
#define ECHO_FT1_REG		7
#define ECHO_FT0_REG		8
#define ECHO_RXONOFF_REG	9
#define ECHO_ID_REG			10
#define ECHO_HEADER_REG		11
#define ECHO_RSSI_REG		12

/*Register: CONFIG2*/
#define ECHO_BIT_FRM		0x40
#define ECHO_BIT_TRXE		0x04

/*Register: COMMAND*/
#define ECHO_BIT_FAGC		0x02
#define ECHO_BIT_RAGC		0x04
#define ECHO_BIT_RSSIE		0x10
#define ECHO_BIT_MODE		0x20
#define ECHO_BIT_IFLA		0x40

/*  CONFIG1 byte															 */
/* This macro constructs the CONFIG1 byte									 */
#define ECHO_CONFIG1_REG_VALUE	(ECHO_LOF_CF_VALUE | ECHO_SWITCH_LEVEL << 2\
								| ECHO_LVD_ENABLE << 1 | ECHO_USE_DATACLK)

/* CONFIG2 byte																 */
/* This macro constructs the CONFIG2 byte									 */
#define ECHO_CONFIG2_REG_VALUE	(ECHO_MODE_OOKREF << 7 | ECHO_MODE_VALUE << 5\
				| ECHO_DR_VALUE << 3 | ECHO_DME_VALUE << 1 | ECHO_SOE_VALUE)

/* CONFIG3 byte - no setup necessary, power/sensitivity controls can be		 */
/*				  setup post init											 */
#define ECHO_CONFIG3_REG_VALUE	0x00

/* COMMAND byte - setup to Echo default values								 */
#define ECHO_COMMAND_REG_VALUE	0x09

/* F and FT registers - default values										 */
#define ECHO_F1_REG_VALUE		0x48
#define ECHO_F0_REG_VALUE		0x00

#define ECHO_FT2_REG_VALUE		0x70
#define ECHO_FT1_REG_VALUE		0x07
#define ECHO_FT0_REG_VALUE		0x01

/* RXONOFF byte - constructed from RXON and RXOFF							 */
#define ECHO_RXONOFF_REG_VALUE	(ECHO_RXON_VALUE << 3 | ECHO_RXOFF_VALUE)

/* ID byte - constructed from ID length and the ID itself					 */
#if ECHO_ID_LENGTH == 8
	#define ECHO_ID_REG_VALUE	(ECHO_IDL << 6 | ((ECHO_ID_VALUE>>2) & 0x3F))
#else
	#define ECHO_ID_REG_VALUE	(ECHO_IDL << 6 | (ECHO_ID_VALUE & 0x3F))
#endif

/* HEADER byte - constructed from Header length and the header itself		 */
#define ECHO_HEADER_REG_VALUE	(ECHO_HDL << 6 | (ECHO_HEADER_VALUE & 0x3F))
																			
/* RSSI byte - read only													 */
#define ECHO_RSSI_REG_VALUE		0x00
 

/******************************************************************************
* Status, States and Functions
******************************************************************************/

#define ECHO_BUFFER_FULL	0x80		/* Mask for Rx buffer full flag		 */
#define ECHO_CHECKSUM_ERROR	0x80		/* Mask for Rx checksum error		 */
#define ECHO_RSSI_BIT		0x20		/* Mask for RSSI present flag		 */

typedef union
{
	unsigned char Byte;
	struct
	{
		unsigned char IDHeaderSelect	:1;			/* 0 = Send ID,		 	 */
													/* 1 = Send Header	 	 */
		unsigned char CompleteSend		:1;			/* 0 = Single seq	 	 */
													/* 1 = Complete telegram */
		unsigned char IDRepeat			:1; 		/* 0 = Single ID		 */
													/* 1 = Repeat ID		 */
		unsigned char reserved			:5;
	}Bits;
}tECHO_TXCONFIG;

typedef union
{
	unsigned int Word;
	struct {
		unsigned char ByteH;
		unsigned char ByteL;
	}Bytes;
	struct
	{
		unsigned int EnableDelay	:1;	/* 1 = Echo powering up				 */
		unsigned int ModeSwitchDelay:1;	/* 1 = Echo switching modes			 */
		unsigned int RSSI_Enabled	:1;	/* 1 = RSSI enabled, 0 = RSSI dis.	 */
		unsigned int RSSI_InProgress:1;	/* 1 = RSSI being read				 */
		unsigned int Error			:1;	/* 1 = Error occured eg config while 
										 	   in Tx						 */
		unsigned int LVD			:1;	/* 1 = Low Voltage Detected			 */
		unsigned int Timeout		:1;	/* 1 = Timeout from an Rx state 	 
										       occured						 */
		unsigned int reserved		:1;	/* Reserved							 */

		unsigned int Enabled		:1;	/* 1 = Echo enabled, 0 = Echo dis.	 */
		unsigned int Busy			:1;	/* 1 = Echo busy, 0 = Echo idle		 */
		unsigned int MsgReady		:1;	/* 1 = Message waiting, 0 = no msg   */
		unsigned int Tx				:1;	/* 1 = Transmitting					 */
		unsigned int Rx				:1;	/* 1 = Receiving					 */
		unsigned int Checksum		:1; /* 1 = Current msg has a checksum 
											   error						 */
		unsigned int Overrun		:1; /* 1 = Msg buffer overrun, last msg 
											   lost							 */
		unsigned int Mode			:1;	/* 1 = Tx Mode, 0 = Rx Mode			 */
	}Bits;
}tECHO_STATUS;

/* Masks for status bits													 */
#define ECHO_STATUS_ENABLED				0x0001
#define ECHO_STATUS_BUSY				0x0002
#define ECHO_STATUS_MSGREADY			0x0004
#define ECHO_STATUS_TX					0x0008
#define ECHO_STATUS_RX					0x0010
#define ECHO_STATUS_CHECKSUM			0x0020
#define ECHO_STATUS_OVERRUN				0x0040
#define ECHO_STATUS_MODE				0x0080
#define ECHO_STATUS_ENABLEDELAY			0x0100
#define ECHO_STATUS_MODESWITCHDELAY		0x0200
#define ECHO_STATUS_RSSI_ENABLED		0x0400
#define ECHO_STATUS_RSSI_INPROGRESS		0x0800
#define ECHO_STATUS_ERROR				0x1000
#define ECHO_STATUS_LVD					0x2000
#define ECHO_STATUS_TIMEOUT				0x4000

/* Driver delay states														 */
#define ECHO_ENABLE_DELAY		0
#define ECHO_TXRX_SWITCH_DELAY	2

/* Tx state machine states													 */
#define ECHO_STARTUP		3
#define ECHO_RXTX_SWITCH	1
#define ECHO_PREAMBLE_1		4
#define ECHO_PREAMBLE_2		5
#define ECHO_SENDID			6
#define ECHO_SENDHEADER		25
#define ECHO_SENDDATA		7
#define ECHO_SENDCHECKSUM	20
#define ECHO_EXTRA_BIT		8
#define ECHO_EOM_1			9
#define ECHO_EOM_2			10
#define ECHO_SWITCHBACK		17
#define ECHO_END_NOSWITCH	19
#define ECHO_END			11
#define ECHO_WAIT			18 

/* Rx state machine states													 */
#define ECHO_READY			12
#define ECHO_READ_DATA		13
#define ECHO_LAST_BYTE		14
#define ECHO_READ_RSSI_1	15
#define ECHO_READ_RSSI_2	16


#define ECHO_CONFIG_DELAY	21
#define ECHO_DO_CONFIG		22

#define ECHO_READ_DIGITAL_RSSI	23
#define ECHO_READ_ANALOGUE_RSSI	24

/* Function prototypes														 */
void Echo_Initialize(void);

void Echo_Enable(void);
void Echo_Disable(void);

tECHO_STATUS Echo_DriverStatus(void);

void Echo_ClearError(void);

void Echo_SendPreambleID(void);
void Echo_SendData(void);
void Echo_SendMessage(void);
void Echo_SendIDRepeat(unsigned char repeatCount);

void Echo_StrobeHigh(void);
void Echo_StrobeLow(void);
void Echo_StrobeTriState(void);

interrupt void Echo_TxTimer_Interrupt(void);
interrupt void Echo_RxSPI_Interrupt(void);

#if ECHO_MODE_VALUE == ECHO_OOK
	void Echo_SetFreq(unsigned int carrier);
	void Echo_SetFreqNoFRM(unsigned int localOscillator, \
						   unsigned int carrier0);
#else
	void Echo_SetFreq(unsigned int carrier, unsigned char deltaF);
	void Echo_SetFreqNoFRM(unsigned int localOscillator,
						   unsigned int carrier0,
						   unsigned int carrier1);
#endif

#ifdef ECHO_RSSIC
	void Echo_EnableRSSI(void);
	void Echo_DisableRSSI(void);
	void Echo_ReadDigitalRSSI(void);
	void Echo_ReadAnalogueRSSI(void);
#endif

void Echo_SetRxSensitivity(unsigned char level);
void Echo_SetTxPower(unsigned char level);

void Echo_RagcHigh(void);
void Echo_RagcLow(void);
void Echo_FagcHigh(void);
void Echo_FagcLow(void);

void Echo_ChangeConfig(unsigned char numReg,
					   unsigned char startReg,
					   unsigned char *regData,
					   unsigned char readWrite
					   );

#endif