cb_generator.pl

altera 公司内部PWM的HDL及驱动代码

sub generator_end
{
  # o.k., time to make the wrapper and output it.
  if($generator_hr->{wrapper_args}{make_wrapper}){
    &_generator_make_module_wrapper();
  }

  
  my $external_args_hr = $generator_hr->{external_args_hr};
  my $ptf_file_name = $external_args_hr->{system_directory}."/".$external_args_hr->{system_name}.".ptf";
  &generator_print_verbose("generator_end: writing PTF file ".$external_args_hr->{system_name}.".ptf to ".$external_args_hr->{system_directory}."\n");

  default_ribbit("Cannot write PTF file ".$ptf_file_name."!\n")
    unless(&write_ptf_file($generator_hr->{system_ptf_hr}, $external_args_hr->{system_directory}."/".$external_args_hr->{system_name}.".ptf"));  
}

sub generator_end_read_module_wrapper_string
{
   my $language = &generator_get_language();
   my $ls;

   if($language =~ /vhdl/){
     $ls = ".vhd";
   }elsif($language =~ /verilog/){
     $ls = ".v";
   }else{
     &ribbit("generator_end_read_module_wrapper_string invoked with unkown language");
   }
   my $system_dir = $generator_hr->{external_args_hr}->{system_directory};
   my $module_name = $generator_hr->{external_args_hr}->{target_module_name};

   my $file = $system_dir."/".$module_name.$ls;
   &generator_print_verbose("generator library reading file into string: $file\n");

   open (FILE,"<$file") or ribbit "cannot open file ($file) ($!)\n";
   my $return_string;
   while (<FILE>)
   {
      $return_string .= $_;
   }
   close (FILE);
   return($return_string);
}

sub generator_end_write_module_wrapper_string
{
   my $string = shift or ribbit "no string specified\n";

   my $language = &generator_get_language();
   my $ls;

   print $language;

   if($language =~ /vhdl/){
     $ls = ".vhd";
   }elsif($language =~ /verilog/){
     $ls = ".v";
   }else{
     &ribbit("generator_end_read_module_wrapper_string invoked with unkown language");
   }
   my $system_dir = $generator_hr->{external_args_hr}->{system_directory};
   my $module_name = $generator_hr->{external_args_hr}->{target_module_name};

   my $file = $system_dir."/".$module_name.$ls;
   &generator_print_verbose("generator library writing string into file: $file\n");

   open (FILE,">$file") or ribbit "cannot open file ($file) ($!)\n";
   print FILE $string;
   close (FILE);
}
# end of generator_library.pm





#
#
#
#
# ---------------------------------------------------------------------

# +----------------------------------------------------
# | emit_system_h
# |
# | if "is_cpu", attempt to emit a system.h
# | memory map.
# |

sub emit_system_h($$$)
    {
    my ($sopc_directory,$master,$system_ptf) = (@_);

    # |
    # | Build a system.h file for masters.
    # |


# as of quartus 5.0, we prefer gtf-generate in sopc_builder directly

    my $gtf_generate = "$sopc_directory/bin/gtf-generate";
    my $gtf_filename = "$sopc_directory/bin/gtf/system.h.gtf";
    
    if(! -f $gtf_generate)
    	{
    	# but if sopc_builder is missing it for whatever reason,
    	# try the one in sopc_kit_nios2
    	
	    my $sopc_kit_nios2 = $ENV{SOPC_KIT_NIOS2};
	    if($sopc_kit_nios2 ne "")
	    	{
	    	$gtf_generate = "$sopc_kit_nios2/bin/gtf-generate";
    		$gtf_filename = "$sopc_kit_nios2/bin/gtf/system.h.gtf";
    		}
    	}

    # |
    # | xml template
    # |

    my $stf_template = <<EOP;
<?xml version="1.0" encoding="UTF-8"?>
<stf>
<!-- This file generated on --date-- by --whoami-- -->
    <project name="--project_name--"
             ptf="--system_ptf--"
             dir="--output_directory--"
    />
    <cpu name="--master--" />
</stf>

EOP

    # |
    # | THINK
    # |

    my $output_directory = "./${master}_map";
    my $project_name = "ignored";
    my $stf_filename = "./${master}_project.stf";

    # |
    # | build up template variables
    # |

    my %template_vars;
    $template_vars{date} = fcu_date_time();
    $template_vars{whoami} = $0;
    $template_vars{project_name} = $project_name;
    $template_vars{system_ptf} = $system_ptf;
    $template_vars{output_directory} = $output_directory;
    $template_vars{master} = $master;

    # |
    # | poke in the values to the template
    # |

    foreach my $key (sort(keys(%template_vars)))
        {
        $stf_template =~ s/--$key--/$template_vars{$key}/gs;
        }

    ## debug print $stf_template;

    # |
    # | write out the stf file, so we can soon use it
    # |

    fcu_write_file($stf_filename,$stf_template);

    # |
    # | and use it
    # |

    if(-e $gtf_generate && -e $gtf_filename)
        {

        my $generate_cmd = $gtf_generate;

        $generate_cmd .= " --output-directory=$output_directory";
        $generate_cmd .= " --gtf=$gtf_filename";
        $generate_cmd .= " --stf=$stf_filename";

        r_system($sopc_directory,$generate_cmd);
    
        # |
        # | done with it
        # |

        r_system($sopc_directory,"rm $stf_filename");

        fcu_print_command("Generated memory map \"$output_directory/system.h\"");
        }
    else
        {
        fcu_print_command("Warning: did NOT emit system.h for $master");
        }




    }


sub r_system($$)
    {
    my ($sopc_directory,$cmd) = (@_);
    fcu_print_command($cmd);
    return Run_Command_In_Unix_Like_Shell($sopc_directory,$cmd);
    }







# +------------------------------------------
# | synthesis and simulation files are are
# | listed in CLASS/CB_GENERATOR/HDL_FILES.
# |

sub get_synthesis_files($)
    {
    my ($class_ptf) = (@_);
    my $synthesis_files = "";
    my $simulation_files = "";

    my $hdl_files = get_child_by_path($class_ptf,"CLASS/CB_GENERATOR/HDL_FILES");
    my $child_count = get_child_count($hdl_files);
    for(my $i = 0; $i < $child_count; $i++)
        {
        my $hdl_file = get_child($hdl_files,$i);
        if(get_name($hdl_file) eq "FILE")
            {
            my $filename = get_data_by_path($hdl_file,"filepath");
            my $use_in_synthesis = get_data_by_path($hdl_file,"use_in_synthesis");
            my $use_in_simulation = get_data_by_path($hdl_file,"use_in_simulation");

            if($use_in_synthesis)
                {
                $synthesis_files .= ", " if $synthesis_files;
                $synthesis_files .= $filename;
                }

            if($use_in_simulation)
                {
                $simulation_files .= ", " if $simulation_files;
                $simulation_files .= $filename;
                }
            }
        }

    return $synthesis_files;
    }








sub main
    {

    push(@ARGV,"--verbose=1") if 0;
    my %args = fcu_parse_args(@ARGV);
    
    if(0)
    	{
    	foreach my $key (sort(keys(%args)))
    		{
    		print("--$key = $args{$key} \n");
    		}
    	}

    # |
    # | get the arguments we care about
    # |

    my $class_dir = fcu_get_switch(\%args,"module_lib_dir");


    my $target_module_name = fcu_get_switch(\%args,"target_module_name");
    my $system_name = fcu_get_switch(\%args,"system_name");
    my $sopc_directory = fcu_get_switch(\%args,"sopc_directory");

    # |
    # | preflight the arguments a little
    # |

    my $error_count = 0;

    my $class_ptf_path = "$class_dir/class.ptf";
    if(!-f $class_ptf_path)
        {
        print "error: no class.ptf at \"$class_dir\"\n";
        $error_count++;
        }

    die "$error_count errors" if($error_count > 0);

    # +-------------------------------------------
    # | ok, let us get to work
    # |


    my $class_ptf = new_ptf_from_file($class_ptf_path);

    # |
    # | emit system.h for this module
    # | TODO iff Is_CPU i guess.
    # |

    my $do_emit_system_h = get_data_by_path($class_ptf,
            "CLASS/CB_GENERATOR/emit_system_h");
    if($do_emit_system_h)
        {
        emit_system_h($sopc_directory,
                $target_module_name,
                "./$system_name.ptf");
        }
    
    my $top_module_name = get_data_by_path($class_ptf,
            "CLASS/CB_GENERATOR/top_module_name");
    my $file_name = "";
    
    # | stored as file_name.v:module_name, so we break it open
    if($top_module_name =~ /^(.*):(.*)$/)
        {
        $file_name = $1;
        my $module_name = $2;
        $top_module_name = $module_name;
        }
    
    # | language of this particular module...

    my $module_language = "verilog";
    if($file_name =~ /^.*\.vhd$/)
    	{
    	$module_language = "vhdl";
    	}
    
    # |
    # | consult the CB_GENERATOR/HDL_FILES section regarding
    # | where our HDL files for synthesis are.
    # |
     

    my $synthesis_files = get_synthesis_files($class_ptf);

    
    my $instantiate_in_system_module = get_data_by_path($class_ptf,
    	"CLASS/MODULE_DEFAULTS/SYSTEM_BUILDER_INFO/Instantiate_In_System_Module");



	if($instantiate_in_system_module)
		{
	    generator_enable_mode ("terse");


	    generator_begin (@ARGV);


	    generator_make_module_wrapper(1,$top_module_name,$module_language);

	    generator_copy_files_and_set_system_ptf
    	        (
        	    "simulation_and_quartus", 
                split(/ *, */,$synthesis_files)
#            	"$synthesis_files"
          	  );

		generator_end ();
		}

    exit (0);
    }

$| = 1;  # always polite to flush.
main()

# end of file