init.s

s3c4510B 的一些实验成功的程序,对初学者有很大帮助

;**************************************************************
;	
;	This an simple implementation of  bootloader for S3C4510B
;	Hope it is useful to you.
;	
;	Duyunhai use this program to UART0
;	
;	Enjoy it! 
;
;**************************************************************

LOOPNUM		EQU		0x02
 
        AREA    Init, CODE, READONLY
		CODE32
		GET snds.s
		
        ENTRY
start

;Part 1
;***************************************************************
;disable interrupts in CPU and switch to SVC32 mode

	MRS	r0, cpsr
	BIC	r0, r0, #MASK_MODE
	ORR	r0, r0, #MODE_SVC32
	ORR r0, r0, #I_BIT
	ORR r0, r0, #F_BIT
	MSR	cpsr_c, r0

	LDR	r2, =ARM7_INTMASK			 ;R2->interrupt controller
	MVN	r1, #0						 ;&FFFFFFFF
	STR	r1, [r2]					 ;disable all interrupt soucres

	LDR	r2, =ARM7_INTPEND			 ;R2->interrupt pend register.
	MVN	r1, #0						 ;&FFFFFFFF
	STR	r1, [r2]					 ;clear all interrupt flags.

;Part 2
;****************************************************************

	LDR	r0, =ARM7_SYSCFG
	LDR	r1, =0xE7FFFF80				;//0x87ffffA0				;config SYSCFG
	STR	r1, [r0] 					;Cache & WB disabled

;Part 3
;***************************************************************
;	Import some important variables for later use

    IMPORT |Image$$RO$$Base|    
	IMPORT |Image$$RO$$Limit|   
	IMPORT |Image$$RW$$Base|   
	IMPORT |Image$$RW$$Limit| 	
	IMPORT |Image$$ZI$$Base| 	
	IMPORT |Image$$ZI$$Limit| 

;Part 4
;****************************************************************
;Initalize the memory as followa:
;	FLASH			@ 0  ~ 2 M
;	SDRAM			@ 2  ~ 18M

	LDR	r1, =0x00003000				;//rEXTDBWTH 				;EXTDBWTH          		
	LDR	r2, =0x04000060				;//rROMCON0  				;ROMCON0	@ 0M ~ 2M	
	LDR	r3, =rROMCON1				;ROMCON1	@ DISABLED
	LDR	r4, =rROMCON2				;ROMCON1	@ DISABLED
	LDR	r5, =rROMCON3				;ROMCON1	@ DISABLED
	LDR	r6, =rROMCON4				;ROMCON1	@ DISABLED
	LDR	r7, =rROMCON5				;ROMCON1	@ DISABLED
	LDR	r8, =0x14010380				;//rSDRAMCON0				;SDRAMCON0 	@ 2M ~ 18M
	LDR	r9, =rSDRAMCON1				;SDRAMCON1 	@ DISABLED
	LDR	r10,=rSDRAMCON2				;SDRAMCON2 	@ DISABLED
	LDR	r11,=rSDRAMCON3				;SDRAMCON3 	@ DISABLED
	LDR	r12,=0xCE3383FD				;//rSREFEXTCON			
	
	LDR	r0, =ARM7_EXTDBWTH 			
	STMIA	r0, {r1-r12}

;Part 5
;***************************************************************
;Self copy from FLASH to SDRAM

	LDR		r0, =|Image$$RO$$Base|      
	LDR		r1, =|Image$$RO$$Limit|      
	LDR		r2, =|Image$$RW$$Base|      
	LDR		r3, =|Image$$RW$$Limit|     

	SUB 	r1, r1, r0
	SUB		r3, r3, r2
	ADD		r1, r1, r3
	
	LDR		r2, =0x400000		;//0x200000   ;@2M
	
COPY
	LDR		r3, [r0], #4
	STR		r3, [r2], #4
	SUBS	r1, r1,   #4
	BNE		COPY
 
;Part 6
****************************************************************
;Remap the memory
; 	FLASH	@ 16 ~ 18M 
; 	SDRAM	@ 0  ~ 16M
  
	LDR	r1, =0x00003000				;//rEXTDBWTH_R 			;EXTDBWTH          		
	LDR	r2, =0x14040060				;//rROMCON0_R  	16-20M		;ROMCON0	@ 16M ~ 18M	
	LDR	r3, =rROMCON1_R				;ROMCON1	@ DISABLED
	LDR	r4, =rROMCON2_R				;ROMCON2	@ DISABLED
	LDR	r5, =rROMCON3_R				;ROMCON3	@ DISABLED
	LDR	r6, =rROMCON4_R				;ROMCON4	@ DISABLED
	LDR	r7, =rROMCON5_R				;ROMCON4	@ DISABLED
	LDR	r8, =0x10000380				;//rSDRAMCON0_R			;SDRAMCON0 	@ 0M ~ 16M
	LDR	r9, =rSDRAMCON1_R			;SDRAMCON1 	@ DISABLED
	LDR	r10,=rSDRAMCON2_R			;SDRAMCON2 	@ DISABLED
	LDR	r11,=rSDRAMCON3_R			;SDRAMCON3 	@ DISABLED
	LDR	r12,=0xCE3383FD				;//rSREFEXTCON_R			

	LDR	r0, =ARM7_EXTDBWTH 			
	STMIA	r0, {r1-r12}

;Part 7
;*****************************************************************
; Copy RW & ZI to SDRAM

	LDR r0, =|Image$$RO$$Limit| 	
	LDR r1, =|Image$$RW$$Base| 		
	LDR r3, =|Image$$ZI$$Base| 		

	CMP r0, r1 
	BEQ %1
 
0 	CMP r1, r3 						; Copy init data
	LDRCC r2, [r0], #4
	STRCC r2, [r1], #4
	BCC %0

1 	LDR r1, =|Image$$ZI$$Limit| 	; Top of zero init segment
	MOV r2, #0

2 	CMP r3, r1 						; Zero init
	STRCC r2, [r3], #4
	BCC %2

;Part 8

	LDR		SP,=0x3FE1000

	IMPORT	Main
	LDR		pc, =Main

	END