davincihd.qsf

DaVinci HD CPLD Firmware Resources 这是TI原装开发板DM6467原理图的 CPLD的VHDL代码

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		davincihd_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:11:12  SEPTEMBER 30, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION "7.2 SP2"

# Pin & Location Assignments
# ==========================

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "<None>"
set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name TOP_LEVEL_ENTITY davincihd

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EPM240GT100C5
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"

# EDA Netlist Writer Assignments
# ==============================
set_global_assignment -name EDA_SIMULATION_TOOL "<None>"

# Assembler Assignments
# =====================
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS OUTPUT DRIVING AN UNSPECIFIED SIGNAL"
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF

# ---------------------------------------------
# start EDA_TOOL_SETTINGS(eda_design_synthesis)

	# Analysis & Synthesis Assignments
	# ================================

# end EDA_TOOL_SETTINGS(eda_design_synthesis)
# -------------------------------------------

# ---------------------------------------
# start EDA_TOOL_SETTINGS(eda_simulation)

	# EDA Netlist Writer Assignments
	# ==============================

# end EDA_TOOL_SETTINGS(eda_simulation)
# -------------------------------------

set_location_assignment PIN_28 -to ARM_EMU_RSTn
set_location_assignment PIN_7 -to ATA_BUFF_PWR
set_location_assignment PIN_5 -to ATA_CTL_BUFF_ONn
set_location_assignment PIN_4 -to ATA_DATA_BUFF_ONn
set_location_assignment PIN_6 -to ATA_RESETn
set_location_assignment PIN_47 -to CPLD_DC_ALT_VCXO_ENn
set_location_assignment PIN_42 -to CPLD_DC_VCXO_CLK_ENn
set_location_assignment PIN_76 -to CPU_PORz
set_location_assignment PIN_75 -to CPU_RESETz
set_location_assignment PIN_92 -to CTL_PCI_DETECTn
set_location_assignment PIN_40 -to DC_ALT_VCXO_EN
set_location_assignment PIN_82 -to DC_P3_DETECTn
set_location_assignment PIN_41 -to DC_VCXO_CLK_EN
set_location_assignment PIN_91 -to DRV_VBUS
set_location_assignment PIN_86 -to EXT_EMIF_MODE
set_location_assignment PIN_26 -to GPIO_IR_EN
set_location_assignment PIN_16 -to GP01
set_location_assignment PIN_17 -to GP02
set_location_assignment PIN_18 -to GP03
set_location_assignment PIN_19 -to GP04
set_location_assignment PIN_20 -to GP06
set_location_assignment PIN_21 -to GP07
set_location_assignment PIN_81 -to HDD_PWR_EN
set_location_assignment PIN_27 -to I2C_INTn
set_location_assignment PIN_100 -to I2C_SDA_OUT
set_location_assignment PIN_51 -to IR_IN
set_location_assignment PIN_29 -to PB_RESET
set_location_assignment PIN_83 -to PCI_ATA_DETECTn
set_location_assignment PIN_38 -to PCI_DETECTn
set_location_assignment PIN_95 -to PCI_DETECTS0
set_location_assignment PIN_96 -to PCI_DETECTS1
set_location_assignment PIN_97 -to PCI_DETECTS2
set_location_assignment PIN_37 -to PCI_FORCE_ON
set_location_assignment PIN_98 -to PIN_I2C_SCL
set_location_assignment PIN_99 -to PIN_I2C_SDA_IN
set_location_assignment PIN_30 -to POR_RESETn
set_location_assignment PIN_74 -to SYS_RESETn
set_location_assignment PIN_36 -to TVP5147_PWD
set_location_assignment PIN_35 -to TVP5147_RSTn
set_location_assignment PIN_49 -to TVP5417_I2Cn
set_location_assignment PIN_50 -to TVP7002_I2Cn
set_location_assignment PIN_34 -to TVP7002_PWD
set_location_assignment PIN_33 -to TVP7002_RSTn
set_location_assignment PIN_3 -to UART2_EN
set_location_assignment PIN_2 -to UART2_RXD
set_location_assignment PIN_90 -to USB_VBUS
set_location_assignment PIN_89 -to VBUS_FEEDBACK
set_location_assignment PIN_66 -to VID_INHI_S0
set_location_assignment PIN_67 -to VID_INHI_S1
set_location_assignment PIN_57 -to VID_INLO_S0
set_location_assignment PIN_58 -to VID_INLO_S1
set_location_assignment PIN_52 -to VIDEO_IN_EN0
set_location_assignment PIN_53 -to VIDEO_IN_EN1
set_location_assignment PIN_54 -to VIDEO_OUT_EN0
set_location_assignment PIN_55 -to VIDEO_OUT_EN1
set_location_assignment PIN_73 -to VIDOUT_HI_S0
set_location_assignment PIN_70 -to VIDOUT_LO_S0
set_location_assignment PIN_71 -to VIDOUT_LO_S1
set_location_assignment PIN_77 -to VLYNQ_RESETn
set_location_assignment PIN_84 -to VSCALE0
set_location_assignment PIN_85 -to VSCALE1
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to I2C_INTn
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ARM_EMU_RSTn
set_global_assignment -name SAVE_DISK_SPACE OFF
set_global_assignment -name MAXII_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name FIT_ONLY_ONE_ATTEMPT ON
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL
set_global_assignment -name WEAK_PULL_UP_RESISTOR OFF
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING "NORMAL COMPILATION"
set_global_assignment -name OPTIMIZE_FAST_CORNER_TIMING ON
set_global_assignment -name FMAX_REQUIREMENT "12 MHz" -section_id CLKIN
set_instance_assignment -name CLOCK_SETTINGS CLKIN -to CLKIN
set_location_assignment PIN_62 -to CLKIN
set_global_assignment -name VHDL_FILE davincihdcir.vhd
set_global_assignment -name VHDL_FILE davincihd.vhd
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_location_assignment PIN_15 -to GP00