ram.tan.rpt

nios 中读写sdram的程序

; N/A   ; None         ; 0.511 ns   ; rdaddress[1] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg1 ; clock    ;
; N/A   ; None         ; 0.463 ns   ; rdaddress[2] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg2 ; clock    ;
; N/A   ; None         ; 0.457 ns   ; rdaddress[4] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg4 ; clock    ;
; N/A   ; None         ; 0.027 ns   ; rdaddress[3] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg3 ; clock    ;
+-------+--------------+------------+--------------+-----------------------------------------------------------------------------------------------------------------+----------+


+------------------------------------------------------------------------------------------------------------------------------------------------+
; tco                                                                                                                                            ;
+-------+--------------+------------+----------------------------------------------------------------------------------------+------+------------+
; Slack ; Required tco ; Actual tco ; From                                                                                   ; To   ; From Clock ;
+-------+--------------+------------+----------------------------------------------------------------------------------------+------+------------+
; N/A   ; None         ; 9.930 ns   ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|q_b[7] ; q[7] ; clock      ;
; N/A   ; None         ; 9.594 ns   ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|q_b[6] ; q[6] ; clock      ;
; N/A   ; None         ; 9.410 ns   ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|q_b[3] ; q[3] ; clock      ;
; N/A   ; None         ; 9.013 ns   ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|q_b[4] ; q[4] ; clock      ;
; N/A   ; None         ; 8.543 ns   ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|q_b[1] ; q[1] ; clock      ;
; N/A   ; None         ; 8.314 ns   ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|q_b[0] ; q[0] ; clock      ;
; N/A   ; None         ; 8.066 ns   ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|q_b[2] ; q[2] ; clock      ;
; N/A   ; None         ; 7.883 ns   ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|q_b[5] ; q[5] ; clock      ;
+-------+--------------+------------+----------------------------------------------------------------------------------------+------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; th                                                                                                                                                                                  ;
+---------------+-------------+-----------+--------------+-----------------------------------------------------------------------------------------------------------------+----------+
; Minimum Slack ; Required th ; Actual th ; From         ; To                                                                                                              ; To Clock ;
+---------------+-------------+-----------+--------------+-----------------------------------------------------------------------------------------------------------------+----------+
; N/A           ; None        ; 0.286 ns  ; rdaddress[3] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg3 ; clock    ;
; N/A           ; None        ; -0.144 ns ; rdaddress[4] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg4 ; clock    ;
; N/A           ; None        ; -0.150 ns ; rdaddress[2] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg2 ; clock    ;
; N/A           ; None        ; -0.198 ns ; rdaddress[1] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg1 ; clock    ;
; N/A           ; None        ; -4.073 ns ; data[1]      ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_datain_reg1  ; clock    ;
; N/A           ; None        ; -4.208 ns ; data[4]      ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_datain_reg4  ; clock    ;
; N/A           ; None        ; -4.252 ns ; rdaddress[7] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg7 ; clock    ;
; N/A           ; None        ; -4.255 ns ; wraddress[4] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_address_reg4 ; clock    ;
; N/A           ; None        ; -4.255 ns ; wraddress[0] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_address_reg0 ; clock    ;
; N/A           ; None        ; -4.265 ns ; data[7]      ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_datain_reg7  ; clock    ;
; N/A           ; None        ; -4.284 ns ; rdaddress[6] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg6 ; clock    ;
; N/A           ; None        ; -4.311 ns ; data[2]      ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_datain_reg2  ; clock    ;
; N/A           ; None        ; -4.327 ns ; wraddress[7] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_address_reg7 ; clock    ;
; N/A           ; None        ; -4.329 ns ; wraddress[5] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_address_reg5 ; clock    ;
; N/A           ; None        ; -4.491 ns ; wraddress[6] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_address_reg6 ; clock    ;
; N/A           ; None        ; -4.605 ns ; data[6]      ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_datain_reg6  ; clock    ;
; N/A           ; None        ; -4.613 ns ; wren         ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_we_reg       ; clock    ;
; N/A           ; None        ; -4.662 ns ; rdaddress[5] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg5 ; clock    ;
; N/A           ; None        ; -4.685 ns ; data[0]      ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_datain_reg0  ; clock    ;
; N/A           ; None        ; -4.727 ns ; wraddress[1] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_address_reg1 ; clock    ;
; N/A           ; None        ; -4.739 ns ; data[5]      ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_datain_reg5  ; clock    ;
; N/A           ; None        ; -4.782 ns ; rdaddress[0] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_address_reg0 ; clock    ;
; N/A           ; None        ; -4.787 ns ; wraddress[3] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_address_reg3 ; clock    ;
; N/A           ; None        ; -4.899 ns ; data[3]      ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_datain_reg3  ; clock    ;
; N/A           ; None        ; -4.904 ns ; wraddress[2] ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~porta_address_reg2 ; clock    ;
; N/A           ; None        ; -5.255 ns ; rden         ; lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_re_reg       ; clock    ;
+---------------+-------------+-----------+--------------+-----------------------------------------------------------------------------------------------------------------+----------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
    Info: Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Full Version
    Info: Processing started: Sat Aug 23 14:02:28 2008
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off ram -c ram --timing_analysis_only
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node "clock" is an undefined clock
Info: Clock "clock" Internal fmax is restricted to 163.03 MHz between source memory "lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|ram_block1a0~portb_re_reg" and destination memory "lpm_ram_dp0:inst|altsyncram:altsyncram_component|altsyncram_47r1:auto_generated|q_b[0]"