cfg2410.inc

HaiBIOS 是为我的S3C2410开发板写的一个启动程序。 C盘是RAMDISK

;---------------------------------------------------------------------------------
; Copyright (c) Haisoft 2007-9-1
; Author:				Kingsea
; Email:				[e-mail]
;-------------------------------------------------------------
; Project:			HaiBios
; File:					predef.inc
; Description:	
;-------------------------------------------------------------
; Reversion Histroy:
;-------------------------------------------------------------
; Version		date		operations				by who
; 1.0.0		2007-09-01	Create					Kingsea
;
;---------------------------------------------------------------------------------

;-------------------------------------------------------------
; cpu mode predefine
;-------------------------------------------------------------
USRMODE			EQU 	0x10
FIQMODE			EQU 	0x11
IRQMODE			EQU 	0x12
SVCMODE			EQU 	0x13
ABTMODE			EQU 	0x17
UNDMODE			EQU 	0x1b
MODEMSK			EQU 	0x1f
NONEINT       	EQU 	0xc0

;-------------------------------------------------------------
; CPU clcok
;-------------------------------------------------------------
; 50.00 MHz
MDIV_50			EQU 	0x5c
PDIV_50			EQU 	0x4
SDIV_50			EQU 	0x2
MPLLCON_50			EQU	((MDIV_50 << 12) | (PDIV_50 << 4) | (SDIV_50)) 

;120.00MHz
MDIV_120			EQU 	0x5c
PDIV_120			EQU 	0x8
SDIV_120			EQU 	0x0
MPLLCON_120			EQU	((MDIV_120 << 12) | (PDIV_120 << 4) | (SDIV_120)) 

; 200.00 MHz
MDIV_200			EQU 	0x5c
PDIV_200			EQU 	0x4
SDIV_200			EQU 	0x0
MPLLCON_200		EQU		((MDIV_200 << 12) | (PDIV_200 << 4) | (SDIV_200)) 

;202.80 MHz
MDIV_202			EQU 	0xa1
PDIV_202			EQU 	0x3
SDIV_202			EQU 	0x1
MPLLCON_202		EQU		((MDIV_202 << 12) | (PDIV_202 << 4) | (SDIV_202)) 


;-------------------------------------------------------------
;Memory Layout
;-------------------------------------------------------------
SDRAM_START		EQU		0x30000000
RAMDISK_SIZE		EQU		0x02000000	;32MB
SDRAM_END		EQU		0x34000000
RAMDISK_START		EQU	(SDRAM_END-RAMDISK_SIZE)
STACK_BASEADDR		EQU	(RAMDISK_START-0x1000)
ISR_STARTADDR		EQU	(RAMDISK_START-0x100)
MAIM_RUN_ADDR		EQU	SDRAM_START


		GBLL 	PLL_ON_START  
PLL_ON_START	SETL 	{TRUE}


		GBLL	ENDIAN_CHANGE
ENDIAN_CHANGE	SETL	{FALSE}

		GBLA	ENTRY_BUS_WIDTH
ENTRY_BUS_WIDTH	SETA	16	


;BUSWIDTH = 16,32
		GBLA    BUSWIDTH	;max. bus width for the GPIO configuration
BUSWIDTH	SETA    32


	END