📄 u_regnikka.h
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/******************************************************************************
* File name : regNikka.h
* Module name : Register definition of Nikka
* Author : Hiromichi Kondo
*-----------------------------------------------------------------------------
* $Id: regNikka.h,v 1.3 2003/05/14 01:27:39 9551619 Exp $
*****************************************************************************/
#ifndef _REG_NIKKA_H_
#define _REG_NIKKA_H_
#define VUB volatile unsigned char
#define VUW volatile unsigned short
#define USB_BASE 0x300900
/* */
#define DEF_BPREG(n) (*(volatile S_ ## n *)&n)
/* */
#define rMainIntStat (*(VUB *)(USB_BASE + 0x00)) /* Main Interrupt Status */
#define rSIE_IntStat (*(VUB *)(USB_BASE + 0x01)) /* SIE Interrupt Status */
#define rEPrIntStat (*(VUB *)(USB_BASE + 0x02)) /* EPr Interrupt Status */
#define rDMA_IntStat (*(VUB *)(USB_BASE + 0x03)) /* DMA Interrupt Status */
#define rFIFO_IntStat (*(VUB *)(USB_BASE + 0x04)) /* FIFO Interrupt Status */
#define rEP0IntStat (*(VUB *)(USB_BASE + 0x07)) /* EP0 Interrupt Status */
#define rEPaIntStat (*(VUB *)(USB_BASE + 0x08)) /* EPa Interrupt Status */
#define rEPbIntStat (*(VUB *)(USB_BASE + 0x09)) /* EPb Interrupt Status */
#define rEPcIntStat (*(VUB *)(USB_BASE + 0x0A)) /* EPc Interrupt Status */
#define rEPdIntStat (*(VUB *)(USB_BASE + 0x0B)) /* EPd Interrupt Status */
#define rEPeIntStat (*(VUB *)(USB_BASE + 0x0C)) /* EPe Interrupt Status */
#define rEPfIntStat (*(VUB *)(USB_BASE + 0x0D)) /* EPf Interrupt Status */
#define rEPgIntStat (*(VUB *)(USB_BASE + 0x0E)) /* EPg Interrupt Status */
#define rEPhIntStat (*(VUB *)(USB_BASE + 0x0F)) /* EPh Interrupt Status */
#define rMainIntEnb (*(VUB *)(USB_BASE + 0x10)) /* Main Interrupt Enable */
#define rSIE_IntEnb (*(VUB *)(USB_BASE + 0x11)) /* SIE Interrupt Enable */
#define rEPrIntEnb (*(VUB *)(USB_BASE + 0x12)) /* EPr Interrupt Enable */
#define rDMA_IntEnb (*(VUB *)(USB_BASE + 0x13)) /* DMA Interrupt Enable */
#define rFIFO_IntEnb (*(VUB *)(USB_BASE + 0x14)) /* FIFO Interrupt Enable */
#define rEP0IntEnb (*(VUB *)(USB_BASE + 0x17)) /* EP0 Interrupt Enable */
#define rEPaIntEnb (*(VUB *)(USB_BASE + 0x18)) /* EPa Interrupt Enable */
#define rEPbIntEnb (*(VUB *)(USB_BASE + 0x19)) /* EPb Interrupt Enable */
#define rEPcIntEnb (*(VUB *)(USB_BASE + 0x1A)) /* EPc Interrupt Enable */
#define rEPdIntEnb (*(VUB *)(USB_BASE + 0x1B)) /* EPd Interrupt Enable */
#define rEPeIntEnb (*(VUB *)(USB_BASE + 0x1C)) /* EPe Interrupt Enable */
#define rEPfIntEnb (*(VUB *)(USB_BASE + 0x1D)) /* EPf Interrupt Enable */
#define rEPgIntEnb (*(VUB *)(USB_BASE + 0x1E)) /* EPg Interrupt Enable */
#define rEPhIntEnb (*(VUB *)(USB_BASE + 0x1F)) /* EPh Interrupt Enable */
#define rRevisionNum (*(VUB *)(USB_BASE + 0x20)) /* Revision Number */
#define rUSB_Control (*(VUB *)(USB_BASE + 0x21)) /* USB Control */
#define rUSB_Status (*(VUB *)(USB_BASE + 0x22)) /* USB Status */
#define rXcvrControl (*(VUB *)(USB_BASE + 0x23)) /* Xcvr Control */
#define rUSB_Test (*(VUB *)(USB_BASE + 0x24)) /* USB Test */
#define rEPnControl (*(VUB *)(USB_BASE + 0x25)) /* Endpoint Control */
#define rEPrFIFO_Clr (*(VUB *)(USB_BASE + 0x26)) /* Endpoint FIFO Clear */
#define rFrameNumber_H (*(VUB *)(USB_BASE + 0x2E)) /* FrameNumber High */
#define rFrameNumber_L (*(VUB *)(USB_BASE + 0x2F)) /* FrameNumber Low */
#define rEP0SETUP_0 (*(VUB *)(USB_BASE + 0x30)) /* EP0 SETUP 0 */
#define rEP0SETUP_1 (*(VUB *)(USB_BASE + 0x31)) /* EP0 SETUP 1 */
#define rEP0SETUP_2 (*(VUB *)(USB_BASE + 0x32)) /* EP0 SETUP 2 */
#define rEP0SETUP_3 (*(VUB *)(USB_BASE + 0x33)) /* EP0 SETUP 3 */
#define rEP0SETUP_4 (*(VUB *)(USB_BASE + 0x34)) /* EP0 SETUP 4 */
#define rEP0SETUP_5 (*(VUB *)(USB_BASE + 0x35)) /* EP0 SETUP 5 */
#define rEP0SETUP_6 (*(VUB *)(USB_BASE + 0x36)) /* EP0 SETUP 6 */
#define rEP0SETUP_7 (*(VUB *)(USB_BASE + 0x37)) /* EP0 SETUP 7 */
#define rUSB_Address (*(VUB *)(USB_BASE + 0x38)) /* USB Address */
#define rEP0Control (*(VUB *)(USB_BASE + 0x39)) /* EP0 Control */
#define rEP0ControlIN (*(VUB *)(USB_BASE + 0x3A)) /* EP0 Control IN */
#define rEP0ControlOUT (*(VUB *)(USB_BASE + 0x3B)) /* EP0 Control OUT */
#define rEP0MaxSize (*(VUB *)(USB_BASE + 0x3F)) /* EP0 Max Packet Size */
#define rEPaControl (*(VUB *)(USB_BASE + 0x40)) /* EPa Control */
#define rEPbControl (*(VUB *)(USB_BASE + 0x41)) /* EPb Control */
#define rEPcControl (*(VUB *)(USB_BASE + 0x42)) /* EPc Control */
#define rEPdControl (*(VUB *)(USB_BASE + 0x43)) /* EPd Control */
#define rEPeControl (*(VUB *)(USB_BASE + 0x44)) /* EPe Control */
#define rEPfControl (*(VUB *)(USB_BASE + 0x45)) /* EPf Control */
#define rEPgControl (*(VUB *)(USB_BASE + 0x46)) /* EPg Control */
#define rEPhControl (*(VUB *)(USB_BASE + 0x47)) /* EPh Control */
#define rEPaMaxSize_H (*(VUB *)(USB_BASE + 0x50)) /* EPa Max Packet Size High */
#define rEPaMaxSize_L (*(VUB *)(USB_BASE + 0x51)) /* EPa Max Packet Size Low */
#define rEPaConfig_0 (*(VUB *)(USB_BASE + 0x52)) /* EPa Configuration 0 */
#define rEPaConfig_1 (*(VUB *)(USB_BASE + 0x53)) /* EPa Configuration 1 */
#define rEPbMaxSize_H (*(VUB *)(USB_BASE + 0x54)) /* EPb Max Packet Size High */
#define rEPbMaxSize_L (*(VUB *)(USB_BASE + 0x55)) /* EPb Max Packet Size Low */
#define rEPbConfig_0 (*(VUB *)(USB_BASE + 0x56)) /* EPb Configuration 0 */
#define rEPbConfig_1 (*(VUB *)(USB_BASE + 0x57)) /* EPb Configuration 1 */
#define rEPcMaxSize_H (*(VUB *)(USB_BASE + 0x58)) /* EPc Max Packet Size High */
#define rEPcMaxSize_L (*(VUB *)(USB_BASE + 0x59)) /* EPc Max Packet Size Low */
#define rEPcConfig_0 (*(VUB *)(USB_BASE + 0x5A)) /* EPc Configuration 0 */
#define rEPcConfig_1 (*(VUB *)(USB_BASE + 0x5B)) /* EPc Configuration 1 */
#define rEPdMaxSize_H (*(VUB *)(USB_BASE + 0x5C)) /* EPd Max Packet Size High */
#define rEPdMaxSize_L (*(VUB *)(USB_BASE + 0x5D)) /* EPd Max Packet Size Low */
#define rEPdConfig_0 (*(VUB *)(USB_BASE + 0x5E)) /* EPd Configuration 0 */
#define rEPdConfig_1 (*(VUB *)(USB_BASE + 0x5F)) /* EPd Configuration 1 */
#define rEPeMaxSize_H (*(VUB *)(USB_BASE + 0x60)) /* EPe Max Packet Size High */
#define rEPeMaxSize_L (*(VUB *)(USB_BASE + 0x61)) /* EPe Max Packet Size Low */
#define rEPeConfig_0 (*(VUB *)(USB_BASE + 0x62)) /* EPe Configuration 0 */
#define rEPeConfig_1 (*(VUB *)(USB_BASE + 0x63)) /* EPe Configuration 1 */
#define rEPfMaxSize_H (*(VUB *)(USB_BASE + 0x64)) /* EPf Max Packet Size High */
#define rEPfMaxSize_L (*(VUB *)(USB_BASE + 0x65)) /* EPf Max Packet Size Low */
#define rEPfConfig_0 (*(VUB *)(USB_BASE + 0x66)) /* EPf Configuration 0 */
#define rEPfConfig_1 (*(VUB *)(USB_BASE + 0x67)) /* EPf Configuration 1 */
#define rEPgMaxSize_H (*(VUB *)(USB_BASE + 0x68)) /* EPg Max Packet Size High */
#define rEPgMaxSize_L (*(VUB *)(USB_BASE + 0x69)) /* EPg Max Packet Size Low */
#define rEPgConfig_0 (*(VUB *)(USB_BASE + 0x6A)) /* EPg Configuration 0 */
#define rEPgConfig_1 (*(VUB *)(USB_BASE + 0x6B)) /* EPg Configuration 1 */
#define rEPhMaxSize_H (*(VUB *)(USB_BASE + 0x6C)) /* EPh Max Packet Size High */
#define rEPhMaxSize_L (*(VUB *)(USB_BASE + 0x6D)) /* EPh Max Packet Size Low */
#define rEPhConfig_0 (*(VUB *)(USB_BASE + 0x6E)) /* EPh Configuration 0 */
#define rEPhConfig_1 (*(VUB *)(USB_BASE + 0x6F)) /* EPh Configuration 1 */
#define rEPaStartAdrs_H (*(VUB *)(USB_BASE + 0x70)) /* EPa FIFO Start Address High */
#define rEPaStartAdrs_L (*(VUB *)(USB_BASE + 0x71)) /* EPa FIFO Start Address Low */
#define rEPbStartAdrs_H (*(VUB *)(USB_BASE + 0x72)) /* EPb FIFO Start Address High */
#define rEPbStartAdrs_L (*(VUB *)(USB_BASE + 0x73)) /* EPb FIFO Start Address Low */
#define rEPcStartAdrs_H (*(VUB *)(USB_BASE + 0x74)) /* EPc FIFO Start Address High */
#define rEPcStartAdrs_L (*(VUB *)(USB_BASE + 0x75)) /* EPc FIFO Start Address Low */
#define rEPdStartAdrs_H (*(VUB *)(USB_BASE + 0x76)) /* EPd FIFO Start Address High */
#define rEPdStartAdrs_L (*(VUB *)(USB_BASE + 0x77)) /* EPd FIFO Start Address Low */
#define rEPeStartAdrs_H (*(VUB *)(USB_BASE + 0x78)) /* EPe FIFO Start Address High */
#define rEPeStartAdrs_L (*(VUB *)(USB_BASE + 0x79)) /* EPe FIFO Start Address Low */
#define rEPfStartAdrs_H (*(VUB *)(USB_BASE + 0x7A)) /* EPf FIFO Start Address High */
#define rEPfStartAdrs_L (*(VUB *)(USB_BASE + 0x7B)) /* EPf FIFO Start Address Low */
#define rEPgStartAdrs_H (*(VUB *)(USB_BASE + 0x7C)) /* EPg FIFO Start Address High */
#define rEPgStartAdrs_L (*(VUB *)(USB_BASE + 0x7D)) /* EPg FIFO Start Address Low */
#define rEPhStartAdrs_H (*(VUB *)(USB_BASE + 0x7E)) /* EPh FIFO Start Address High */
#define rEPhStartAdrs_L (*(VUB *)(USB_BASE + 0x7F)) /* EPh FIFO Start Address Low */
#define rCPU_JoinRd (*(VUB *)(USB_BASE + 0x80)) /* CPU Join FIFO Read */
#define rCPU_JoinWr (*(VUB *)(USB_BASE + 0x81)) /* CPU Join FIFO Write */
#define rEnEPnFIFO_Access (*(VUB *)(USB_BASE + 0x82)) /* Enable EPn FIFO Access */
#define rEPnFIFOforCPU (*(VUB *)(USB_BASE + 0x83)) /* EPn FIFO for CPU */
#define rEPnRdRemain_H (*(VUB *)(USB_BASE + 0x84)) /* EPn FIFO Read Remain High */
#define rEPnRdRemain_L (*(VUB *)(USB_BASE + 0x85)) /* EPn FIFO Read Remain Low */
#define rEPnWrRemain_H (*(VUB *)(USB_BASE + 0x86)) /* EPn FIFO Write Remain High */
#define rEPnWrRemain_L (*(VUB *)(USB_BASE + 0x87)) /* EPn FIFO Write Remain Low */
#define rDescAdrs_H (*(VUB *)(USB_BASE + 0x88)) /* Descriptor Address High */
#define rDescAdrs_L (*(VUB *)(USB_BASE + 0x89)) /* Descriptor Address Low */
#define rDescSize_H (*(VUB *)(USB_BASE + 0x8A)) /* Descriptor Size High */
#define rDescSize_L (*(VUB *)(USB_BASE + 0x8B)) /* Descriptor Size Low */
#define rDescDoor (*(VUB *)(USB_BASE + 0x8F)) /* Descriptor Door */
#define rDMA_FIFO_Control (*(VUB *)(USB_BASE + 0x90)) /* DMA FIFO Control */
#define rDMA_Join (*(VUB *)(USB_BASE + 0x91)) /* DMA Join FIFO */
#define rDMA_Control (*(VUB *)(USB_BASE + 0x92)) /* DMA Control */
#define rDMA_Config_0 (*(VUB *)(USB_BASE + 0x94)) /* DMA Configuration 0 */
#define rDMA_Config_1 (*(VUB *)(USB_BASE + 0x95)) /* DMA Configuration 1 */
#define rDMA_Latency (*(VUB *)(USB_BASE + 0x97)) /* DMA Latency */
#define rDMA_Remain_H (*(VUB *)(USB_BASE + 0x98)) /* DMA FIFO Remain High */
#define rDMA_Remain_L (*(VUB *)(USB_BASE + 0x99)) /* DMA FIFO Remain Low */
#define rDMA_Count_HH (*(VUB *)(USB_BASE + 0x9C)) /* DMA Transfer Byte Counter High/High */
#define rDMA_Count_HL (*(VUB *)(USB_BASE + 0x9D)) /* DMA Transfer Byte Counter High/Low */
#define rDMA_Count_LH (*(VUB *)(USB_BASE + 0x9E)) /* DMA Transfer Byte Counter Low/High */
#define rDMA_Count_LL (*(VUB *)(USB_BASE + 0x9F)) /* DMA Transfer Byte Counter Low/Low */
typedef struct {
BYTE RcvEP0SETUP:1;
BYTE EP0IntStat:1;
BYTE Reserved2:1;
BYTE Reserved3:1;
BYTE FIFO_IntStat:1;
BYTE DMA_IntStat:1;
BYTE EPrIntStat:1;
BYTE SIE_IntStat:1;
} S_rMainIntStat;
#define rMainIntStat_BP DEF_BPREG(rMainIntStat)
typedef struct {
BYTE SetAddressCmp:1;
BYTE Reserved1:1;
BYTE DetectJ:1;
BYTE RcvSOF:1;
BYTE DetectSUSPEND:1;
BYTE DetectRESET:1;
BYTE NonJ:1;
BYTE VBUS_Changed:1;
} S_rSIE_IntStat;
#define rSIE_IntStat_BP DEF_BPREG(rSIE_IntStat)
typedef struct {
BYTE EPaIntStat:1;
BYTE EPbIntStat:1;
BYTE EPcIntStat:1;
BYTE EPdIntStat:1;
BYTE EPeIntStat:1;
BYTE EPfIntStat:1;
BYTE EPgIntStat:1;
BYTE EPhIntStat:1;
} S_rEPrIntStat;
#define rEPrIntStat_BP DEF_BPREG(rEPrIntStat)
typedef struct {
BYTE DMA_Cmp:1;
BYTE DMA_CountUp:1;
BYTE Reserved2:1;
BYTE Reserved3:1;
BYTE Reserved4:1;
BYTE Reserved5:1;
BYTE Reserved6:1;
BYTE Reserved7:1;
} S_rDMA_IntStat;
#define rDMA_IntStat_BP DEF_BPREG(rDMA_IntStat)
typedef struct {
BYTE FIFO_OUT_Cmp:1;
BYTE FIFO_IN_Cmp:1;
BYTE Reserved2:1;
BYTE Reserved3:1;
BYTE Reserved4:1;
BYTE Reserved5:1;
BYTE Reserved6:1;
BYTE DescriptorCmp:1;
} S_rFIFO_IntStat;
#define rFIFO_IntStat_BP DEF_BPREG(rFIFO_IntStat)
typedef struct {
BYTE OUT_TranErr:1;
BYTE IN_TranErr:1;
BYTE OUT_TranNAK:1;
BYTE IN_TranNAK:1;
BYTE OUT_TranACK:1;
BYTE IN_TranACK:1;
BYTE Reserved6:1;
BYTE Reserved7:1;
} S_rEP0IntStat;
#define rEP0IntStat_BP DEF_BPREG(rEP0IntStat)
typedef struct {
BYTE OUT_TranErr:1;
BYTE IN_TranErr:1;
BYTE OUT_TranNAK:1;
BYTE IN_TranNAK:1;
BYTE OUT_TranACK:1;
BYTE IN_TranACK:1;
BYTE OUT_ShortACK:1;
BYTE Reserved7:1;
} S_rEPaIntStat;
#define rEPaIntStat_BP DEF_BPREG(rEPaIntStat)
typedef struct {
BYTE OUT_TranErr:1;
BYTE IN_TranErr:1;
BYTE OUT_TranNAK:1;
BYTE IN_TranNAK:1;
BYTE OUT_TranACK:1;
BYTE IN_TranACK:1;
BYTE OUT_ShortACK:1;
BYTE Reserved7:1;
} S_rEPbIntStat;
#define rEPbIntStat_BP DEF_BPREG(rEPbIntStat)
typedef struct {
BYTE OUT_TranErr:1;
BYTE IN_TranErr:1;
BYTE OUT_TranNAK:1;
BYTE IN_TranNAK:1;
BYTE OUT_TranACK:1;
BYTE IN_TranACK:1;
BYTE OUT_ShortACK:1;
BYTE Reserved7:1;
} S_rEPcIntStat;
#define rEPcIntStat_BP DEF_BPREG(rEPcIntStat)
typedef struct {
BYTE OUT_TranErr:1;
BYTE IN_TranErr:1;
BYTE OUT_TranNAK:1;
BYTE IN_TranNAK:1;
BYTE OUT_TranACK:1;
BYTE IN_TranACK:1;
BYTE OUT_ShortACK:1;
BYTE Reserved7:1;
} S_rEPdIntStat;
#define rEPdIntStat_BP DEF_BPREG(rEPdIntStat)
typedef struct {
BYTE OUT_TranErr:1;
BYTE IN_TranErr:1;
BYTE OUT_TranNAK:1;
BYTE IN_TranNAK:1;
BYTE OUT_TranACK:1;
BYTE IN_TranACK:1;
BYTE OUT_ShortACK:1;
BYTE Reserved7:1;
} S_rEPeIntStat;
#define rEPeIntStat_BP DEF_BPREG(rEPeIntStat)
typedef struct {
BYTE OUT_TranErr:1;
BYTE IN_TranErr:1;
BYTE OUT_TranNAK:1;
BYTE IN_TranNAK:1;
BYTE OUT_TranACK:1;
BYTE IN_TranACK:1;
BYTE OUT_ShortACK:1;
BYTE Reserved7:1;
} S_rEPfIntStat;
#define rEPfIntStat_BP DEF_BPREG(rEPfIntStat)
typedef struct {
BYTE OUT_TranErr:1;
BYTE IN_TranErr:1;
BYTE OUT_TranNAK:1;
BYTE IN_TranNAK:1;
BYTE OUT_TranACK:1;
BYTE IN_TranACK:1;
BYTE OUT_ShortACK:1;
BYTE Reserved7:1;
} S_rEPgIntStat;
#define rEPgIntStat_BP DEF_BPREG(rEPgIntStat)
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