📄 packetdriver.c
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gWTxFDPtr = gCTxFDPtr = TXDLSA;
// Generate linked list.
pFrameDescriptor = (sFrameDescriptor *) gCTxFDPtr;
pStartFrameDescriptor = pFrameDescriptor;
for(i = 0; i < MaxTxFrameDescriptors; i++)
{
if (pLastFrameDescriptor == NULL)
pLastFrameDescriptor = pFrameDescriptor;
else
pLastFrameDescriptor->NextFrameDescriptor = (UINT32)pFrameDescriptor;
pFrameDescriptor->Status1 = (PaddingMode | CRCMode | MACTxIntEn);
pFrameDescriptor->FrameDataPtr = (UINT32)0x0;
pFrameDescriptor->Status2 = (UINT32)0x0;
pFrameDescriptor->NextFrameDescriptor = NULL;
pLastFrameDescriptor = pFrameDescriptor;
pFrameDescriptor++;
}
// Make Frame descriptor to ring buffer type.
pFrameDescriptor--;
pFrameDescriptor->NextFrameDescriptor = (UINT32)pStartFrameDescriptor;
}
// Initialize Rx frame descriptor area-buffers.
void RxFDInitialize(void)
{
sFrameDescriptor *pFrameDescriptor;
sFrameDescriptor *pStartFrameDescriptor;
sFrameDescriptor *pLastFrameDescriptor = NULL;
UINT32 i;
// Get Frame descriptor's base address.
RXDLSA = (UINT32)RxFDBaseAddr | 0x80000000;
gCRxFDPtr = RXDLSA;
// Generate linked list.
pFrameDescriptor = (sFrameDescriptor *) gCRxFDPtr;
pStartFrameDescriptor = pFrameDescriptor;
for (i = 0; i < MaxRxFrameDescriptors; i++)
{
if (pLastFrameDescriptor == NULL)
pLastFrameDescriptor = pFrameDescriptor;
else
pLastFrameDescriptor->NextFrameDescriptor = (UINT32)pFrameDescriptor;
pFrameDescriptor->Status1 = RXfOwnership_DMA;
pFrameDescriptor->FrameDataPtr = (UINT32)(NetBuf_Allocate());
pFrameDescriptor->Status2 = (UINT32)0x0;
pFrameDescriptor->NextFrameDescriptor = NULL;
pLastFrameDescriptor = pFrameDescriptor;
pFrameDescriptor++;
}
// Make Frame descriptor to ring buffer type.
pFrameDescriptor--;
pFrameDescriptor->NextFrameDescriptor = (UINT32)pStartFrameDescriptor;
}
// set Registers related with MAC.
void ReadyMac(void)
{
MIEN = gMIEN ;
MCMDR = gMCMDR ;
}
// MAC Transfer Start for interactive mode
void MacTxGo(void)
{
// Enable MAC Transfer
if (!(MCMDR&MCMDR_TXON))
MCMDR |= MCMDR_TXON ;
if (TDU_Flag==1)
{
TDU_Flag = 0;
TSDR = 0;
}
}
// Initialize MAC Controller
void Mac_Initialize()
{
*((unsigned volatile int *) 0xB0000200) |= 0x80; //enable MAC clock
*((unsigned volatile int *) 0xB0000224) |= 0x04; //enable RMII clock
*((unsigned volatile int *) 0xB000000C) |= 0x02; //MFSEL
// Reset MAC
MCMDR|=MCMDR_SWR; //====
// MAC interrupt vector setup.
SysSetInterrupt(EMCTXINT, MAC_Tx_isr) ;
SysSetInterrupt(EMCRXINT, MAC_Rx_isr) ;
// Set the Tx and Rx Frame Descriptor
TxFDInitialize() ;
RxFDInitialize() ;
// Set the CAM Control register and the MAC address value
FillCamEntry(0, gCam0M, gCam0L);
CAMCMR = gCAMCMR ;
// Enable MAC Tx and Rx interrupt.
Enable_Int(EMCTXINT);
Enable_Int(EMCRXINT);
TDU_Flag=0;
// Configure the MAC control registers.
ReadyMac() ;
// Set PHY operation mode
AutoDetectPhyAddr() ; //[2007/03/08], added by cmn
ResetPhyChip() ;
// Set MAC address to CAM
SetMacAddr() ;
#if 0
{
INT tmp;
*((volatile UINT32 *)0x38)=(UINT32)IRQ_IntHandler;
__asm
{
MRS tmp, CPSR
BIC tmp, tmp, 0x80
MSR CPSR_c, tmp
}
}
#endif
}
void Mac_ShutDown()
{
#if 1 //CMN
MCMDR &= ~(MCMDR_RXON|MCMDR_TXON) ;
#endif
}
// Send ethernet frame function
INT Mac_SendPacket(NETBUF *netbuf)
{
sFrameDescriptor *psTxFD;
UINT32 *pTXFDStatus1;
netbuf->txNext = NULL;
Mac_DisableInt();
// Get Tx frame descriptor & data pointer
psTxFD = (sFrameDescriptor *)gWTxFDPtr ;
pTXFDStatus1 = (UINT32 *)&psTxFD->Status1;
if (!TxReady) // || (*pTXFDStatus1 & TXfOwnership_DMA))
{
//uprintf("\nTXFSM0=0x%08x\n", TXFSM_0);
if (_TxQueue == NULL)
_TxQueue = netbuf;
else
{
NETBUF *ptr = _TxQueue;
while (ptr->txNext != NULL)
ptr = ptr->txNext;
ptr->txNext = netbuf;
}
Mac_EnableInt();
return 1;
}
//HexDumpBuffer(netbuf->packet, netbuf->len);
psTxFD->FrameDataPtr=(UINT32)netbuf->packet;
// Set TX Frame flag & Length Field
//netbuf->len += 60;
psTxFD->Status2 = (UINT32)(netbuf->len & 0xffff);
// Cheange ownership to DMA
psTxFD->Status1 |= TXfOwnership_DMA;
TxReady = 0;
// Enable MAC Tx control register
MacTxGo();
// Change the Tx frame descriptor for next use
gWTxFDPtr = (UINT32)(psTxFD->NextFrameDescriptor);
Mac_EnableInt();
return 1 ;
}
// Interrupt Service Routine for MAC0 Tx
void MAC_Tx_isr(void)
{
sFrameDescriptor *pTxFDptr;
UINT32 Status, RdValue;
//if (TxReady0 == 1) //CWS
// return;
RdValue = MISTA;
MISTA = RdValue&0xffff0000;
if (RdValue & MISTA_TDU)
TDU_Flag = 1;
if (RdValue & MISTA_TxBErr)
{
//FIFOTHD|=SWR;
MCMDR|=MCMDR_SWR; //====
Mac_Initialize();
}
else
{
pTxFDptr = (sFrameDescriptor *) gCTxFDPtr;
Status = (pTxFDptr->Status2 >> 16) & 0xffff;
if (Status & TXFD_TXCP)
{
TxReady = 1;
if (Status & ( TXFD_TXABT | TXFD_DEF | TXFD_PAU | TXFD_EXDEF |
TXFD_NCS | TXFD_SQE | TXFD_LC | TXFD_TXHA) )
;
// Clear Framedata pointer already used.
pTxFDptr->Status2 = (UINT32)0x0;
NetBuf_FreeIR((NETBUF *)pTxFDptr->FrameDataPtr);
gCTxFDPtr = (UINT32)pTxFDptr->NextFrameDescriptor ;
if (_TxQueue != NULL)
{
NETBUF *netbuf = _TxQueue;
_TxQueue = _TxQueue->txNext;
netbuf->txNext = NULL;
Mac_SendPacket(netbuf);
}
}
}
}
//#define MAC0_DEBUG
// Interrupt Service Routine for MAC0 Rx
void MAC_Rx_isr(void)
{
sFrameDescriptor *pRxFDptr ;
UINT32 RxStatus ;
UINT32 CRxPtr;
UINT32 RdValue;
NETBUF *netbuf;
#ifdef MAC0_DEBUG
static UINT32 i=0;
#endif
RdValue = MISTA;
MISTA = RdValue&0x0000ffff;
if (RdValue & MISTA_RxBErr)
{
MCMDR|=MCMDR_SWR; //====
Mac_Initialize();
}
else
{
if (RdValue & (MISTA_CFR | MISTA_CRCE | MISTA_PTLE | MISTA_ALIE | MISTA_RP))
uprintf("Rx error, status:%x\n",RdValue) ;
else
{
// Get current frame descriptor
CRxPtr = CRXDSA ;
do
{
// Get Rx Frame Descriptor
pRxFDptr = (sFrameDescriptor *)gCRxFDPtr;
if ((pRxFDptr->Status1|RXfOwnership_CPU)==RXfOwnership_CPU)
{
#ifdef MAC0_DEBUG
if( (i & 0xF)== 0x0 )
uprintf("\nMAC - %03d", pRxFDptr->Status1 & 0xffff);
else
uprintf(" %03d", pRxFDptr->Status1 & 0xffff);
i++;
#endif
RxStatus = (pRxFDptr->Status1 >> 16) & 0xffff;
// If Rx frame is good, then process received frame
if (RxStatus & RXFD_RXGD)
{
if (PacketProcessor((UCHAR *)pRxFDptr->FrameDataPtr, pRxFDptr->Status1 & 0xffff) == 0)
;
else
if ((netbuf = NetBuf_AllocateIR()) == NULL)
; //uprintf("No free buffer\n");
else
{
if (_iqueue_last == NULL)
{
_iqueue_last = (NETBUF *)pRxFDptr->FrameDataPtr;
_iqueue_first = _iqueue_last;
}
else
{
_iqueue_last->next = (NETBUF *)pRxFDptr->FrameDataPtr;
_iqueue_last = _iqueue_last->next;
}
_iqueue_last->len = pRxFDptr->Status1 & 0xffff;
_iqueue_last->next = NULL;
pRxFDptr->FrameDataPtr = (unsigned long)netbuf;
}
}
}
else
break;
// Change ownership to DMA for next use
pRxFDptr->Status1 = RXfOwnership_DMA;
// Get Next Frame Descriptor pointer to process
gCRxFDPtr = (UINT32)(pRxFDptr->NextFrameDescriptor) ;
} while (CRxPtr != gCRxFDPtr);
}
if (RdValue & MISTA_RDU)
RSDR = 0;
}
}
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