at91sio.h

vwworks 在 at91rm9200上的bsp配置

/* at91Sio.h - Atmel AT91 USART header file */

/* Copyright 1999 ARM Limited */
/* Copyright 2002-2004 Wind River Systems, Inc. */

/*
modification history
--------------------
01c,05oct05,pdr  fixed cache issue.
01b,14sep04,pdr  adapter for AT91RM9200.
01a,25jun99,jpd  written.
*/

#ifndef __INCat91Sioh 
#define __INCat91Sioh 

#ifdef __cplusplus
extern "C" {
#endif

/* Register description of AT91 USART */

#ifndef _ASMLANGUAGE


/* Register offsets from base address */

#define AT91_US_CR	    0x00		/* USART Control */
#define AT91_US_MR	    0x04		/* USART Mode */
#define AT91_US_IER	    0x08		/* USART Interrupt Enable */
#define AT91_US_IDR	    0x0C		/* USART Interrupt Disable */
#define AT91_US_IMR	    0x10		/* USART Interrupt Mask */
#define AT91_US_CSR	    0x14		/* USART Channel Status */
#define AT91_US_RHR	    0x18		/* USART Receiver Holding */
#define AT91_US_THR	    0x1C		/* USART Transmitter Holding */

#define AT91_US_BRGR	0x20		/* USART Baud-Rate Generator */
#define AT91_US_RTOR	0x24		/* USART Receiver Time Out */
#define AT91_US_TTGR	0x28		/* USART Transmitter Time Guard */

#define AT91_US_RPR	    0x100		/* USART Receiver Pointer */
#define AT91_US_RCR	    0x104		/* USART Receiver Counter */
#define AT91_US_TPR	    0x108		/* USART Transmitter Pointer */
#define AT91_US_TCR	    0x10C		/* USART Trasnmitter Counter */
#define AT91_US_PTCR    0x120

/* bit definitions within US_CR register */

#define AT91_US_RSTRX	(1<<2)		/* reset receiver */
#define AT91_US_RSTTX	(1<<3)		/* reset transmitter */
#define AT91_US_RXEN	(1<<4)		/* enable received */
#define AT91_US_RXDIS	(1<<5)		/* disable receiver */
#define AT91_US_TXEN	(1<<6)		/* enable transmitter */
#define AT91_US_TXDIS	(1<<7)		/* disable transmitter */
#define AT91_US_RSTSTA	(1<<8)		/* reset status */
#define AT91_US_STTTO	(1<<11)		/* start timeout */

/* bit definitions within US_MR register */

#define AT91_US_NOPAR	(4<<9)		/* set no parity */
#define AT91_US_CHRL_8	(3<<6)		/* set 8-bit characters */


/* bit definitions within US_IER, IMR, ISR and CSR registers */

#define AT91_US_RXRDY	(1<<0)		/* Receiver Ready */
#define AT91_US_TXRDY	(1<<1)		/* Transmitter Ready */
#define AT91_US_RXBRK	(1<<2)		/* Receive Break */
#define AT91_US_ENDRX	(1<<3)		/* End of Rx Transfer */
#define AT91_US_ENDTX	(1<<4)		/* End of Tx Transfer */
#define AT91_US_OVRE	(1<<5)		/* Receiver Overrun */
#define AT91_US_FRAME	(1<<6)		/* Frame Error */
#define AT91_US_PARE	(1<<7)		/* Parity Error */
#define AT91_US_TIMEOUT	(1<<8)		/* Receiver Timeout */
#define AT91_US_TXEMPTY	(1<<9)		/* Transmitter empty */


#ifdef AT91_USE_PDC
#ifndef AT91_RXBUFF_SIZE
#define AT91_RXBUFF_SIZE	32	/* Size of Rx buffers */
#endif /* RXBUFF_SIZE */
#ifndef AT91_TXBUFF_SIZE
#define AT91_TXBUFF_SIZE	32	/* Size of Tx buffer */
#endif /* TXBUFF_SIZE */
#endif /* AT91_USE_PDC */


/* types */


typedef struct AT91_SIO_CHAN
    {
    /* must be first */

    SIO_CHAN	sio;		    /* standard SIO_CHAN element */

    /* callbacks */

    STATUS	    (*getTxChar) ();    /* installed Tx callback routine */
    STATUS	    (*putRcvChar) ();   /* installed Rx callback routine */
    void *	    getTxArg;	        /* argument to Tx callback routine */
    void *	    putRcvArg;	        /* argument to Rx callback routine */

    UINT32 *	regs;		    /* UART registers */
    int		    level;		        /* Interrupt level for this device */

    UINT32	    channelMode;	    /* such as INT, POLL modes */
    int		    baudRate;	        /* the current baud rate */
    UINT32	    xtal;		        /* UART clock frequency */ 
    BOOL        isUsart;            /* DBGU is compatible with USART */
#ifdef AT91_USE_PDC
    int		    buffInUse;	        /* 0 => buff A, 1 => buff B */
    UINT8 *	    rxBuffA;	        /* Rx buffer */
    UINT8 *	    rxBuffB;	        /* Rx buffer */
    UINT8 *	    txBuff;	            /* Tx buffer */
#endif

    } AT91_SIO_CHAN;

#ifndef AT91_USART_REG_READ
#define AT91_USART_REG_READ(pChan, reg, result) \
	((result) = (*(volatile UINT32 *)((UINT32)(pChan)->regs + (reg))))
#endif

#ifndef AT91_USART_REG_WRITE
#define AT91_USART_REG_WRITE(pChan, reg, data) \
	((*(volatile UINT32 *)((UINT32)(pChan)->regs + (reg))) = (data))
#endif


/* function declarations */

#if defined(__STDC__) || defined(__cplusplus)

IMPORT void at91SioInt      (AT91_SIO_CHAN *pChan);
IMPORT void at91SioDevInit  (AT91_SIO_CHAN *pChan);

#else

IMPORT void at91SioInt      ();
IMPORT void at91SioDevInit  ();

#endif	/* __STDC__ */
#endif  /* _ASMLANGUAGE */

#ifdef __cplusplus
}
#endif
 
#endif /* __INCat91Sioh */