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📄 cncodec.c

📁 基于UClinux系统下
💻 C
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/**************************************************
codec spi cortrol in  daisy chain mode

add "codec_cs"  in all functions which use WriteDrProSLIC or  ReadDrProSLIC
codec_cs:   codec chip select,  if  codec_cs==0 then select the first codec  if  codec_cs==1 then select the second codec ,and so on 
changed by liubing on sep 28,06
 **************************************************/
#include <linux/config.h>
#include <linux/kernel.h>

#include "common.h"
#include "cncodec.h"


/****************************************************
void set_led(unsigned char chan, unsigned char status)
	chan:0	Active lamp
		 1	line 0
		 2	line 1
	status:
 		0:    turn off
 		1:	turn on
****************************************************/

void set_led(int chan, unsigned char status)
{
	short data = 0;
	unsigned char pf_num=0; 

       if(chan<2)
       {
	   	pf_num=chan+5;
       }
	else if(chan>=2&&chan<4)
	{
		pf_num=chan+6;
	}
	else if(chan>=4&&chan<7)
	{
		pf_num=chan+8;
	}
	
	data=(0x0001<<pf_num);
	
	if(status)
	{	
              *pFIO_FLAG_S=data;
	}
	else
	{
		*pFIO_FLAG_C=data;
	}
}


/******************************************************
 void set_trunk(unsigned char chan,unsigned char opcode)
 ch:the logic channel
 opcode:
 	0: fxo handdown	
 	1: fxo handup
*******************************************************/
void set_trunk(unsigned char chan,unsigned char opcode)
{
	 WriteDr3050(5, opcode);                              //control line side status:status==0  on_hook;status==1  off_hook
}

/*************************************
void SetSlic(UINT8 codec_cs,int ch,int opcode)
{
 ch:the logic channel
 opcode:
 0:	close	1:	open
 2:	onhook	4:	ring
 5:	invert
*************************************/
void SetSlic(int ch,int opcode)
{
	WriteDrProSLIC(ch, 64, opcode);	
}

unsigned char ReadType(unsigned int addr)
{
	unsigned char type;

	type=*(volatile unsigned short *)addr;
	type=type&0x000f;

	return type;
}

/*************************************
 int initProSLIC(UINT8 codec_cs)
 Initialize the ProSLIC(321x)
*************************************/
int initProSLIC(UINT8 codec_cs)
{
	UINT8 t,v,i,family;

	if(codec_cs==0)        //reset  all of the Proslics(3210/15/16),just do it  at the first time .  add by liubing sep 28,06
		CPLD_WRITE_DATA(REST_PROSLIC, 0);
	
       for(i=0;i<25;i++)
             cpld_rw_sync(1);
	   
	CPLD_WRITE_DATA(CS_PROSLIC,1);
	CPLD_WRITE_DATA(CLK_PROSLIC,1);
	for(i=0;i<10;i++)
             cpld_rw_sync(1);

	if(codec_cs==0)
       	CPLD_WRITE_DATA(REST_PROSLIC,1);
	
       for(i=0;i<100;i++)
             cpld_rw_sync(1);

     
      if(codec_cs==0)     // codec  spi mode init ,change to  daisy chain mode. added by liubing on sep 28,06
      {
      		Write_cpld(0x00);
              Write_cpld(0x80);
      	}
	  
       for(i=0;i<18;i++)
             cpld_rw_sync(1);
	
	if (ReadDrProSLIC(codec_cs,8) != 2) 
	{
		CODEC_ASSERT(0);
		return CODEC_ERROR;
	}

	if (ReadDrProSLIC(codec_cs,64) != 0)
	{
		CODEC_ASSERT(0);
		return CODEC_ERROR;	
	}

	if (ReadDrProSLIC(codec_cs,11) != 0x33)
	{
		CODEC_ASSERT(0);
		return CODEC_ERROR;
	}

	if (ReadDrProSLIC (codec_cs,1) & 0x80)
	{
		v=3 + (0xf & ReadDrProSLIC(codec_cs,0)); 
	}
	else 
	{
		v= 0xf & ReadDrProSLIC(codec_cs,0); 
	}

	if (ReadDrProSLIC (codec_cs,1) & 0x80)         //3215 is 1;3210 is 0
	{
		t=(0x60&ReadDrProSLIC (codec_cs,6))>>5;        //T=0  is 3215;=3 is 3215m
	}
	else
	{
		t=(0x30 & ReadDrProSLIC(codec_cs,0)) >> 4;     //T=0  is 3215;=3 is 3215m
	}

	/*	initializeIndirectRegisters                            */
	



       /*add by lb on Dec 26,2007 follow AN35:STEP 9 */
       WriteInDrProSLIC(codec_cs,35,0x8000);	//		LOOP_CLSRE_FlTER
	WriteInDrProSLIC(codec_cs,36,0x8000);	//		RING_TRIP_FILTER
	WriteInDrProSLIC(codec_cs,37,0x8000);	//		TERM_LP_POLE_Q1Q2
	WriteInDrProSLIC(codec_cs,38,0x8000);	//		TERM_LP_POLE_Q3Q4
	WriteInDrProSLIC(codec_cs,39,0x8000);	//		TERM_LP_POLE_Q5Q6

       /*add by lb on Dec 26,2007 follow AN35:STEP 10 */
	 WriteDrProSLIC(codec_cs,8,0); 
	 WriteDrProSLIC(codec_cs,108,0xeb); 
	   
	 /*add by lb on Dec 26,2007 follow AN35:STEP 11 */
	  WriteDrProSLIC(codec_cs,74,INIT_DR74); 
	  WriteDrProSLIC(codec_cs,75,INIT_DR75); 

	
#if 0
	if (t == 0)        // Si3215
	{
		WriteDrProSLIC(codec_cs,67,0x17); 	
		WriteDrProSLIC(codec_cs,66,1);  //    Q7 should be set to OFF for si3210
	}

	if (v <= 2)  //  REVISION B   
	{
		WriteDrProSLIC(codec_cs,73,2);  // set common mode voltage to 6 volts
	}
#endif
	
	if (t == 0 || t==3) //  Si3210
	{
		powerUp(codec_cs);  // Turn on the DC-DC converter and verify voltage.
			
		/*powerLeakTest   Check for power leaks*/

		

		
		WriteDrProSLIC(codec_cs,14, 0x10); 
		
		for(i=0;i<100;i++)//add by chen long
		{
	             cpld_rw_sync(1);
		}
		if (ReadDrProSLIC(codec_cs,82) < 0x4)  
		{
			CODEC_ASSERT(0);
			return CODEC_ERROR;
		}
		powerUp(codec_cs); // Turn on the DC-DC converter again
	}

        calibrate(codec_cs);
       WriteDrProSLIC(codec_cs,2,	INIT_DR2+codec_cs*16	);  //0X00	PCM TX Clock Slot Low Byte (1 PCLK cycle/LSB)
	WriteDrProSLIC(codec_cs,3,	INIT_DR3	);  //0x00	PCM TX Clock Slot High Byte
	WriteDrProSLIC(codec_cs,4,	INIT_DR4+codec_cs*16     );  //0x00	PCM RX Clock Slot Low Byte (1 PCLK cycle/LSB)
	WriteDrProSLIC(codec_cs,5,	INIT_DR5	);  //0x00	PCM RX Clock Slot High Byte
	
	WriteDrProSLIC(codec_cs,1,	INIT_DR1	);//0X28	PCM Mode
	
	WriteDrProSLIC(codec_cs,8,	INIT_DR8	);//0X00	Loopbacks (digital loopback default)
	WriteDrProSLIC(codec_cs,9,	INIT_DR9);//0x00	Transmit and receive path gain and control
	WriteDrProSLIC(codec_cs,10,	INIT_DR10);//0X28	Initialization Two-wire impedance (600  and enabled)
	WriteDrProSLIC(codec_cs,11,	INIT_DR11);//0x33	Transhybrid Balance/Four-wire Return Loss


	WriteDrProSLIC(codec_cs,32,	INIT_DR32);//0x00	Oper. Oscillator 1 Controltone generation
	WriteDrProSLIC(codec_cs,33,	INIT_DR33);//0x00	Oper. Oscillator 2 Controltone generation
	WriteDrProSLIC(codec_cs,34,	INIT_DR34);//0X18	34 0x22 0x00 Initialization Ringing Oscillator Control
	WriteDrProSLIC(codec_cs,35,	INIT_DR35);//0x00	Oper. Pulse Metering Oscillator Control
	WriteDrProSLIC(codec_cs,36,	INIT_DR36);//0x00	36 0x24 0x00 Initialization OSC1 Active Low Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,37,	INIT_DR37);//0x00	37 0x25 0x00 Initialization OSC1 Active High Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,38,	INIT_DR38);//0x00	38 0x26 0x00 Initialization OSC1 Inactive Low Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,39,	INIT_DR39);//0x00	39 0x27 0x00 Initialization OSC1 Inactive High Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,40,	INIT_DR40);//0x00	40 0x28 0x00 Initialization OSC2 Active Low Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,41,	INIT_DR41);//0x00	41 0x29 0x00 Initialization OSC2 Active High Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,42,	INIT_DR42);//0x00	42 0x2A 0x00 Initialization OSC2 Inactive Low Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,43,	INIT_DR43);//0x00	43 0x2B 0x00 Initialization OSC2 Inactive High Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,44,	INIT_DR44);//0x00	44 0x2C 0x00 Initialization Pulse Metering Active Low Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,45,	INIT_DR45);//0x00	45 0x2D 0x00 Initialization Pulse Metering Active High Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,46,	INIT_DR46);//0x00	46 0x2E 0x00 Initialization Pulse Metering Inactive Low Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,47,	INIT_DR47);//0x00	47 0x2F 0x00 Initialization Pulse Metering Inactive High Byte (125 碌s/LSB)
	WriteDrProSLIC(codec_cs,48,	INIT_DR48);//0X80	48 0x30 0x00 0x80 Initialization Ringing Osc. Active Timer Low Byte (2 s,125 碌s/LSB)
	WriteDrProSLIC(codec_cs,49,	INIT_DR49);//0X3E	49 0x31 0x00 0x3E Initialization Ringing Osc. Active Timer High Byte (2 s,125 碌s/LSB)
	WriteDrProSLIC(codec_cs,50,	INIT_DR50);//0X00	50 0x32 0x00 0x00 Initialization Ringing Osc. Inactive Timer Low Byte (4 s, 125 碌s/LSB)
	WriteDrProSLIC(codec_cs,51,	INIT_DR51);//0X7D	51 0x33 0x00 0x7D Initialization Ringing Osc. Inactive Timer High Byte (4 s, 125 碌s/LSB)

	WriteDrProSLIC(codec_cs,63,	INIT_DR63);//0X54	63 0x3F 0x54 Initialization Ringing Mode Loop Closure Debounce Interval
	WriteDrProSLIC(codec_cs,67,	INIT_DR67);//0X1F	67 0x43 0x1F Initialization Automatic/Manual Control
	WriteDrProSLIC(codec_cs,69,	INIT_DR69);//0X0C	69 0x45 0x0A 0x0C Initialization Loop Closure Debounce Interval (1.25 ms/LSB)
	WriteDrProSLIC(codec_cs,70,	INIT_DR70);//0X0A	70 0x46 0x0A Initialization Ring Trip Debounce Interval (1.25 ms/LSB)

	WriteDrProSLIC(codec_cs,65,	INIT_DR65);//0X61	65 0x41 0x61 Initialization External Bipolar Transistor Settings
	WriteDrProSLIC(codec_cs,66,	INIT_DR66);//0X03	66 0x42 0x03 Initialization Battery Control
	WriteDrProSLIC(codec_cs,71,	INIT_DR71);//0X01	71 0x47 0x00 0x01 Initialization Off-Hook Loop Current Limit (20 mA + 3 mA/LSB)
	WriteDrProSLIC(codec_cs,72,	INIT_DR72);//0X20	72 0x48 0x20 Initialization On-Hook Voltage (open circuit voltage) = 48 V(1.5 V/LSB)
	WriteDrProSLIC(codec_cs,73,	INIT_DR73);//0X02	73 0x49 0x02 Initialization Common Mode VoltageVCM = 3 V(1.5 V/LSB)

	WriteInDrProSLIC(codec_cs,35,INIT_IR35);	//	0x8000	LOOP_CLSRE_FlTER
	WriteInDrProSLIC(codec_cs,36,INIT_IR36);	//	0x0320	RING_TRIP_FILTER
	WriteInDrProSLIC(codec_cs,37,INIT_IR37);	//	0x08c	TERM_LP_POLE_Q1Q2
	WriteInDrProSLIC(codec_cs,38,INIT_IR38);	//	0x0100	TERM_LP_POLE_Q3Q4
	WriteInDrProSLIC(codec_cs,39,INIT_IR39);	//	0x0010	TERM_LP_POLE_Q5Q6


      // step 28, Write all other direct registers and indirect registers
       WriteInDrProSLIC(codec_cs,0,INIT_IR0);	//	0x55C2	DTMF_ROW_0_PEAK
	WriteInDrProSLIC(codec_cs,1,INIT_IR1);	//	0x51E6	DTMF_ROW_1_PEAK
	WriteInDrProSLIC(codec_cs,2,INIT_IR2);	//	0x4B85	DTMF_ROW2_PEAK
	WriteInDrProSLIC(codec_cs,3,INIT_IR3);	//	0x4937	DTMF_ROW3_PEAK
	WriteInDrProSLIC(codec_cs,4,INIT_IR4);	//	0x3333	DTMF_COL1_PEAK
	WriteInDrProSLIC(codec_cs,5,INIT_IR5);	//	0x0202	DTMF_FWD_TWIST
	WriteInDrProSLIC(codec_cs,6,INIT_IR6);	//	0x0202	DTMF_RVS_TWIST
	WriteInDrProSLIC(codec_cs,7,INIT_IR7);	//	0x0198	DTMF_ROW_RATIO
	WriteInDrProSLIC(codec_cs,8,INIT_IR8);	//	0x0198	DTMF_COL_RATIO
	WriteInDrProSLIC(codec_cs,9,INIT_IR9);	//	0x0611	DTMF_ROW_2ND_ARM
	WriteInDrProSLIC(codec_cs,10,INIT_IR10);	//	0x0202	DTMF_COL_2ND_ARM
	WriteInDrProSLIC(codec_cs,11,INIT_IR11);	//	0x00E5	DTMF_PWR_MIN_
	WriteInDrProSLIC(codec_cs,12,INIT_IR12);	//	0x0A1C	DTMF_OT_LIM_TRES
	WriteInDrProSLIC(codec_cs,13,INIT_IR13);	//	0x7b30	OSC1_COEF
	WriteInDrProSLIC(codec_cs,14,INIT_IR14);	//	0x0063	OSC1X
	WriteInDrProSLIC(codec_cs,15,INIT_IR15);	//	0x0000	OSC1Y
	WriteInDrProSLIC(codec_cs,16,INIT_IR16);	//	0x7870	OSC2_COEF
	WriteInDrProSLIC(codec_cs,17,INIT_IR17);	//	0x007d	OSC2X
	WriteInDrProSLIC(codec_cs,18,INIT_IR18);	//	0x0000	OSC2Y
	WriteInDrProSLIC(codec_cs,19,INIT_IR19);	//	0x0000	RING_V_OFF
	WriteInDrProSLIC(codec_cs,20,INIT_IR20);	//	0x7EF0	RING_OSC
	WriteInDrProSLIC(codec_cs,21,INIT_IR21);	//	0x0160	RING_X
	WriteInDrProSLIC(codec_cs,22,INIT_IR22);	//	0x0000	RING_Y
	WriteInDrProSLIC(codec_cs,23,INIT_IR23);	//	0x2000	PULSE_ENVEL
	WriteInDrProSLIC(codec_cs,24,INIT_IR24);	//	0x2000	PULSE_X
	WriteInDrProSLIC(codec_cs,25,INIT_IR25);	//	0x0000	PULSE_Y
	WriteInDrProSLIC(codec_cs,26,INIT_IR26);	//	0x4000	RECV_DIGITAL_GAIN
	WriteInDrProSLIC(codec_cs,27,INIT_IR27);	//	0x4000	XMIT_DIGITAL_GAIN
	WriteInDrProSLIC(codec_cs,28,INIT_IR28);	//	0x1000	LOOP_CLOSE_TRES
	WriteInDrProSLIC(codec_cs,29,INIT_IR29);	//	0x3600	RING_TRIP_TRES
	WriteInDrProSLIC(codec_cs,30,INIT_IR30);	//	0x1000	COMMON_MIN_TRES
	WriteInDrProSLIC(codec_cs,31,INIT_IR31);	//	0x0200	COMMON_MAX_TRES
	WriteInDrProSLIC(codec_cs,32,INIT_IR32);	//	0x7c0  	PWR_ALARM_Q1Q2
	WriteInDrProSLIC(codec_cs,33,INIT_IR33);	//	0x2600	PWR_ALARM_Q3Q4
	WriteInDrProSLIC(codec_cs,34,INIT_IR34);	//	0x1B80	PWR_ALARM_Q5Q6
	
	WriteInDrProSLIC(codec_cs,40,INIT_IR40);	//	0x0C00	CM_BIAS_RINGING
	WriteInDrProSLIC(codec_cs,41,INIT_IR41);	//	0x0C00	DCDC_MIN_V
	WriteInDrProSLIC(codec_cs,43,INIT_IR43);	//	0x1000	LOOP_CLOSE_TRES Low
	WriteInDrProSLIC(codec_cs,99,INIT_IR99);	//	0x00DA	FSK 0 FREQ PARAM
	WriteInDrProSLIC(codec_cs,100,INIT_IR100);	//	0x6B60	FSK 0 AMPL PARAM
	WriteInDrProSLIC(codec_cs,101,INIT_IR101);	//	0x0074	FSK 1 FREQ PARAM
	WriteInDrProSLIC(codec_cs,102,INIT_IR102);	//	0x79C0	FSK 1 AMPl PARAM
	WriteInDrProSLIC(codec_cs,103,INIT_IR103);	//	0x1120	FSK 0to1 SCALER
	WriteInDrProSLIC(codec_cs,104,INIT_IR104);	//	0x3BE0	FSK 1to0 SCALER
	WriteInDrProSLIC(codec_cs,97,INIT_IR97);	//	0x0000	TRASMIT_FILTER
	
	
	WriteDrProSLIC(codec_cs,18,	INIT_DR18);//0xff	Normal Oper. Interrupt Register 1 (clear with 0xFF)
	WriteDrProSLIC(codec_cs,19,	INIT_DR19);//0xff	Normal Oper. Interrupt Register 2 (clear with 0xFF)
	WriteDrProSLIC(codec_cs,20,	INIT_DR20);//0xff	Normal Oper. Interrupt Register 3 (clear with 0xFF)
	WriteDrProSLIC(codec_cs,21,	INIT_DR21);//0xff	Interrupt Mask 1
	WriteDrProSLIC(codec_cs,22,	INIT_DR22);//0xff	Initialization Interrupt Mask 2
	WriteDrProSLIC(codec_cs,23,	INIT_DR23);//0xff	 Initialization Interrupt Mask 3
	
	WriteDrProSLIC(codec_cs,52,	INIT_DR52);//0X00	52 0x34 0x00 Normal Oper. FSK Data Bit
	
	WriteDrProSLIC(codec_cs,64,	INIT_DR64);//0x00	64 0x40 0x00 Normal Oper. Mode Byte聴primary control
	
	WriteDrProSLIC(codec_cs,74,	INIT_DR74);//0X32	74 0x4A 0x32 Initialization VBATH (ringing) = 75 V (1.5 V/LSB)
	WriteDrProSLIC(codec_cs,75,	INIT_DR75);//0X10	75 0x4B 0x10 Initialization VBATL (off-hook) = 24 V (TRACK = 0)(1.5 V/LSB)

	if (ReadDrProSLIC (codec_cs,1) & 0x80)//t = chipType();
	{
	      t=(0x60&ReadDrProSLIC (codec_cs,6))>>5;
	}
	else
	{
	      t=(0x30 & ReadDrProSLIC(codec_cs,0)) >> 4; 
	}

	if (t != 3)
	{
		WriteDrProSLIC(codec_cs,92,	INIT_DR92	);//0x7f	92 0x5C 0xFF 7F Initialization DCDC Converter PWM Period (61.035 ns/LSB)
	}
	else
	{
		WriteDrProSLIC(codec_cs,92,	INIT_SI3210M_DR92	);//0x7f	92 0x5C 0xFF 7F Initialization DCDC Converter PWM Period (61.035 ns/LSB)
	}

	WriteDrProSLIC(codec_cs,93,	INIT_DR93	);//0x14	93 0x5D 0x14 0x19 Initialization DCDC Converter Min. Off Time (61.035 ns/LSB)
	WriteDrProSLIC(codec_cs,96,	INIT_DR96	);//0x00	96 0x60 0x1F Initialization Calibration Control Register 1(written second and starts calibration)
	WriteDrProSLIC(codec_cs,97,	INIT_DR97	);//0X1F	97 0x61 0x1F Initialization Calibration Control Register 2(written before Register 96)
	WriteDrProSLIC(codec_cs,98,	INIT_DR98	);//0X10	98 0x62 0x10 Informative Calibration result (see data sheet)
	WriteDrProSLIC(codec_cs,99,	INIT_DR99	);//0X10	99 0x63 0x10 Informative Calibration result (see data sheet)
	WriteDrProSLIC(codec_cs,100,	INIT_DR100	);//0X11	100 0x64 0x11 Informative Calibration result (see data sheet)
	WriteDrProSLIC(codec_cs,101,	INIT_DR101	);//0X11	101 0x65 0x11 Informative Calibration result (see data sheet)
	WriteDrProSLIC(codec_cs,102,	INIT_DR102	);//0x08	102 0x66 0x08 Informative Calibration result (see data sheet)
	WriteDrProSLIC(codec_cs,103,	INIT_DR103	);//0x88	103 0x67 0x88 Informative Calibration result (see data sheet)
	WriteDrProSLIC(codec_cs,104,	INIT_DR104	);//0x00	104 0x68 0x00 Informative Calibration result (see data sheet)
	WriteDrProSLIC(codec_cs,105,	INIT_DR105	);//0x00	105 0x69 0x00 Informative Calibration result (see data sheet)
	WriteDrProSLIC(codec_cs,106,	INIT_DR106	);//0x20	106 0x6A 0x20 Informative Calibration result (see data sheet)
	WriteDrProSLIC(codec_cs,107,	INIT_DR107	);//0x08	107 0x6B 0x08 Informative Calibration result (see data sheet)
	WriteDrProSLIC(codec_cs,108,	INIT_DR108	);//0xEB	108 0x63 0x00 0xEB Initialization Feature enhancement register

	

	/*clearInterrupts*/
	WriteDrProSLIC(	codec_cs,18	,	INIT_DR18	);//0xff	Normal Oper. Interrupt Register 1 (clear with 0xFF)
	WriteDrProSLIC(	codec_cs,19	,	INIT_DR19	);//0xff	Normal Oper. Interrupt Register 2 (clear with 0xFF)
	WriteDrProSLIC(	codec_cs,20	,	INIT_DR20	);//0xff	Normal Oper. Interrupt Register 3 (clear with 0xFF)

	WriteDrProSLIC(codec_cs,64,1);	 

	cpld_rw_sync(1);

	family = (ReadDrProSLIC (codec_cs,1) & 0x80);
	
#if CODEC_DEBUG
	if (family==0)
	{
		printk("Si3210 ProSLIC\n");
	}
	else
	{
		printk("Si3215/16 ProSLIC\n");
	}
#endif

	if (verifyIndirectRegisters(codec_cs,family)) 
	{
		return CODEC_ERROR;
	}

#if CODEC_DEBUG
	 printk("Initializing ProSLIC si3215 OK\n");
	 printk("   %x   \n",ReadDrProSLIC (codec_cs,8));
	 printk("  reg 9= %x   \n",ReadDrProSLIC (codec_cs,9));
	 printk("  in reg26= %x   \n",ReadInDrProSLIC (codec_cs,26));
	 printk("  in reg27= %x   \n",ReadInDrProSLIC (codec_cs,27));
#endif

	return CODEC_OK;

}


/*************************************
UINT8 ReadDrProSLIC(UINT8 codec_cs,UINT8 addr)
 read the value of direct register,daisy chain mode
*************************************/

UINT8 ReadDrProSLIC(UINT8 codec_cs,UINT8 addr)
{
	UINT8 data;
	
	addr=addr|0x80;
	Write_cpld((UINT8)(1<<(codec_cs)));//   write chip select first
	Write_cpld(addr);
	data = Read_cpld();
	cpld_rw_sync(1);
	return data;
}
/*****************************************
void WriteDrProSLIC(UINT8 codec_cs,UINT8 addr,UINT8 data)
 write data to the direct register
 
*****************************************/
void WriteDrProSLIC(UINT8 codec_cs,UINT8 addr,UINT8 data)
{
	addr=addr&0x7f;
	Write_cpld((UINT8)(1<<(codec_cs)));
	Write_cpld(addr);
	Write_cpld(data);
}
/*******************************************
void WriteInDrProSLIC(UINT8 codec_cs,UINT8 addr,UINT16 data)
 write data to the indirect register  
*******************************************/
void WriteInDrProSLIC(UINT8 codec_cs,UINT8 addr,UINT16 data)
{
       UINT8 new_address;
	new_address=possibleAddressCorrect(codec_cs,addr);

	if(new_address == 0xff)
	{
		//printk("%04x - IGNORING WRITE TO REG %d\n", new_address,addr);
		return;   // Don't attempt to write an invalid si3215 address
	}

      while (ReadDrProSLIC(codec_cs,I_STATUS))   
      	{  
      	      ;  
      }
	  
	WriteDrProSLIC(codec_cs,IDA_LO,(UINT8)(data & 0xFF));
	WriteDrProSLIC(codec_cs,IDA_HI,(UINT8)((data & 0xFF00)>>8));
	WriteDrProSLIC(codec_cs,IAA,new_address);
	
}

/*************************************
UINT16 ReadInDrProSLIC(UINT8 codec_cs,UINT8 addr)

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