k9f2808u0c.c

为了满足每个项目终端的需求

/*
#include <stdio.h>

#include <stdlib.h>
#include <string.h>
*/
/*
#define U32	unsigned int
#define U16	unsigned short
#define U8	unsigned char
*/
#include "2410addr.h"
#include "k9f2808u0c.h"


/*
 *=========================================================
 *                    !!!!NOTES!!!!
 * The following 6 MACROs is IMPORTENT for this tools
 * You should select diffrent MACROs for your function.
 * Then build the tool and start debug
 * load the target code to 0x31000000
 * set breakpoint on the last line 'return 0'
 * click run,OK..............
 *=========================================================
 */

//#define PPCBOOT_PRG		//MUST DEFINED for PPCBOOT PROGRAM
//#define KERNEL_PRG		//MUST DEFINED for KERNEL PROGRAM
#define RAMDISK_PRG		//MUST DEFINED for RAMDISK PROGRAM

#define ERASE_OPRATION
#define WRITE_OPRATION
//#define READ_OPRATION



#define NF_CMD(cmd)	{rNFCMD=cmd;}
#define NF_ADDR(addr)	{rNFADDR=addr;}
#define NF_nFCE_L()	{rNFCONF&=~(1<<11);}
#define NF_nFCE_H()	{rNFCONF|=(1<<11);}
#define NF_RSTECC()	{rNFCONF|=(1<<12);}
#define NF_RDDATA() 	(rNFDATA)
#define NF_WRDATA(data) {rNFDATA=data;}

#define NF_WAITRB()    {while(!(rNFSTAT&(1<<0)));}
	    //wait tWB and check F_RNB pin.

#define ID_K9S1208V0M	0xec76
#define ID_K9F2808U0C	0xec73

#define NF_BLOCK_SIZE	0x4000
#define NF_BLOCK_NUMBER 1024

#if 1
// HCLK=100Mhz
#define TACLS		0//0  //1clk(0ns)
#define TWRPH0		3//2  //3clk(25ns)
#define TWRPH1		0//0  //1clk(10ns)  //TACLS+TWRPH0+TWRPH1>=50ns
#else
// HCLK=50Mhz
#define TACLS		0  //1clk(0ns)
#define TWRPH0		1  //2clk(25ns)
#define TWRPH1		0  //1clk(10ns)
#endif

#ifdef BAD_CHECK
#undef BAD_CHECK
#endif



static U8 seBuf[16]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
// 1block=(512+16)bytes x 32pages
// 4096block

// A[23:14][13:9]
//  block   page


/*
static int NF_MarkBadBlock(U32 block)
{
    int i;
    U32 blockPage=(block<<5);

    seBuf[0]=0xff;
    seBuf[1]=0xff;
    seBuf[2]=0xff;
    seBuf[5]=0x44;   // Bad blcok mark=0

    NF_nFCE_L();
    NF_CMD(0x50);
    NF_CMD(0x80);   // Write 1st command

    NF_ADDR(0x0);		    // The mark of bad block is
    NF_ADDR(blockPage&0xff);	    // marked 5th spare array
    NF_ADDR((blockPage>>8)&0xff);   // in the 1st page.
    NF_ADDR((blockPage>>16)&0xff);

    for(i=0;i<16;i++)
    {
	NF_WRDATA(seBuf[i]);	// Write spare array
    }

    NF_CMD(0x10);   // Write 2nd command

    //Delay(1);  //tWB = 100ns.

    NF_WAITRB();      // Wait tPROG(200~500us)

    NF_CMD(0x70);

   // Delay(1);	 //twhr=60ns//

    if (NF_RDDATA()&0x1) // Spare arrray write error
    {
    	NF_nFCE_H();
    	//printf("[Program error is occurred but ignored]\n");
    }
    else
    {
    	NF_nFCE_H();
    }

    //printf("[block #%d is marked as a bad block]\n",block);
    return 1;
}
*/

int NF_ReadPage(U32 block,U32 page,U8 *buffer)
{
    int i;
    register U8 * bufPt=buffer;
    unsigned int blockPage;
    U8 ecc0,ecc1,ecc2;

    U8 se[16];
    U8 ReadTmp;

    //page=page&0x1f;
    blockPage=(block<<5)+page;
    NF_RSTECC();    // Initialize ECC

    NF_nFCE_L();
    NF_CMD(0x00);   // Read command
    NF_ADDR(0);	    // Column = 0
    NF_ADDR(blockPage&0xff);	    //
    NF_ADDR((blockPage>>8)&0xff);   // Block & Page num.
    NF_ADDR((blockPage>>16)&0xff);  //

    for(i=0;i<10;i++); //wait tWB(100ns)

    NF_WAITRB();    // Wait tR(max 12us)


#if 1 //0
    i=NF_PAGE_SIZE;
    while(i--!=0)
    {
    	*bufPt++=NF_RDDATA();	// Read one page
    }
#elif 0
    //DMA doens't work.
    rSRCPND=BIT_DMA0;
    rDISRC0=0x4e00000c; //NF_RDDATA()
    rDISRCC0=(1<<0); //arc=AHB,src_addr=fix
    rDIDST0=(unsigned)bufPt;
    rDIDSTC0=(0<<0); //dst=AHB,dst_addr=inc;
    rDCON0=(1<<31)|(1<<30)|(1<<29)|(1<<28)|(1<<27)|(0<<23)|(1<<22)|(0<<20)|(512/4);
	   //Handshake,AHB,interrupt,(4-burst),whole,S/W,no_autoreload,byte,count=512;
    rDMASKTRIG0=(1<<1)|(1<<0);

    while(!(rSRCPND & BIT_DMA0));
    rSRCPND=BIT_DMA0;

#elif 0
    __RdPage512(bufPt);
#endif

    ecc0=rNFECC0;
    ecc1=rNFECC1;
    ecc2=rNFECC2;

    se[0]=NF_RDDATA();
    se[1]=NF_RDDATA();
    se[2]=NF_RDDATA();
    ReadTmp = NF_RDDATA();
    ReadTmp = NF_RDDATA();
    se[5]=NF_RDDATA();

    NF_nFCE_H();

    if(ecc0==se[0] && ecc1==se[1] && ecc2==se[2] && se[5]==0xff)
    {
	//Uart_Printf("[ECC OK:%x,%x,%x]\n",se[0],se[1],se[2]);
    	return 1;
    }
    else
    {
	//Uart_Printf("[ECC ERROR(RD):read:%x,%x,%x, reg:%x,%x,%x]\n",
		//se[0],se[1],se[2],ecc0,ecc1,ecc2);
    	return 0;
    }
}

void NF_WritePage(U32 block,U32 page,U8 *buffer)
//int NF_WritePage(U32 block,U32 page,U8 *buffer)
{
    int i;
    U32 blockPage=(block<<5)+page;
    U8 *bufPt=buffer;

    NF_nFCE_L();
    NF_CMD(0x0);
    NF_CMD(0x80);		    // Write 1st command
    NF_ADDR(0);			    // Column 0
    NF_ADDR(blockPage&0xff);	    //
    NF_ADDR((blockPage>>8)&0xff);   // Block & page num.
    NF_ADDR((blockPage>>16)&0xff);  //

    for(i=0;i<NF_PAGE_SIZE;i++)
    {
	NF_WRDATA(*bufPt++);	// Write one page to NFM from buffer
    }


    NF_CMD(0x10);   // Write 2nd command

    //Delay(1);	    //tWB = 100ns.
    for(i=0;i<10;i++);

    NF_WAITRB();    //wait tPROG 200~500us;

    NF_CMD(0x70);   // Read status command

//    Delay(1);	    //twhr=60ns

    if (NF_RDDATA()&0x1) // Page write error
    {
    	NF_nFCE_H();
	//printf("[PROGRAM_ERROR:block#=%d]\n",block);
	//NF_MarkBadBlock(block); //???cacel the option by FHC-JISX
	//return 0;
    }
    else
    {
    	NF_nFCE_H();
		//return 1;
    }

}

int NF_EraseBlock(U32 block)
{
    int i;
    U32 blockPage=(block<<5);

#if 0/*BAD_CHECK*/
    if(NF_IsBadBlock(block) && block!=0) //block #0 can't be bad block for NAND boot
	return 0;
#endif

    NF_nFCE_L();

    NF_CMD(0x60);   // Erase one block 1st command

    NF_ADDR(blockPage&0xff);	    // Page number=0
    NF_ADDR((blockPage>>8)&0xff);
    NF_ADDR((blockPage>>16)&0xff);

    NF_CMD(0xd0);   // Erase one blcok 2nd command

    //wait tWB(100ns) cacel by FHC-JISX
    for(i=0;i<10;i++);

    NF_WAITRB();    // Wait tBERS max 3ms.
    NF_CMD(0x70);   // Read status command

    if (NF_RDDATA()&0x1) // Erase error
    {
    	NF_nFCE_H();
	//printf("[ERASE_ERROR:block#=%d]\n",block);
	//NF_MarkBadBlock(block);//???cacel the option by FHC-JISX
	return 0;
    }
    else
    {
    	NF_nFCE_H();
        return 1;
    }

}


int NF_IsBadBlock(U32 block)
{
    int i;
    unsigned int blockPage;
    U8 data;


    blockPage=(block<<5);	// For 2'nd cycle I/O[7:5]

    NF_nFCE_L();
    NF_CMD(0x50);		// Spare array read command
    NF_ADDR(517&0xf);		// Read the mark of bad block in spare array(M addr=5)
    NF_ADDR(blockPage&0xff);	// The mark of bad block is in 0 page
    NF_ADDR((blockPage>>8)&0xff);   // For block number A[24:17]
    NF_ADDR((blockPage>>16)&0xff);  // For block number A[25]

   for(i=0;i<10;i++);	// wait tWB(100ns) //?????

    NF_WAITRB();	// Wait tR(max 12us)

    data=NF_RDDATA();

    NF_nFCE_H();

    if(data!=0xff)
    {
    	//Uart_Printf("[block %d has been marked as a bad block(%x)]\n",block,data);
    	return 1;
    }
    else
    {
    	return 0;
    }
}



void NF_Reset(void)
{
    int i;


    NF_nFCE_L();

    NF_CMD(0xFF);	//reset command

    for(i=0;i<10;i++);  //tWB = 100ns.

    NF_WAITRB();      //wait 200~500us;

    NF_nFCE_H();
}



void NF_Init(void)
{
    rNFCONF=0xf830;
    //(1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0);
    // 1  1    1     1,   1      xxx,  r xxx,   r xxx
    // En 512B 4step ECCR nFCE=H tACLS   tWRPH0   tWRPH1

    NF_Reset();
}




/*by FHC-JISX for NAND FLASH TEST*/
int NF_ReadId(void)
{
    int i, mfr,id;

    /* Chip Enable */ 
    NF_nFCE_L();
    for(i=0; i<10; i++);

    /* read nand flash ID CMD */
    NF_CMD(0x90);   // Read ID command

    /* Write Address */
    NF_ADDR(0 & 0xff);

    NF_ADDR((0 >> 9) & 0xff);
    NF_ADDR((0 >> 17) & 0xff);
    NF_ADDR((0 >> 25) & 0xff);

    /* wait the idle state */
    for(i=0; i<10; i++);
    NF_WAITRB();

	/* read the id data */
	mfr = NF_RDDATA();
	id = NF_RDDATA();

    /* chip Disable */
    NF_nFCE_H();

    return 0;

}


int main(void)
{
	U8 *pBufPtr;
	int pBufSize;
	int iProgSize;
	int iBlockIndex;
	int iLoop;

/*
	int jLoop;
	for(iLoop=0;iLoop<1;iLoop++)
	{
		*(volatile unsigned  *)0x56000050 = 0x5555;
		for(jLoop = 0; jLoop<10;jLoop++)
		{
			*(volatile unsigned  *)0x56000054 = 0x01;//01;//00;		
		}
		for(jLoop = 0; jLoop<10;jLoop++)
		{
			*(volatile unsigned  *)0x56000054 = 0x00;//00;//01;		
		}
		for(jLoop = 0; jLoop<10;jLoop++)
		{
			*(volatile unsigned  *)0x56000054 = 0x08;//08;//09;		
		}
		for(jLoop = 0; jLoop<10;jLoop++)
		{
			*(volatile unsigned  *)0x56000054 = 0x09;//09;//08;		
		}
		for(jLoop = 0; jLoop<10;jLoop++)
		{
			*(volatile unsigned  *)0x56000054 = 0x01;		
		}		
	
	}
*/

/*
	NF_Init();

*/
	rNFCONF=0xf830;
	//(1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0);
	// 1  1    1     1,   1      xxx,  r xxx,   r xxx
	// En 512B 4step ECCR nFCE=H tACLS   tWRPH0   tWRPH1

	NF_Reset();

	//printf("this is a test\n");
	/* Test for LED */
	*(volatile unsigned  *)0x56000050 = 0x5555;
	*(volatile unsigned  *)0x56000054 = 0x00;
	NF_ReadId();


#ifdef ERASE_OPRATION
	/*
	 * !!!!NOTES!!!!
	 * Erase Nand Flash(BIN CODE)
	 */
	#if defined (PPCBOOT_PRG)
		pBufSize = 0x20000; /* default size! 128KB*/
		iBlockIndex = 0;
		iProgSize = 0;
	#elif defined (KERNEL_PRG)
		pBufSize = 0x100000; /* default size! 1MB*/
		iBlockIndex = 16;
		iProgSize = 0;
	#elif defined (RAMDISK_PRG)
		pBufSize = 0x440000; /* default size! >4MB*/
		iBlockIndex = 80;
		iProgSize = 0;
	#endif
	*(volatile unsigned  *)0x56000054 = 0xFF;
	while(1)
	{

		NF_EraseBlock(iBlockIndex);
		iProgSize+=NF_BLOCK_SIZE;
		if(iProgSize >= pBufSize)
		{
			break;
		}
		iBlockIndex++;		
	}
	*(volatile unsigned  *)0x56000054 = 0x00;
#endif

#ifdef WRITE_OPRATION
	/*
	 * !!!!NOTES!!!!
	 * Write BIN CODE to Nand Flash
	 * First,Must load the BIN CODE to 0x31000000
	 */
	#if defined (PPCBOOT_PRG)
		pBufPtr = (U8 *)0x31000000;
		pBufSize = 0x20000; /* default size! 128KB*/
		iBlockIndex = 0;
		iProgSize = 0;
	#elif defined (KERNEL_PRG)
		pBufPtr = (U8 *)0x31000000;
		pBufSize = 0x100000; /* default size! 1MB*/
		iBlockIndex = 16;
		iProgSize = 0;
	#elif defined (RAMDISK_PRG)
		pBufPtr = (U8 *)0x31000000;
		pBufSize = 0x440000; /* default size! >4MB*/
		iBlockIndex = 80;
		iProgSize = 0;
	#endif
	*(volatile unsigned  *)0x56000054 = 0xFF;
	while(1)
	{
		for(iLoop = 0; iLoop<NF_PAGE_NUMBER;iLoop++)
		{
			NF_WritePage(iBlockIndex,iLoop,pBufPtr);
			pBufPtr += NF_PAGE_SIZE;
		}
		iProgSize+=NF_BLOCK_SIZE;
		
		if(iProgSize >= pBufSize)
		{
			break;
		}
		iBlockIndex++;
	}
	*(volatile unsigned  *)0x56000054 = 0x00;
#endif
#ifdef READ_OPRATION
	/*
	 * !!!!NOTES!!!!
	 * read BIN CODE from nand flash
	 * read the BIN CODE to 0x31800000
	 */
	#if defined (PPCBOOT_PRG)
		pBufPtr = (U8 *)0x31800000;
		pBufSize = 0x20000; /* default size! 128KB*/
		iBlockIndex = 0;
		iProgSize = 0;
	#elif defined (KERNEL_PRG)
		pBufPtr = (U8 *)0x31800000;
		pBufSize = 0x100000; /* default size! 1MB*/
		iBlockIndex = 16;
		iProgSize = 0;
	#elif defined (RAMDISK_PRG)
		pBufPtr = (U8 *)0x31800000;
		pBufSize = 0x440000; /* default size! >4MB*/
		iBlockIndex = 80;
		iProgSize = 0;
	#endif

	*(volatile unsigned  *)0x56000054 = 0xFF;
	while(1)
	{
		for(iLoop = 0; iLoop<NF_PAGE_NUMBER;iLoop++)
		{
			NF_ReadPage(iBlockIndex,iLoop,pBufPtr);
			pBufPtr += NF_PAGE_SIZE;
		}
		iProgSize+=NF_BLOCK_SIZE;
		
		if(iProgSize >= pBufSize)
		{
			break;
		}
		iBlockIndex++;
	}
	*(volatile unsigned  *)0x56000054 = 0x00;

#endif

	return 0;

}