ps2_keyboard_interface.map.eqn

实现PS/2接口与RS-232接口的数据传输

--E1L12Q is uart_if:inst3|data_out[6]~reg0
E1L12Q = DFFEAS(E1L15, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  ,  ,  );


--E1L02Q is uart_if:inst3|data_out[5]~reg0
E1L02Q = DFFEAS(E1L25, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  ,  ,  );


--E1L91Q is uart_if:inst3|data_out[4]~reg0
E1L91Q = DFFEAS(E1L35, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  ,  ,  );


--E1L81Q is uart_if:inst3|data_out[3]~reg0
E1L81Q = DFFEAS(E1L45, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  ,  ,  );


--E1L1 is uart_if:inst3|LessThan~170
E1L1 = !E1L81Q # !E1L91Q # !E1L02Q # !E1L12Q;


--E1L71Q is uart_if:inst3|data_out[2]~reg0
E1L71Q = DFFEAS(E1L55, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  ,  ,  );


--E1L61Q is uart_if:inst3|data_out[1]~reg0
E1L61Q = DFFEAS(E1L65, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  ,  ,  );


--E1L51Q is uart_if:inst3|data_out[0]~reg0
E1L51Q = DFFEAS(E1L75, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  ,  ,  );


--E1L2 is uart_if:inst3|LessThan~171
E1L2 = E1L1 # !E1L51Q # !E1L61Q # !E1L71Q;


--E1L32Q is uart_if:inst3|data_out[7]~reg0
E1L32Q = DFFEAS(E1L85, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  ,  ,  );


--E1_rdn is uart_if:inst3|rdn
E1_rdn = DFFEAS(E1L17, E1_cnt[3], !B1_rx_released,  ,  ,  ,  ,  ,  );


--E1L37 is uart_if:inst3|read_en~134
E1L37 = E1L2 & !E1_read_en & !E1L32Q & !E1_rdn;


--H1_rbr[6] is uart_if:inst3|uart:U1|rcvr:u1|rbr[6]
H1_rbr[6] = DFFEAS(H1_rsr[6], H1_clkdiv[3], B1_rx_released,  , H1L04,  ,  ,  ,  );


--H1_rbr[5] is uart_if:inst3|uart:U1|rcvr:u1|rbr[5]
H1_rbr[5] = DFFEAS(H1_rsr[5], H1_clkdiv[3], B1_rx_released,  , H1L04,  ,  ,  ,  );


--H1_rbr[7] is uart_if:inst3|uart:U1|rcvr:u1|rbr[7]
H1_rbr[7] = DFFEAS(H1_rsr[7], H1_clkdiv[3], B1_rx_released,  , H1L04,  ,  ,  ,  );


--E1L47 is uart_if:inst3|read_en~135
E1L47 = E1_rdn & H1_rbr[6] & H1_rbr[5] & !H1_rbr[7];


--H1_rbr[4] is uart_if:inst3|uart:U1|rcvr:u1|rbr[4]
H1_rbr[4] = DFFEAS(H1_rsr[4], H1_clkdiv[3], B1_rx_released,  , H1L04,  ,  ,  ,  );


--H1_rbr[1] is uart_if:inst3|uart:U1|rcvr:u1|rbr[1]
H1_rbr[1] = DFFEAS(H1_rsr[1], H1_clkdiv[3], B1_rx_released,  , H1L04,  ,  ,  ,  );


--H1_rbr[3] is uart_if:inst3|uart:U1|rcvr:u1|rbr[3]
H1_rbr[3] = DFFEAS(H1_rsr[3], H1_clkdiv[3], B1_rx_released,  , H1L04,  ,  ,  ,  );


--H1_rbr[2] is uart_if:inst3|uart:U1|rcvr:u1|rbr[2]
H1_rbr[2] = DFFEAS(H1_rsr[2], H1_clkdiv[3], B1_rx_released,  , H1L04,  ,  ,  ,  );


--E1L57 is uart_if:inst3|read_en~136
E1L57 = H1_rbr[4] & H1_rbr[1] & !H1_rbr[3] & !H1_rbr[2];


--H1_rbr[0] is uart_if:inst3|uart:U1|rcvr:u1|rbr[0]
H1_rbr[0] = DFFEAS(H1_rsr[0], H1_clkdiv[3], B1_rx_released,  , H1L04,  ,  ,  ,  );


--E1L67 is uart_if:inst3|read_en~137
E1L67 = !E1L37 & (H1_rbr[0] # !E1L57 # !E1L47);


--E1_data_out_d[7] is uart_if:inst3|data_out_d[7]
E1_data_out_d[7] = DFFEAS(E1L94, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  , E1_read_en,  );


--E1_data_out_d[0] is uart_if:inst3|data_out_d[0]
E1_data_out_d[0] = DFFEAS(E1L62, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  , E1_read_en,  );


--E1_data_out_d[1] is uart_if:inst3|data_out_d[1]
E1_data_out_d[1] = DFFEAS(E1L92, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  , E1_read_en,  );


--E1_data_out_d[2] is uart_if:inst3|data_out_d[2]
E1_data_out_d[2] = DFFEAS(E1L23, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  , E1_read_en,  );


--E1_data_out_d[3] is uart_if:inst3|data_out_d[3]
E1_data_out_d[3] = DFFEAS(E1L53, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  , E1_read_en,  );


--E1L44 is uart_if:inst3|data_out_d[6]~199
E1L44 = E1_data_out_d[0] & E1_data_out_d[1] & E1_data_out_d[2] & E1_data_out_d[3];


--E1_data_out_d[4] is uart_if:inst3|data_out_d[4]
E1_data_out_d[4] = DFFEAS(E1L83, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  , E1_read_en,  );


--E1_data_out_d[5] is uart_if:inst3|data_out_d[5]
E1_data_out_d[5] = DFFEAS(E1L14, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  , E1_read_en,  );


--E1_data_out_d[6] is uart_if:inst3|data_out_d[6]
E1_data_out_d[6] = DFFEAS(E1L64, E1_cnt[3], !B1_rx_released,  , E1L22,  ,  , E1_read_en,  );


--E1L54 is uart_if:inst3|data_out_d[6]~200
E1L54 = E1_data_out_d[5] & E1_data_out_d[6];


--E1L3 is uart_if:inst3|LessThan~172
E1L3 = E1_data_out_d[7] # E1L44 & E1_data_out_d[4] & E1L54;


--E1L87 is uart_if:inst3|read_once~60
E1L87 = E1_read_once # E1L3 & !J1_tsre & !J1_tbre;


--J1L95 is uart_if:inst3|uart:U1|txmit:u2|tsre~148
J1L95 = J1_no_bits_sent[3] & J1_tsre & (J1_no_bits_sent[0] # !J1_no_bits_sent[2]) # !J1_no_bits_sent[3] & (J1_tsre # !J1_no_bits_sent[2] & J1_no_bits_sent[0]);


--J1L84 is uart_if:inst3|uart:U1|txmit:u2|tbre~73
J1L84 = J1L2 # J1L74 & J1_tbre # !J1L13;


--J1_tsr[5] is uart_if:inst3|uart:U1|txmit:u2|tsr[5]
J1_tsr[5] = DFFEAS(J1L66, !J1_clkdiv[3], !B1_rx_released,  , J1L65,  ,  ,  ,  );


--J1_tbr[4] is uart_if:inst3|uart:U1|txmit:u2|tbr[4]
J1_tbr[4] = DFFEAS(E1_din[4], E1_wrn, !B1_rx_released,  ,  ,  ,  ,  ,  );


--J1L56 is uart_if:inst3|uart:U1|txmit:u2|tsr~541
J1L56 = J1L03 & J1_tsr[5] # !J1L03 & (J1_tbr[4]);


--E1_din[3] is uart_if:inst3|din[3]
E1_din[3] = DFFEAS(F1L31, E1_cnt[3], !B1_rx_released,  , E1L76,  ,  ,  ,  );


--F1L9Q is data_buf:inst4|data_in_buf[2]~609
F1L9Q = DFFEAS(F1L8, D1_acc[12], !B1_rx_released,  , F1L1,  ,  ,  ,  );


--F1L01 is data_buf:inst4|data_in_buf[2]~611
F1L01 = B1_rx_released & (F1L9Q $ F1L8) # !B1_rx_released & B1_rx_ascii[2];


--F1L5 is data_buf:inst4|data_in_buf[1]~53
F1L5 = B1_rx_released & (F1L5) # !B1_rx_released & B1_rx_ascii[1];


--F1_i[0] is data_buf:inst4|i[0]
F1_i[0] = DFFEAS(F1L13, D1_acc[12], !B1_rx_released,  ,  ,  ,  ,  ,  );


--F1L82 is data_buf:inst4|i~91
F1L82 = F1_i[3] # F1_i[2] & F1_i[1] & F1_i[0];


--F1L92 is data_buf:inst4|i~92
F1L92 = F1_i[2] & (F1_i[3] # !F1_i[0] # !F1_i[1]) # !F1_i[2] & (F1_i[1] & F1_i[0]);


--F1L03 is data_buf:inst4|i~93
F1L03 = F1_i[1] & (F1_i[3] & F1_i[2] # !F1_i[0]) # !F1_i[1] & (F1_i[0]);


--E1L5 is uart_if:inst3|add~203
E1L5 = E1_cnt[1] & E1_cnt[0];


--E1L15 is uart_if:inst3|data_out~181
E1L15 = E1_data_out_d[6] & !E1_read_en;


--E1L22 is uart_if:inst3|data_out[7]~182
E1L22 = E1_read_en # !E1_read_once & !J1_tsre & !J1_tbre;


--E1L25 is uart_if:inst3|data_out~183
E1L25 = E1_data_out_d[5] & !E1_read_en;


--E1L35 is uart_if:inst3|data_out~184
E1L35 = E1_data_out_d[4] & !E1_read_en;


--E1L45 is uart_if:inst3|data_out~185
E1L45 = E1_data_out_d[3] & !E1_read_en;


--E1L55 is uart_if:inst3|data_out~186
E1L55 = E1_data_out_d[2] & !E1_read_en;


--E1L65 is uart_if:inst3|data_out~187
E1L65 = E1_data_out_d[1] & !E1_read_en;


--E1L75 is uart_if:inst3|data_out~188
E1L75 = E1_data_out_d[0] & !E1_read_en;


--E1L85 is uart_if:inst3|data_out~189
E1L85 = E1_data_out_d[7] & !E1_read_en;


--H1_data_ready is uart_if:inst3|uart:U1|rcvr:u1|data_ready
H1_data_ready = DFFEAS(VCC, D1_acc[12], H1L02,  , H1L14,  ,  ,  ,  );


--E1_rdn_d2 is uart_if:inst3|rdn_d2
E1_rdn_d2 = DFFEAS(E1_rdn_d, E1_cnt[3], !B1_rx_released,  ,  ,  ,  ,  ,  );


--E1_rdn_d is uart_if:inst3|rdn_d
E1_rdn_d = DFFEAS(H1_data_ready, E1_cnt[3], !B1_rx_released,  ,  ,  ,  ,  ,  );


--E1L17 is uart_if:inst3|rdn~18
E1L17 = H1_data_ready & (E1_rdn_d) # !H1_data_ready & E1_rdn_d2;


--H1_rsr[6] is uart_if:inst3|uart:U1|rcvr:u1|rsr[6]
H1_rsr[6] = DFFEAS(H1_rsr[5], H1_clkdiv[3], B1_rx_released,  , H1L3,  ,  ,  ,  );


--H1_clkdiv[3] is uart_if:inst3|uart:U1|rcvr:u1|clkdiv[3]
H1_clkdiv[3] = DFFEAS(H1L81, D1_acc[12], B1_rx_released,  , H1L71,  ,  ,  ,  );


--H1_no_bits_rcvd[0] is uart_if:inst3|uart:U1|rcvr:u1|no_bits_rcvd[0]
H1_no_bits_rcvd[0] = DFFEAS(H1L32, H1_clkdiv[3], H1L03,  ,  ,  ,  ,  ,  );


--H1_no_bits_rcvd[2] is uart_if:inst3|uart:U1|rcvr:u1|no_bits_rcvd[2]
H1_no_bits_rcvd[2] = DFFEAS(H1L72, H1_clkdiv[3], H1L03,  , H1L1,  ,  ,  ,  );


--H1_no_bits_rcvd[3] is uart_if:inst3|uart:U1|rcvr:u1|no_bits_rcvd[3]
H1_no_bits_rcvd[3] = DFFEAS(H1L92, H1_clkdiv[3], H1L03,  , H1L2,  ,  ,  ,  );


--H1_no_bits_rcvd[1] is uart_if:inst3|uart:U1|rcvr:u1|no_bits_rcvd[1]
H1_no_bits_rcvd[1] = DFFEAS(H1L52, H1_clkdiv[3], H1L03,  , H1_no_bits_rcvd[0],  ,  ,  ,  );


--H1L04 is uart_if:inst3|uart:U1|rcvr:u1|rbr[7]~35
H1L04 = !H1_no_bits_rcvd[0] & !H1_no_bits_rcvd[2] & H1_no_bits_rcvd[3] & H1_no_bits_rcvd[1];


--H1_rsr[5] is uart_if:inst3|uart:U1|rcvr:u1|rsr[5]
H1_rsr[5] = DFFEAS(H1_rsr[4], H1_clkdiv[3], B1_rx_released,  , H1L3,  ,  ,  ,  );


--H1_rsr[7] is uart_if:inst3|uart:U1|rcvr:u1|rsr[7]
H1_rsr[7] = DFFEAS(H1_rsr[6], H1_clkdiv[3], B1_rx_released,  , H1L3,  ,  ,  ,  );


--H1_rsr[4] is uart_if:inst3|uart:U1|rcvr:u1|rsr[4]
H1_rsr[4] = DFFEAS(H1_rsr[3], H1_clkdiv[3], B1_rx_released,  , H1L3,  ,  ,  ,  );


--H1_rsr[1] is uart_if:inst3|uart:U1|rcvr:u1|rsr[1]
H1_rsr[1] = DFFEAS(H1_rsr[0], H1_clkdiv[3], B1_rx_released,  , H1L3,  ,  ,  ,  );


--H1_rsr[3] is uart_if:inst3|uart:U1|rcvr:u1|rsr[3]
H1_rsr[3] = DFFEAS(H1_rsr[2], H1_clkdiv[3], B1_rx_released,  , H1L3,  ,  ,  ,  );


--H1_rsr[2] is uart_if:inst3|uart:U1|rcvr:u1|rsr[2]
H1_rsr[2] = DFFEAS(H1_rsr[1], H1_clkdiv[3], B1_rx_released,  , H1L3,  ,  ,  ,  );


--H1_rsr[0] is uart_if:inst3|uart:U1|rcvr:u1|rsr[0]
H1_rsr[0] = DFFEAS(H1L44, H1_clkdiv[3], B1_rx_released,  , H1L3,  ,  ,  ,  );


--E1L62 is uart_if:inst3|data_out_d[0]~201
E1L62 = E1L3 & E1_data_out_d[0] & VCC # !E1L3 & (E1_data_out_d[0] $ VCC);

--E1L72 is uart_if:inst3|data_out_d[0]~202
E1L72 = CARRY(!E1L3 & E1_data_out_d[0]);


--E1L92 is uart_if:inst3|data_out_d[1]~203
E1L92 = E1_data_out_d[1] & !E1L72 # !E1_data_out_d[1] & (E1L72 # GND);

--E1L03 is uart_if:inst3|data_out_d[1]~204
E1L03 = CARRY(!E1L72 # !E1_data_out_d[1]);


--E1L23 is uart_if:inst3|data_out_d[2]~205
E1L23 = E1_data_out_d[2] & (E1L03 $ GND) # !E1_data_out_d[2] & !E1L03 & VCC;

--E1L33 is uart_if:inst3|data_out_d[2]~206
E1L33 = CARRY(E1_data_out_d[2] & !E1L03);


--E1L53 is uart_if:inst3|data_out_d[3]~207
E1L53 = E1_data_out_d[3] & !E1L33 # !E1_data_out_d[3] & (E1L33 # GND);

--E1L63 is uart_if:inst3|data_out_d[3]~208
E1L63 = CARRY(!E1L33 # !E1_data_out_d[3]);


--E1L83 is uart_if:inst3|data_out_d[4]~209
E1L83 = E1_data_out_d[4] & (E1L63 $ GND) # !E1_data_out_d[4] & !E1L63 & VCC;

--E1L93 is uart_if:inst3|data_out_d[4]~210
E1L93 = CARRY(E1_data_out_d[4] & !E1L63);


--E1L14 is uart_if:inst3|data_out_d[5]~211
E1L14 = E1_data_out_d[5] & !E1L93 # !E1_data_out_d[5] & (E1L93 # GND);

--E1L24 is uart_if:inst3|data_out_d[5]~212
E1L24 = CARRY(!E1L93 # !E1_data_out_d[5]);


--E1L64 is uart_if:inst3|data_out_d[6]~213
E1L64 = E1_data_out_d[6] & (E1L24 $ GND) # !E1_data_out_d[6] & !E1L24 & VCC;

--E1L74 is uart_if:inst3|data_out_d[6]~214
E1L74 = CARRY(E1_data_out_d[6] & !E1L24);


--E1L94 is uart_if:inst3|data_out_d[7]~215
E1L94 = E1_data_out_d[7] $ E1L74;


--J1_tsr[6] is uart_if:inst3|uart:U1|txmit:u2|tsr[6]
J1_tsr[6] = DFFEAS(J1L76, !J1_clkdiv[3], !B1_rx_released,  ,  ,  ,  ,  ,  );


--J1_tbr[5] is uart_if:inst3|uart:U1|txmit:u2|tbr[5]
J1_tbr[5] = DFFEAS(E1_din[5], E1_wrn, !B1_rx_released,  ,  ,  ,  ,  ,  );


--J1L66 is uart_if:inst3|uart:U1|txmit:u2|tsr~542
J1L66 = J1L03 & J1_tsr[6] # !J1L03 & (J1_tbr[5]);


--E1_din[4] is uart_if:inst3|din[4]
E1_din[4] = DFFEAS(F1L61, E1_cnt[3], !B1_rx_released,  , E1L76,  ,  ,  ,  );


--F1L21Q is data_buf:inst4|data_in_buf[3]~612
F1L21Q = DFFEAS(F1L11, D1_acc[12], !B1_rx_released,  , F1L1,  ,  ,  ,  );


--F1L31 is data_buf:inst4|data_in_buf[3]~614
F1L31 = B1_rx_released & (F1L21Q $ F1L11) # !B1_rx_released & B1_rx_ascii[3];


--F1L8 is data_buf:inst4|data_in_buf[2]~65
F1L8 = B1_rx_released & (F1L8) # !B1_rx_released & B1_rx_ascii[2];


--F1L13 is data_buf:inst4|i~94
F1L13 = !F1_i[0] & (!F1_i[1] # !F1_i[2] # !F1_i[3]);


--H1L02 is uart_if:inst3|uart:U1|rcvr:u1|data_ready~0
H1L02 = B1_rx_released # E1_rdn;


--H1L14 is uart_if:inst3|uart:U1|rcvr:u1|reduce_nor~1
H1L14 = !H1_no_bits_rcvd[2] & H1_no_bits_rcvd[0] & H1_no_bits_rcvd[3] & H1_no_bits_rcvd[1];


--H1L3 is uart_if:inst3|uart:U1|rcvr:u1|always4~73
H1L3 = H1_no_bits_rcvd[3] & !H1_no_bits_rcvd[2] & !H1_no_bits_rcvd[1] # !H1_no_bits_rcvd[3] & (H1_no_bits_rcvd[2] # H1_no_bits_rcvd[1] # H1_no_bits_rcvd[0]);


--H1_clkdiv[2] is uart_if:inst3|uart:U1|rcvr:u1|clkdiv[2]
H1_clkdiv[2] = DFFEAS(H1L51, D1_acc[12], B1_rx_released,  , H1L41,  ,  ,  ,  );


--H1_clkdiv[1] is uart_if:inst3|uart:U1|rcvr:u1|clkdiv[1]
H1_clkdiv[1] = DFFEAS(H1L21, D1_acc[12], B1_rx_released,  , H1L11,  ,  ,  ,  );


--H1_clk1x_enable is uart_if:inst3|uart:U1|rcvr:u1|clk1x_enable
H1_clk1x_enable = DFFEAS(H1L6, D1_acc[12], B1_rx_released,  ,  ,  ,  ,  ,  );


--H1_clkdiv[0] is uart_if:inst3|uart:U1|rcvr:u1|clkdiv[0]
H1_clkdiv[0] = DFFEAS(H1L9, D1_acc[12], B1_rx_rel