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#define EnableUseGammaTbl
#define _MSTAR_C_
#define _EnableFCC_
#define _VDCaptureSetting_
#define EnableUseModeTbl
#include <math.h>
#include "board.h"
#include "types.h"
#include "ms_reg.h"
#include "global.h"
#include "panel.h"
#include "adjust.h"
#include "ms_rwreg.h"
#include "DEBUG.h"
#include "misc.h"
#include "power.h"
#include "detect.h"
#include "msOsd.h"
#include "extlib.h"
#include "Valuetbl.h"
#include "msAce.h"
#include "userpref.h"
#include "mstar.h"
#include "DevVd.h"
#include "msVD.h"
#include "devvd_user.h"
#include "devtuner.h"
#include "Maria2_FSC_Lib.h"
#include "M9_VD_AGC_Lib.h"
#include "M2_VD_Std_Lib.h"
#if(ENABLE_VD_DSP)
#include "Maria2_dsp_lib.h"
#endif
#define SRCTYPE_VGA 1
#define SRCTYPE_YCBCR 2
#define SRCTYPE_CVBS 3
#define SRCTYPE_SVIDEO 4
//*******************************************************************
//
// Constant Definition
//
//*******************************************************************
//14.318 * 15 * 8 / 4 = 429.54, 429.54<<19=225202667.52, 429.54<<3=8=3436.32
#define DClkFactor 225202667ul
//*******************************************************************
//
// extern declaration
//
//*******************************************************************
//*******************************************************************
//
// local declaration
//
//*******************************************************************
#define SSCSTEP 0x119
#define SSCSPAN 0xEC
//*******************************************************************
//
//*******************************************************************
// Function Name: msInit(void)
//
// Description: Initialize mStar chip while 1st power on system
//
// Caller: msInitADC(), msInitTCON, msSetupFreeRunMode()
// msSetupInputPort() in mStar.c
// msWriteByte(), msWriteWord() in ms_rwreg.c
// msWriteDDC1(), msWriteDDC2() in ddc.c
// msInitGamma() in gamma.c
// Osd_InitOSD() in osd.c
// Callee: Init_Device() in main.c
//*******************************************************************
#ifdef EnableUseModeTbl
DynamicLoadModeTblType code tModeIndexTbl[]=
{
#if 0//VGA_ENABLE //gan
{
1<<Input_VGA,
MD_640x480_60,
t640_480_60Hz_VGA_ModeTbl,
},
{
1<<Input_VGA,
MD_640x480_72,
t640_480_72Hz_VGA_ModeTbl,
},
{
1<<Input_VGA,
MD_640x480_75,
t640_480_75Hz_VGA_ModeTbl,
},
{
1<<Input_VGA,
MD_800x600_56,
t800_600_56Hz_VGA_ModeTbl,
},
{
1<<Input_VGA,
MD_800x600_60,
t800_600_60Hz_VGA_ModeTbl,
},
{
1<<Input_VGA,
MD_800x600_72,
t800_600_72Hz_VGA_ModeTbl,
},
{
1<<Input_VGA,
MD_800x600_75,
t800_600_75Hz_VGA_ModeTbl,
},
{
1<<Input_VGA,
MD_1024x768_60,
t1024_768_60Hz_VGA_ModeTbl,
},
{
1<<Input_VGA,
MD_1024x768_70,
t1024_768_70Hz_VGA_ModeTbl,
},
{
1<<Input_VGA,
MD_1024x768_75V, //VESA
t1024_768_75Hz_VGA_ModeTbl,
},
#endif
#if 0//YPBPR_ENABLE
{
1<<Input_YPBPR,
MD_720x576_50I,
t576i_ModeTbl,
},
{
1<<Input_YPBPR,
MD_720x480_60I,
t480i_ModeTbl,
},
{
1<<Input_YPBPR,
MD_720x576_50P,
t576p_ModeTbl,
},
{
1<<Input_YPBPR,
MD_720x480_60P,
t480p_ModeTbl,
},
{
1<<Input_YPBPR,
MD_1280x720_50P,
t720p_50Hz_ModeTbl,
},
{
1<<Input_YPBPR,
MD_1280x720_60P,
t720p_60Hz_ModeTbl,
},
{
1<<Input_YPBPR,
MD_1920x1080_50I,
t1080i_50Hz_ModeTbl,
},
{
1<<Input_YPBPR,
MD_1920x1080_60I,
t1080i_60Hz_ModeTbl,
},
{
1<<Input_YPBPR,
MD_1920x1080_50P,
t1080p_50Hz_ModeTbl,
},
{
1<<Input_YPBPR,
MD_1920x1080_60P,
t1080p_60Hz_ModeTbl,
},
#endif
{
1<<Input_CVBS1|1<<Input_CVBS2|1<<Input_SVIDEO1|1<<Input_SVIDEO2|1<<Input_TV,
MD_720x576_50I,
tPalModeTbl,
},
{
1<<Input_CVBS1|1<<Input_CVBS2|1<<Input_SVIDEO1|1<<Input_SVIDEO2|1<<Input_TV,
MD_720x480_60I,
tNtscModeTbl,
},
#if CCIR656_ENABLE
{
1<<Input_CCIR656,
MD_720x576_50I,
tCCIR656_PalModeTbl,
},
{
1<<Input_CCIR656,
MD_720x480_60I,
tCCIR656_NtscModeTbl,
},
{
1<<Input_CCIR656,
MD_720x576_50P,
tCCIR656_576PModeTbl,
},
{
1<<Input_CCIR656,
MD_720x480_60P,
tCCIR656_480PModeTbl,
},
#endif
{
1<<Input_CVBS1|1<<Input_CVBS2|1<<Input_SVIDEO1|1<<Input_SVIDEO2,
MD_FreeRun,
tFreeRunModeTbl,
},
{
1<<Input_TV,
MD_TVsnow,
tTVSnowModeTbl,
},
{
_END_OF_TBL_,
0,
tENDModeTbl
},
};
#endif
#if FUN_MGD
void msInitializeChip_MGD(void)
{
BYTE ucBank = msReadByte( BK0_00_REGBK );
// MGD initial process
msWriteByte(BK0_00_REGBK, REG_BANK4_LVDS_CCFL); // switch to Bank 4
//msWriteByte(BK4_6B, 0x80);//This statement needs to be located at the BL on process
msWriteByte(BK4_9A, 0xCF);
msWriteByte(BK4_A7, 0xF3);
msWriteByte(BK0_00_REGBK, REG_BANK5_MGD); // switch to Bank 5
msWriteByte(BK5_D7, 0x01); // set H active = 480 , 0x1e0
msWriteByte(BK5_D6, 0xE0);
msWriteByte(BK5_D9, 0x00); // set V active = 234 , 0xea
msWriteByte(BK5_D8, 0xEA);
msWriteByte(BK5_DA, 0x08); // H blanking
msWriteByte(BK5_A5, 0xA0); // PWM period H byte ,read 0xdc
msWriteByte(BK5_A7, 0xAA); // PWM duty H byte , read 0xdd for current value
msWriteByte(BK5_DA, 0x08); // H blanking
msWriteByte(BK5_AD, 0x18); // DLC on set 0xad[3] =1
msWriteByte(BK5_9A, 0x96); // Y gain
msWriteByte(BK5_9F, 0x03); // Y gain offset
msWriteByte(BK5_9E, 0xFC); // Y gain offset
msWriteByte(BK5_A2, 0x20); // DLC gain
msWriteByte(BK5_A1, 0x0C); // DLC gain offset
msWriteByte(BK5_A0, 0x00); // DLC gain offset
msWriteByte(BK0_00_REGBK, ucBank);
}
#endif
#if(VGA_ENABLE||YPBPR_ENABLE)
void msSetBK0_0D(BYTE Value )
{
BYTE ucBank;
ucBank=msReadByte(BK0_00_REGBK);
msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
msWriteByte(BK0_0D_LYL, Value);
msWriteByte(BK0_00_REGBK, ucBank);
}
#endif
void msInit(void)
{
msWriteRegsTbl(tInitializeScaler);
msWriteRegsTbl(tInitializeFCC);
msWriteRegsTbl(tInitializeADC);
#if PANEL_TTL
msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU);
msWriteByte(BK1_C1_BND_RST, 0x21);
msWriteByte(BK1_C0_TUNE_FRAME_NO, 0x80);
msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
#endif
msWriteByte( BK0_00_REGBK, REG_BANK6s00_ADCATOP );
msWrite2BytesMask_16bitADDR(BK6s00_34h_ADC_ATOP,_BIT12,_BIT12|_BIT11|_BIT10);//ATOP_34[12:10] = 3?h100 // For ADC current change to 22mA
msWriteByte( BK0_00_REGBK, REG_BANK_SCALER );
#if(PANEL_TYPE==Pnl_A121EW02_LVDS||PANEL_TYPE==Pnl_HSD121PHW1_LVDS||PANEL_TYPE==Pnl_LP156WH2_LVDS) //gan 20110321
msWriteByteMask(BK0_23_OPL_CTL0, 0x04, 0x0F);
#else
msWriteByteMask(BK0_23_OPL_CTL0, 0x02, 0x0F);
#endif
msWriteByteMask(BK0_24_OPL_CTL1, 3, 0x07);
msWriteByteMask(BK0_2E_OPL_TSTA1, 1, 0x03);
msWriteByte( BK0_00_REGBK, REG_BANK_SCALER );
#if (PANEL_ANALOG_TCON) // DYSON 101006 // Linix 20100929
msWriteByte( BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU);
msWriteByte(BK1_C0_TUNE_FRAME_NO, 0x80);
msWriteByte(BK1_C1_BND_RST, 0x68); //Set Bonding Overwrite
msWriteByte( BK0_00_REGBK, REG_BANK_SCALER );
#elif (PANEL_TTL)
msWriteByte( BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU);
msWriteByte(BK1_C0_TUNE_FRAME_NO, 0x80);
msWriteByte(BK1_C1_BND_RST, 0x42); //Set Bonding Overwrite
msWriteByte( BK0_00_REGBK, REG_BANK_SCALER );
#else
msWriteByte( BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU);
msWriteByte(BK1_C0_TUNE_FRAME_NO, 0x80);
msWriteByte(BK1_C1_BND_RST, 0x22); //Set Bonding Overwrite
msWriteByte( BK0_00_REGBK, REG_BANK_SCALER ); //END DYSON 101006
#endif
#if 1//(IR_FORMAT!=IR_NONE) //Linix 20101004
msWriteByte( BK0_00_REGBK, REG_BANK7_CHIPTOP);
msWriteByteMask(BK7_09_CHIPTOP, 0x00, 0x02);
msWriteByte( BK0_00_REGBK, REG_BANK_SCALER );
#endif //End Linix 20101004
#ifdef P6_GPIO_Enable
msWriteBit(BK0_5E_PATTERN, _ENABLE, _BIT6); // Nelson Switch ITU656 to P6 port 2006-01-25
#endif
#ifdef P5_GPIO_Enable
msWriteBit(BK0_5E_PATTERN, _ENABLE, _BIT7);
#endif
msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU); // select register bank ADC
msWriteByte(BK1_0C_GCTRL, 0x02);
#if (PANEL_DIGITAL_TCON||PANEL_ANALOG_TCON)
msWriteRegsTbl(tInitializeTCON);
//VCOM SETTING
msWriteByte( BK0_00_REGBK, REG_BANK3_COMB);
#if(VCOM_DC_Ctrl==PWM_TYPE_PWM3)
msWriteByte(BK3_F4_PWM3C, g_VideoSetting.VcomDC);
#elif(VCOM_DC_Ctrl==PWM_TYPE_PWM4)
msWriteByte(BK3_F5_PWM4C, g_VideoSetting.VcomDC);
#endif
msWriteByte( BK0_00_REGBK, REG_BANK4_LVDS_CCFL);
msWriteByte(BK4_28, g_VideoSetting.VcomAC);
msWriteByte( BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU);
#else
msWriteByte(BK1_43_BVOM_DC, g_VideoSetting.VcomDC);
msWriteByte(BK1_44_BVOM_OUT, g_VideoSetting.VcomAC);
msWriteByte(BK1_D0_PTC_MODE1, 0x0C); // Disable TCON function
#endif
msWriteByte(BK1_4E, (msReadByte(0x4E)|_BIT0));
//msWriteByte(BK1_F4_PWM1C, 0xFF);
msWriteByte(BK1_F6_PWM1EPL, 0x00);
msWriteByte(BK1_F7_PWM1EPH, 0x01);
//msWriteByteMask(BK1_92_SARADC_AISEL, KEY_PORT, 0x07);
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