mst705Ȧ

MST705源代码

#define _ADJUST_C_

#include <math.h>
#include "types.h"
#include "board.h"
#include "global.h"
#include "ms_reg.h"
#include "ms_rwreg.h"
#include "DEBUG.h"
#include "msosd.h"
#include "adjust.h"
#if(VGA_ENABLE||YPBPR_ENABLE)
void msAdjustHPosition(WORD position)
{
    BYTE ucBank;
    ucBank = msReadByte( BK0_00_REGBK);
    msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
    msWriteWord(BK0_08_SPRHST_H, position);
    msWriteByte(BK0_00_REGBK, ucBank);
}
void msAdjustVPosition(WORD position)
{
    BYTE ucBank;
    ucBank = msReadByte( BK0_00_REGBK);
    msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
    msWriteWord(BK0_06_SPRVST_H, position);
    msWriteByte(BK0_00_REGBK, ucBank);
}

void msAdjustAdcGain(WORD ucRedValue, WORD ucGreenValue, WORD ucBlueValue)
{
    BYTE ucBank;
    ucBank = msReadByte( BK0_00_REGBK);
    msWriteByte(BK0_00_REGBK, REG_BANK6s01_ADCDTOP); // switch to ADC bank
    msWrite2BytesMask_16bitADDR(BK6s01_45h_ADC_DTOP,ucRedValue,0x3FFF);
    msWrite2BytesMask_16bitADDR(BK6s01_48h_ADC_DTOP,ucGreenValue,0x3FFF);
    msWrite2BytesMask_16bitADDR(BK6s01_4Bh_ADC_DTOP,ucBlueValue,0x3FFF);
    msWriteByte(BK0_00_REGBK, ucBank); // select register bank scaler
}
//////////////////////////////////////////////////////////////////////////////
// <Name>: msAdjustAdcClock
//
// <Description>: Adjust ADC clock.(Switch bank)
//
// <Parameter>:  -  <Flow>  -  <Description>
// ---------------------------------------------------------------------------
//   wValue      -    In  -    Set value.
//////////////////////////////////////////////////////////////////////////////
void msAdjustAdcClock(WORD wValue)
{
    BYTE ucBank; // bank buffer
    ucBank = msReadByte(BK0_00_REGBK); // store bank

    msWriteByte( BK0_00_REGBK, REG_BANK6s01_ADCDTOP );
    wValue -= 3; // actual - 3
    // PLL divider
    msWrite2BytesMask_16bitADDR(BK6s01_01h_ADC_DTOP,wValue,0x1FFF);

    msWriteByte(BK0_00_REGBK, ucBank); // recovery bank
}
//////////////////////////////////////////////////////////////////////////////
// <Name>: msAdjustAdcPhase
//
// <Description>: Adjust ADC phase.(Switch bank)
//
// <Parameter>:  -  <Flow>  -  <Description>
// ---------------------------------------------------------------------------
//   ucValue      -      In  -    Set value.
//////////////////////////////////////////////////////////////////////////////
void msAdjustAdcPhase(WORD wValue)
{
    BYTE ucBank = msReadByte( BK0_00_REGBK );
    msWriteByte( BK0_00_REGBK, REG_BANK6s00_ADCATOP );
    wValue=wValue*16;
    msWrite2BytesMask_16bitADDR(BK6s00_0Fh_ADC_ATOP,wValue,0x03FF);
    msWriteByte( BK0_00_REGBK, ucBank );
}

#if (VGA_ENABLE || YPBPR_ENABLE)
//////////////////////////////////////////////////////////////////////
//	SOG Filter Bandwidth
//	Select online SOG filter bandwidth.
//	00000: 973MHz.
//	00001: 116MHz.
//	00011: 63MHz.
//	00111: 43MHz.
//	01111: 32MHz.
//	11111: 26MHz
//////////////////////////////////////////////////////////////////////
void msADC_SOG_FilterBW(BYTE ucPixClk)
{
    BYTE ucBank = msReadByte( BK0_00_REGBK);
    msWriteByte( BK0_00_REGBK, REG_BANK6s01_ADCDTOP );

    if(ucPixClk>63)
        msWrite2BytesMask_16bitADDR(BK6s00_29h_ADC_ATOP,_BIT0,0x1F);
    else if((ucPixClk<=63)&&(ucPixClk>43))
        msWrite2BytesMask_16bitADDR(BK6s00_29h_ADC_ATOP,_BIT1|_BIT0,0x1F);
    else if((ucPixClk<=43)&&(ucPixClk>32))
        msWrite2BytesMask_16bitADDR(BK6s00_29h_ADC_ATOP,_BIT2|_BIT1|_BIT0,0x1F);
    else if((ucPixClk<=32)&&(ucPixClk>26))
        msWrite2BytesMask_16bitADDR(BK6s00_29h_ADC_ATOP,_BIT3|_BIT2|_BIT1|_BIT0,0x1F);
    else
        msWrite2BytesMask_16bitADDR(BK6s00_29h_ADC_ATOP,_BIT4|_BIT3|_BIT2|_BIT1|_BIT0,0x1F);

    msWriteByte( BK0_00_REGBK, ucBank );
}

//////////////////////////////////////////////////////////////////////
//	ADC PLL
//	*31.25~10MHz
//		1. reg_adc_pll_mult [2:0] = 3'b000    (BK_ATOP_0A [2:0])
//		2. reg_adcpla_216m_en = 1'b1          (BK_ATOP_0A [5])
//		3. reg_adc_pll_mod [1:0] = 2'b11   		(BK_ATOP_0A [4:3)
//		4. reg_adc_pll_ictrl [1:0]=  2'b01  	(BK_ATOP_0A[7:6])
//	*62.5~31.25MHz
//		1. reg_adc_pll_mult [2:0] = 3'b000    (BK_ATOP_0A [2:0])
//		2. reg_adcpla_216m_en = 1'b0          (BK_ATOP_0A [5])
//		3. reg_adc_pll_mod [1:0] = 2'b10   		(BK_ATOP_0A [4:3)
//		4. reg_adc_pll_ictrl [1:0]=  2'b10  	(BK_ATOP_09[9:8])
//	*125~62.5MHz
//		1. reg_adc_pll_mult [2:0] = 3'b000    (BK_ATOP_0A [2:0])
//		2. reg_adcpla_216m_en = 1'b0          (BK_ATOP_0A [5])
//		3. reg_adc_pll_mod [1:0] = 2'b01   		(BK_ATOP_0A [4:3)
//		4. reg_adc_pll_ictrl [1:0]=  2'b11  	(BK_ATOP_0A[7:6])
//	*166~125MHz
//		1. reg_adc_pll_mult [2:0] = 3'b000     (BK_ATOP_0A [2:0])
//		2. reg_adcpla_216m_en = 1'b0           (BK_ATOP_0A [5])
//		4. reg_adc_pll_mod [1:0] = 2'b00   (BK_ATOP_0A [4:3)
//		5. reg_adc_pll_ictrl [1:0]=  2'b11  (BK_ATOP_0A[7:6])
//	*250~166MHz
//		1. reg_adc_pll_mult [2:0] = 3'b001     (BK_ATOP_0A [2:0])
//		2. reg_adcpla_216m_en = 1'b0           (BK_ATOP_0A [5])
//		4. reg_adc_pll_mod [1:0] = 2'b00   (BK_ATOP_0A [4:3)
//		5. reg_adc_pll_ictrl [1:0]=  2'b11  (BK_ATOP_0A[7:6])
//////////////////////////////////////////////////////////////////////
void msADC_PLL(BYTE ucPixClk)
{
	BYTE ucBank = msReadByte( BK0_00_REGBK );
	msWriteByte( BK0_00_REGBK, REG_BANK6s00_ADCATOP );
    printf("\r\nucPixClk=%d", ucPixClk);

	if(ucPixClk>166)//input >166
	{
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,_BIT0,_BIT2|_BIT1|_BIT0);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,0,_BIT5);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,0,_BIT4|_BIT3);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,_BIT7|_BIT6,_BIT7|_BIT6);
	}
	else if((ucPixClk<=166)&&(ucPixClk>125))//input 166~125
	{
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,0,_BIT2|_BIT1|_BIT0);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,0,_BIT5);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,0,_BIT4|_BIT3);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,_BIT7|_BIT6,_BIT7|_BIT6);
	}
	else if((ucPixClk<=125)&&(ucPixClk>55))//62))//input 125~62.5
	{
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,0,_BIT2|_BIT1|_BIT0);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,0,_BIT5);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,_BIT3,_BIT4|_BIT3);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,_BIT7|_BIT6,_BIT7|_BIT6);
	}
	else if((ucPixClk<=55)&&(ucPixClk>31))//else if((ucPixClk<=62)&&(ucPixClk>31))//input 62.5~31.25
	{
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,0,_BIT2|_BIT1|_BIT0);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,0,_BIT5);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,_BIT4,_BIT4|_BIT3);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,_BIT7,_BIT7|_BIT6);
	}
	else //if((ucPixClk<=31)&&(ucPixClk>10))//input 31.25~10 MHz
	{
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,0,_BIT2|_BIT1|_BIT0);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,_BIT5,_BIT5);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,_BIT4|_BIT3,_BIT4|_BIT3);
		msWrite2BytesMask_16bitADDR(BK6s00_0Ah_ADC_ATOP,_BIT6,_BIT7|_BIT6);
	}
	msWriteByte( BK0_00_REGBK, ucBank );
}

//////////////////////////////////////////////////////////////////////
//	input LPF setting
//////////////////////////////////////////////////////////////////////
WORD code tInputLDFTBL_RGB[][6] =
{		//blpf_bwp,  				//blpf_bwm,  			//glpf_bwp,    			//glpf_bwm,        		//blpf_bwp,    			//blpf_bwm,
		//ATOP_24h[3:0]    	//ATOP_24h[7:4] 	//ATOP_24h[11:8]		//ATOP_24h[15:12]  		//ATOP_25h[3:0]			//ATOP_25h[7:4]
	{ _BIT3|_BIT2|_BIT1,_BIT7|_BIT6|_BIT5,_BIT11|_BIT10|_BIT9, _BIT15|_BIT14|_BIT13, _BIT3|_BIT2|_BIT1,_BIT7|_BIT6|_BIT5,},//0,5MHz,Value=0x0E
  { _BIT3|_BIT2|_BIT0,_BIT7|_BIT6|_BIT4,_BIT11|_BIT10|_BIT8, _BIT15|_BIT14|_BIT12, _BIT3|_BIT2|_BIT0,_BIT7|_BIT6|_BIT4,},//1,15MHz,Value=0x0D
  { _BIT3|_BIT2,_BIT7|_BIT6,_BIT11|_BIT10, _BIT15|_BIT14, _BIT3|_BIT2,_BIT7|_BIT6,},//2,20MHz,Value=0x0C
  { _BIT3|_BIT2,_BIT7|_BIT6,_BIT11|_BIT10, _BIT15|_BIT14, _BIT3|_BIT2,_BIT7|_BIT6,},//3,30MHz,Value=0x0C
  { _BIT3|_BIT1|_BIT0,_BIT7|_BIT5|_BIT4,_BIT11|_BIT9|_BIT8, _BIT15|_BIT13|_BIT12, _BIT3|_BIT1|_BIT0,_BIT7|_BIT5|_BIT4,},//4,40MHz,Value=0x0B
  { _BIT3|_BIT1,_BIT7|_BIT5,_BIT11|_BIT9, _BIT15|_BIT13, _BIT3|_BIT1,_BIT7|_BIT5,},//5,45MHz,Value=0x0A
  { _BIT3|_BIT0,_BIT7|_BIT4,_BIT11|_BIT8, _BIT15|_BIT12, _BIT3|_BIT0,_BIT7|_BIT4,},//6,60MHz,Value=0x09
  { _BIT3,_BIT7,_BIT11, _BIT15, _BIT3,_BIT7,},//7,70MHz,Value=0x08
  { _BIT2|_BIT1|_BIT0,_BIT6|_BIT5|_BIT4,_BIT10|_BIT9|_BIT8, _BIT14|_BIT13|_BIT12, _BIT2|_BIT1|_BIT0,_BIT6|_BIT5|_BIT4,},//8,80MHz,Value=0x07
	{ _BIT2|_BIT1,_BIT6|_BIT5,_BIT10|_BIT9, _BIT14|_BIT13, _BIT2|_BIT1,_BIT6|_BIT5,},//9,100MHz,Value=0x06
	{ _BIT2|_BIT0,_BIT6|_BIT4,_BIT10|_BIT8, _BIT14|_BIT12, _BIT2|_BIT0,_BIT6|_BIT4,},//10,120MHz,Value=0x05
	{ _BIT2,_BIT6,_BIT10, _BIT14, _BIT2,_BIT6,},//11,140MHz,Value=0x04
	{ _BIT1|_BIT0,_BIT5|_BIT4,_BIT9|_BIT8, _BIT13|_BIT12, _BIT1|_BIT0,_BIT5|_BIT4,},//12,160MHz,Value=0x03
	{ _BIT1,_BIT5,_BIT9, _BIT13, _BIT1,_BIT5,},//13,180MHz,Value=0x02
	{ _BIT0,_BIT4,_BIT8, _BIT12, _BIT0,_BIT4,},//14,200MHz,Value=0x01
	{ 0,0,0, 0, 0,0,},//15,250MHz,Value=0x00
};
WORD code tInputLDFTBL_YPbPr[][6] =
{		//blpf_bwp,  				//blpf_bwm,  			//glpf_bwp,    			//glpf_bwm,        		//blpf_bwp,    			//blpf_bwm,
		//ATOP_24h[3:0]    	//ATOP_24h[7:4] 	//ATOP_24h[11:8]		//ATOP_24h[15:12]  		//ATOP_25h[3:0]			//ATOP_25h[7:4]
	{ _BIT3|_BIT2|_BIT1,_BIT7|_BIT6|_BIT5,_BIT11|_BIT10|_BIT9, _BIT15|_BIT14|_BIT13, _BIT3|_BIT2|_BIT1,_BIT7|_BIT6|_BIT5,},//0,5MHz,Value=0x0E
  { _BIT3|_BIT2|_BIT1,_BIT7|_BIT6|_BIT5,_BIT11|_BIT10|_BIT9, _BIT15|_BIT14|_BIT13, _BIT3|_BIT2|_BIT1,_BIT7|_BIT6|_BIT5,},//1,15MHz,Value=0x0E
  { _BIT3|_BIT2|_BIT1,_BIT7|_BIT6|_BIT5,_BIT11|_BIT10|_BIT9, _BIT15|_BIT14|_BIT13, _BIT3|_BIT2|_BIT1,_BIT7|_BIT6|_BIT5,},//2,20MHz,Value=0x0E
  { _BIT3|_BIT2|_BIT1,_BIT7|_BIT6|_BIT5,_BIT11|_BIT10|_BIT9, _BIT15|_BIT14|_BIT13, _BIT3|_BIT2|_BIT1,_BIT7|_BIT6|_BIT5,},//3,30MHz,Value=0x0E
  { _BIT3|_BIT2|_BIT0,_BIT7|_BIT6|_BIT4,_BIT11|_BIT10|_BIT8, _BIT15|_BIT14|_BIT12, _BIT3|_BIT2|_BIT0,_BIT7|_BIT6|_BIT4,},//4,40MHz,Value=0x0D
  { _BIT3|_BIT2|_BIT0,_BIT7|_BIT6|_BIT4,_BIT11|_BIT10|_BIT8, _BIT15|_BIT14|_BIT12, _BIT3|_BIT2|_BIT0,_BIT7|_BIT6|_BIT4,},//5,45MHz,Value=0x0D
  { _BIT3|_BIT2,_BIT7|_BIT6,_BIT11|_BIT10, _BIT15|_BIT14, _BIT3|_BIT2,_BIT7|_BIT6,},//6,60MHz,Value=0x0C
  { _BIT3|_BIT2,_BIT7|_BIT6,_BIT11|_BIT10, _BIT15|_BIT14, _BIT3|_BIT2,_BIT7|_BIT6,},//7,70MHz,Value=0x0C
  { _BIT3|_BIT1|_BIT0,_BIT7|_BIT5|_BIT4,_BIT11|_BIT9|_BIT8, _BIT15|_BIT13|_BIT12, _BIT3|_BIT1|_BIT0,_BIT7|_BIT5|_BIT4,},//8,80MHz,Value=0x0B
	{ _BIT3|_BIT1|_BIT0,_BIT7|_BIT5|_BIT4,_BIT11|_BIT9|_BIT8, _BIT15|_BIT13|_BIT12, _BIT3|_BIT1|_BIT0,_BIT7|_BIT5|_BIT4,},//9,100MHz,Value=0x0B
	{ _BIT3|_BIT1,_BIT7|_BIT5,_BIT11|_BIT9, _BIT15|_BIT13, _BIT3|_BIT1,_BIT7|_BIT5,},//10,120MHz,Value=0x0A
	{ _BIT3|_BIT0,_BIT7|_BIT4,_BIT11|_BIT8, _BIT15|_BIT12, _BIT3|_BIT0,_BIT7|_BIT4,},//11,140MHz,Value=0x09
	{ _BIT1,_BIT5,_BIT9, _BIT13, _BIT1,_BIT5,},//12,160MHz,Value=0x08
	{ _BIT1,_BIT5,_BIT9, _BIT13, _BIT1,_BIT5,},//13,180MHz,Value=0x08
	{ _BIT0|_BIT2|_BIT1,_BIT4|_BIT6|_BIT5,_BIT8|_BIT10|_BIT9, _BIT12|_BIT14|_BIT13, _BIT0|_BIT2|_BIT1,_BIT4|_BIT6|_BIT5,},//14,200MHz,Value=0x07
	{ _BIT0|_BIT2,_BIT4|_BIT6,_BIT8|_BIT10, _BIT12|_BIT14, _BIT0|_BIT2,_BIT4|_BIT6,},//15,250MHz,Value=0x05