mst705Ȧ

MST705源代码

//Project File
//=======================================================
#define MST_CHIP			MST705
#define RM_EEPROM_TYPE  	RM_TYPE_24C16
#define TUNER_TYPE	  		TUNER_XF_6A
#define PANEL_TYPE			Pnl_LP156WH2_LVDS//PanelINNPLUX08_DT//PanelHSD07_D//PanelAT08TN52_D//PanelCMO_N10106_LVDS1024X600
#define KEY_TYPE			Single_ADCKey
#define KEY_PORT			SAR0
#define TV_SYSTEM			TV_PAL

//======================ALONG ADD========================
#include "Along_cfg.h"
//=======================================================

/*========================================================================*/

//==========Source DEFINE	 ====================================
#define TV_ENABLE			1
#define VGA_ENABLE			1
#define YPBPR_ENABLE		1
#define CCIR656_ENABLE		0
//==========AudioCtrl	DEFINE	 ====================================
#define AudioCtrl			PWM_TYPE_PWM2

//==========DSP  DEFINE ==========================================
#define ENABLE_VD_DSP		1
#define ENABLE_SECAM		1
#define CCFL_FUNCTION		0
#define CCFL_BURST_MODE	0
#define LED_BACKLIGHT		1
#define FUN_MGD				0
//==========I/O setting==================================
#ifdef USE_ARRAY_KEY

#define Hw_ReadKeyPin(ucBitPos)	msReadKeyPin(ucBitPos)
#define Hw_ReadSetKeyPin(ucBitPos) msReadSetKeyPin(ucBitPos)

#define Hw_SetClkin(bData)		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_08_CHIPTOP, 1, _BIT0);\
								msWriteBit(BK7_18_CHIPTOP, 0, _BIT0);\
								msWriteBit(BK7_10_CHIPTOP, bData, _BIT0);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);

#define Hw_SetVd0(bData)		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_08_CHIPTOP, 1, _BIT1);\
								msWriteBit(BK7_18_CHIPTOP, 0, _BIT1);\
								msWriteBit(BK7_10_CHIPTOP, bData, _BIT1);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);

#define Hw_SetVd1(bData)		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_08_CHIPTOP, 1, _BIT2);\
								msWriteBit(BK7_18_CHIPTOP, 0, _BIT2);\
								msWriteBit(BK7_10_CHIPTOP, bData, _BIT2);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);

#define Hw_SetVd2(bData)		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_08_CHIPTOP, 1, _BIT3);\
								msWriteBit(BK7_18_CHIPTOP, 0, _BIT3);\
								msWriteBit(BK7_10_CHIPTOP, bData, _BIT3);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);

#define Hw_SetVd3(bData)		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_08_CHIPTOP, 1, _BIT4);\
								msWriteBit(BK7_18_CHIPTOP, 0, _BIT4);\
								msWriteBit(BK7_10_CHIPTOP, bData, _BIT4);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
#endif
//=====================================================================
#define hwBlacklit_Pin
#define hw_SetBlacklit()			msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_08_CHIPTOP, 1, _BIT7);\
								msWriteBit(BK7_18_CHIPTOP, 0, _BIT7);\
								msWriteBit(BK7_10_CHIPTOP, 1, _BIT7);\
								msWriteBit(BK7_09_CHIPTOP, 1, _BIT2);\
								msWriteBit(BK7_19_CHIPTOP, 0, _BIT2);\
								msWriteBit(BK7_11_CHIPTOP, 1, _BIT2);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
#define hw_ClrBlacklit()			msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_08_CHIPTOP, 1, _BIT7);\
								msWriteBit(BK7_18_CHIPTOP, 0, _BIT7);\
								msWriteBit(BK7_10_CHIPTOP, 0, _BIT7);\
								msWriteBit(BK7_09_CHIPTOP, 1, _BIT2);\
								msWriteBit(BK7_19_CHIPTOP, 0, _BIT2);\
								msWriteBit(BK7_11_CHIPTOP, 0, _BIT2);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);

#define hwPanelPower_Pin		P4
#define hw_SetPanelPower()		(P4 |= _BIT0)
#define hw_ClrPanelPower()		(P4 &= (~_BIT0))

#define hwTuner_pin				P0_0
#define hw_SetTunerOn()			hwTuner_pin=1
#define hw_SetTunerOff()			hwTuner_pin=0

#define hwI2C_SCL_Pin			P0_3
#define hwI2C_SDA_Pin			P0_4

#define hwI2C_SCL_Pin_STATUS 	(hwI2C_SCL_Pin)
#define hwI2C_SDA_Pin_STATUS 	(hwI2C_SDA_Pin)

#define hw_SetGreenLed()

#define hw_ClrGreenLed()

#if IRSEND_ENABLE
#define hw_SetIRsend_Pin()		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_08_CHIPTOP, 1, _BIT6);\
								msWriteBit(BK7_18_CHIPTOP, 0, _BIT6);\
								msWriteBit(BK7_10_CHIPTOP, 1, _BIT6);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);

#define hw_ClrIRsend_Pin()		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_08_CHIPTOP, 1, _BIT6);\
								msWriteBit(BK7_18_CHIPTOP, 0, _BIT6);\
								msWriteBit(BK7_10_CHIPTOP, 0, _BIT6);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
#endif

//===========================Panel R/L  U/D Setting================================
//                GPIO enable     Output enable       Output value    Input value
//PWM1D      BK7_09[2]=1     BK7_19[2]=0         BK7_11[2]       BK7_21[2]
#define hw_SetPanelInvert()		/*msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_09_CHIPTOP, 1, _BIT2);\
								msWriteBit(BK7_19_CHIPTOP, 0, _BIT2);\
								msWriteBit(BK7_11_CHIPTOP, 0, _BIT2);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);*/
								
#define hw_ClrPanelInvert()		/*msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_09_CHIPTOP, 1, _BIT2);\
								msWriteBit(BK7_19_CHIPTOP, 0, _BIT2);\
								msWriteBit(BK7_11_CHIPTOP, 1, _BIT2);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);*/

//============================Audio Setting=======================================
//#define P6_GPIO_Enable
#define Init_P0_Value		0xF7
#define Init_P4_Value		0xFF
#define Init_P6_Value		0xFF

#define hwAudioMute_Pin		//P4
#define hw_SetAudioMute()		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_08_CHIPTOP, 1, _BIT5);\
								msWriteBit(BK7_18_CHIPTOP, 0, _BIT5);\
								msWriteBit(BK7_10_CHIPTOP, 1, _BIT5);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
#define hw_ClrAudioMute()		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
								msWriteBit(BK7_08_CHIPTOP, 1, _BIT5);\
								msWriteBit(BK7_18_CHIPTOP, 0, _BIT5);\
								msWriteBit(BK7_10_CHIPTOP, 0, _BIT5);\
								msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);

#define hwAudioStby_Pin		P4
#define hw_SetAudioStby()	(P4 &= (~_BIT4))
#define hw_ClrAudioStby()	(P4 |= _BIT4)

//             GPIO enable     Output enable       Output value    Input value
//CP_N      BK7_0B[2]=1     BK7_1B[2]=0         BK7_13[2]       BK7_23[2]
//CP_P      BK7_0B[1]=1     BK7_1B[1]=0         BK7_13[1]       BK7_23[1]
#define hwAudioMux_Pin_1
#define hwAudioMux_Pin_2


#define hw_SetAudioMuxToVGA()		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
									msWriteBit(BK7_0B_CHIPTOP, 1, _BIT2);\
									msWriteBit(BK7_1B_CHIPTOP, 0, _BIT2);\
									msWriteBit(BK7_13_CHIPTOP, 0, _BIT2);\
									msWriteBit(BK7_0B_CHIPTOP, 1, _BIT1);\
									msWriteBit(BK7_1B_CHIPTOP, 0, _BIT1);\
									msWriteBit(BK7_13_CHIPTOP, 1, _BIT1);\
									msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);

#define hw_SetAudioMuxToCVBS1()		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
									msWriteBit(BK7_0B_CHIPTOP, 1, _BIT2);\
									msWriteBit(BK7_1B_CHIPTOP, 0, _BIT2);\
									msWriteBit(BK7_13_CHIPTOP, 0, _BIT2);\
									msWriteBit(BK7_0B_CHIPTOP, 1, _BIT1);\
									msWriteBit(BK7_1B_CHIPTOP, 0, _BIT1);\
									msWriteBit(BK7_13_CHIPTOP, 0, _BIT1);\
									msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);

#define hw_SetAudioMuxToCVBS2()
#define hw_SetAudioMuxToCVBS3()
#define hw_SetAudioMuxToCVBS4()

#define hw_SetAudioMuxToSV1()		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
									msWriteBit(BK7_0B_CHIPTOP, 1, _BIT2);\
									msWriteBit(BK7_1B_CHIPTOP, 0, _BIT2);\
									msWriteBit(BK7_13_CHIPTOP, 0, _BIT2);\
									msWriteBit(BK7_0B_CHIPTOP, 1, _BIT1);\
									msWriteBit(BK7_1B_CHIPTOP, 0, _BIT1);\
									msWriteBit(BK7_13_CHIPTOP, 0, _BIT1);\
									msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);

#define hw_SetAudioMuxToSV2()

#define hw_SetAudioMuxToTuner()		msWriteByte(BK0_00_REGBK, REG_BANK7_CHIPTOP);\
									msWriteBit(BK7_0B_CHIPTOP, 1, _BIT2);\
									msWriteBit(BK7_1B_CHIPTOP, 0, _BIT2);\
									msWriteBit(BK7_13_CHIPTOP, 1, _BIT2);\
									msWriteBit(BK7_0B_CHIPTOP, 1, _BIT1);\
									msWriteBit(BK7_1B_CHIPTOP, 0, _BIT1);\
									msWriteBit(BK7_13_CHIPTOP, 0, _BIT1);\
									msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
#define hw_SetAudioMuxToYPbPr()


#define INIT_AudioVolume_X0    0x70 
#define INIT_AudioVolume_X1    0x60 
#define INIT_AudioVolume_X2    0x40
#define INIT_AudioVolume_X3    0x20 
#define INIT_AudioVolume_X4    0x00 
//=================================================================
#if(KEY_TYPE==Single_ADCKey)
#define KEY_AD_L0	0x00
#define KEY_AD_L1	0x09
#define KEY_AD_L2	0x14
#define KEY_AD_L3	0x1F
#define KEY_AD_L4	0x26
#define KEY_AD_L5	0x30
#define KEY_AD_L6	0x3A
#define KEY_AD_DELTA	0x03 // tolerance
#elif(KEY_TYPE==Dual_ADCKey)
#define KEY_AD_L0	0x00
#define KEY_AD_L1	0x0B
#define KEY_AD_L2	0x1B
#define KEY_AD_L3	0x29
#define KEY_AD_DELTA	0x03 // tolerance
#endif
//=================================================================

typedef enum
{
 Input_CVBS1,
 Input_TV,
 Input_YPBPR,
 Input_VGA ,
 Input_Nums,
 Input_SVIDEO1,
 Input_CVBS2,
 Input_CVBS3,
 Input_CVBS4,
 Input_CVBS5,
 Input_CVBS6,

 //Input_SVIDEO1,
 Input_SVIDEO2,
 Input_CCIR656,



 Input_Nothing,
 Input_AllPort=0xFF
}InputPortType;

#define CVBS1_RealPortSet		PORT_CVBS_SV1C
#define CVBS2_RealPortSet		PORT_CVBS_SV0C
#define TV_RealPortSet			PORT_CVBS_SV1Y
#define CVBS3_RealPortSet		PORT_CVBS_SV1Y
#define CVBS4_RealPortSet		PORT_CVBS_SV1C
#define CVBS5_RealPortSet		PORT_CVBS_SV1C
#define CVBS6_RealPortSet		PORT_CVBS_SV1C
#define SVIDEO1_RealPortSet		PORT_SV0
#define SVIDEO2_RealPortSet		PORT_SV1
#define VGA_RealPortSet			PORT_VGA
#define YPbPr_RealPortSet		PORT_YPbPr