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{BK0_51_VSST_H, 0x08},
{BK0_52_VSEND_L, 0xFD}, // vsync start position
{BK0_53_VSEND_H, 0x00},
{BK0_54_HDTOT_L,0xBD},
{BK0_55_HDTOT_H, 0x03},
{BK0_56_HSEND, 0x36},
{_END_OF_TBL_, 0x00},
};
#ifdef VGA_ENABLE
RegUnitType code t640_480_60Hz_VGA_ModeTbl[]=
{//Reg Vale
{_END_OF_TBL_, 0x00},
};
RegUnitType code t800_600_60Hz_VGA_ModeTbl[]=
{//Reg Vale
{_END_OF_TBL_, 0x00},
};
RegUnitType code t1024_768_60Hz_VGA_ModeTbl[]=
{//Reg Vale
{_END_OF_TBL_, 0x00},
};
#endif
RegUnitType code tFreeRunModeTbl[]=
{//Reg Vale
{BK0_27_OPL_SET2,0x3B},
{BK0_32_SRH_H,0x40},
{BK0_35_SRV_H, 0x00},
{BK0_42_HFDEST_L, 0x32},
{BK0_46_HFDEEND_L,0xBC},
{BK0_47_HFDEEND_H,0x02},
{BK0_50_VSST_L, 0xEE}, // vsync start position
{BK0_51_VSST_H, 0x08},
{BK0_56_HSEND, 0x36},
{_END_OF_TBL_, 0x00},
};
RegUnitType code tTVSnowModeTbl[]=
{//Reg Vale
{_END_OF_TBL_, 0x00},
};
#endif
//*******************************************************************
//Ace setting
#define CbGain 0x80
#define CrGain 0x80
#define RedGain 0x80
#define GreenGain 0x80
#define BlueGain 0x80
#define INIT_VIDEO_CONTRAST_X0 70 //90
#define INIT_VIDEO_CONTRAST_X1 90 // 110
#define INIT_VIDEO_CONTRAST_X2 100 // 131
#define INIT_VIDEO_CONTRAST_X3 110 // 140
#define INIT_VIDEO_CONTRAST_X4 130
#define INIT_VIDEO_BRIGHTNESS_X0 0x50
#define INIT_VIDEO_BRIGHTNESS_X1 0x70
#define INIT_VIDEO_BRIGHTNESS_X2 0x80
#define INIT_VIDEO_BRIGHTNESS_X3 0xA0
#define INIT_VIDEO_BRIGHTNESS_X4 0xC0
#define INIT_VIDEO_SATURATION_X0 0
#define INIT_VIDEO_SATURATION_X1 80
#define INIT_VIDEO_SATURATION_X2 135 //133
#define INIT_VIDEO_SATURATION_X3 150 //150
#define INIT_VIDEO_SATURATION_X4 180 //180
#define INIT_MSVD_COMB_YGAIN 0x92 //BK3_13
#define INIT_MSVD_COMB_CbGAIN 0x96 //BK3_14
#define INIT_MSVD_COMB_CrGAIN 0x6A //BK3_15
#define INIT_MSVD_COMB_CONTRAST 0x98 //BK3_63
#define INIT_MSVD_COMB_BRIGHTNESS 0x8C //BK3_64
#define INIT_MSVD_COMB_SATURATION 0x80 //BK3_65 0x80
#define INIT_MSVD_TV_BRIGHTNESS 0x0CE // bk2_38[6] bk2_3a[7:0] MAXVALUE=0X1FF
#ifdef EnableUseGammaTbl
code BYTE tGammaTableNormal[3][33]=
{
{
0x00,0x06,0x0C,0x11,0x18,0x1F,0x29,0x34,0x3E,0x48,0x51,
0x59,0x60,0x68,0x70,0x77,0x7F,0x86,0x8E,0x96,0x9E,0xA5,
0xAA,0xB0,0xB5,0xBA,0xBF,0xC4,0xCB,0xD4,0xDF,0xED,0xFF,
},
{
0x00,0x06,0x0C,0x11,0x18,0x1F,0x29,0x34,0x3E,0x48,0x51,
0x59,0x60,0x68,0x70,0x77,0x7F,0x86,0x8E,0x96,0x9E,0xA5,
0xAA,0xB0,0xB5,0xBA,0xBF,0xC4,0xCB,0xD4,0xDF,0xED,0xFF,
},
{
0x00,0x06,0x0C,0x11,0x18,0x1F,0x29,0x34,0x3E,0x48,0x51,
0x59,0x60,0x68,0x70,0x77,0x7F,0x86,0x8E,0x96,0x9E,0xA5,
0xAA,0xB0,0xB5,0xBA,0xBF,0xC4,0xCB,0xD4,0xDF,0xED,0xFF,
},
};
#endif
#ifdef EnableColorMatrix
// Smooth (X)
// R Array (0,2), G Array (1,2), B Array (1,1)
// R Adj. (0), G Adj. (0), B Adj. (0)
code short tVideoColorCorrectionMatrix[][3]=
{
0x0448,-0x0068, 0x001F,-0x0001, 0x0444,-0x0043,-0x0070, 0x0065,
0x040B,-0x02E6, 0x0288,-0x05BB, 0x07A4,-0x062C, 0x06F3,-0x073C,
-0x0024, 0x01BF, 0x07EF,-0x0116, 0x01EE, 0x052C,-0x03BB, 0x00B1,
-0x0831, 0x0100,-0x0002, 0x0102,-0x0101, 0x0000, 0x0000, 0x0000,
};
#endif
#ifdef _EnableFCC_
RegUnitType code tInitializeFCC[] =
{
/////////////////////////////////////////////////
// Initialize MACE table
/////////////////////////////////////////////////
{BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU},
{BK1_56_FCC_CB_1T, 0x70}, // FCC_
{BK1_57_FCC_CR_1T, 0x9B}, // FCC_
{BK1_58_FCC_CB_2T, 0x6E}, // FCC_
{BK1_59_FCC_CR_2T, 0xAC}, // FCC_
{BK1_5A_FCC_CB_3T, 0xA5}, // FCC_
{BK1_5B_FCC_CR_3T, 0x69}, // FCC_
{BK1_5C_FCC_CB_4T, 0x5A}, // FCC_
{BK1_5D_FCC_CR_4T, 0x9A}, // FCC_
{BK1_5E_FCC_CB_5T, 0x5A}, // FCC_
{BK1_5F_FCC_CR_5T, 0x75}, // FCC_
{BK1_60_FCC_CB_6T, 0xB0}, // FCC_
{BK1_61_FCC_CR_6T, 0x48}, // FCC_
{BK1_62_FCC_CB_7T, 0x64}, // FCC_
{BK1_63_FCC_CR_7T, 0xC8}, // FCC_
{BK1_64_FCC_CB_8T, 0x80}, // FCC_
{BK1_65_FCC_CR_8T, 0x80}, // FCC_
{BK1_66_FCC_CB_9T, 0x80}, // FCC_
{BK1_67_FCC_CR_9T, 0xA0},// FCC_
{BK1_68_FCC_WIN1, 0xA6}, // FCC_
{BK1_69_FCC_WIN2, 0xBA}, // FCC_
{BK1_6A_FCC_WIN3, 0xFB}, // FCC_
{BK1_6B_FCC_WIN4, 0x73}, // FCC_
{BK1_6C_FCC_WIN5, 0xFB}, // FCC_
{BK1_6D_FCC_WIN6, 0xFB}, // FCC_
{BK1_6E_FCC_WIN7, 0xFF}, // FCC_
{BK1_6F_FCC_WIN8, 0x6A}, // FCC_
{BK1_70_FCC_WIN9, 0x00}, // FCC_
{BK1_71_FCC_Y_TH, 0xFF}, // FCC_
{BK1_72_FCC_K1K2, 0x60}, // FCC_
{BK1_73_FCC_K3K4, 0xFE}, // FCC_
{BK1_74_FCC_K5K6, 0xFB}, // FCC_
{BK1_75_FCC_K7K8, 0x85}, // FCC_
// {BK1_76_FCC_CTRL, 0x2F}, // FCC_
// {BK1_77_APP_CTRL, 0x7E}, // FCC_
{BK1_78_PEAK_BAND1, 0x1D}, // FCC_
{BK1_79_PEAK_BAND2, 0x18}, // FCC_
{BK1_7D_CTI,0x70},
{BK1_7E_VIP_Y_CTRL,0x03},
{BK1_7F_MAX_PIX, 0x80}, // MAX_PIX
{BK1_80_MIN_PIX, 0x40}, // MIN_PIX
// {BK1_81_EGE_BAND1_POS,0x40},
// {BK1_82_EGE_BAND1_NEG,0x60},
// {BK1_84_EGE_BAND2_NEG,0x60},
// {BK1_85_M_BRI,0x12},//0x08},
// {BK1_86_EGE_LTI_POS,0x10},
// {BK1_87_EGE_LTI_NEG,0x20},
// {BK1_88_YC_LPF, 0x88},
{BK1_83_EGE_BAND2_POS, 0x30},
{BK1_89, 0x00},
// {BK1_8A, 0x23},
{BK1_8B, 0x43},
{BK1_8C, 0xFF},
{BK1_8D, 0xAE},
{BK1_8E, 0x36},
{BK1_8F, 0x01},
{BK0_00_REGBK, REG_BANK_SCALER},
{_END_OF_TBL_, 0x00}
};
RegUnitType code tVideoFCC[] =
{
{BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU},
{BK1_77_APP_CTRL, 0x7E}, // FCC_
{BK1_85_M_BRI,0x00},//{BK1_85_M_BRI,0xEA},
// {BK1_88_YC_LPF, 0x88},//Nelson del
{BK0_00_REGBK, REG_BANK_SCALER},
{_END_OF_TBL_, 0x00}
};
#ifdef VGA_ENABLE
RegUnitType code tPCFCC[] =
{
{BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU},
{BK1_77_APP_CTRL, 0}, // FCC_
{BK1_85_M_BRI,0},
{BK1_88_YC_LPF, 0},
{BK0_00_REGBK, REG_BANK_SCALER},
{_END_OF_TBL_, 0x00}
};
#endif
RegUnitType code t_AVInitializeFCC[] =
{
{BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU},
{BK1_76_FCC_CTRL, 0x2F}, // FCC_
{BK1_7A_LTI, 0xA0}, // FCC_
{BK1_7C_CROING,0x64},
{BK1_81_EGE_BAND1_POS,0xFF},
{BK1_82_EGE_BAND1_NEG,0xFF},
{BK1_84_EGE_BAND2_NEG,0x60},
{BK1_86_EGE_LTI_POS,0x08},
{BK1_87_EGE_LTI_NEG,0x10},
{BK1_88_YC_LPF, 0x8C},
{BK1_8A, 0x23},
{BK0_00_REGBK, REG_BANK_SCALER},
{_END_OF_TBL_, 0x00},
};
RegUnitType code t_TVInitializeFCC[] =
{
{BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU},
{BK1_76_FCC_CTRL, 0x2D},
{BK1_7A_LTI, 0x90},
{BK1_7C_CROING,0x64},
{BK1_81_EGE_BAND1_POS,0x00},
{BK1_82_EGE_BAND1_NEG,0x00},
{BK1_84_EGE_BAND2_NEG,0x00},
{BK1_86_EGE_LTI_POS,0x00},
{BK1_87_EGE_LTI_NEG,0x00},
{BK1_88_YC_LPF, 0x9C},
{BK1_8A, 0x43},
{BK0_00_REGBK, REG_BANK_SCALER},
{_END_OF_TBL_, 0x00},
};
#endif // _EnableFcc_
#endif
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