s_rw_ram.s

针对三星的44B0的外围基本接口实验源代码

;/*********************************************************************************************
;* File：	c_ram_test.s
;* Author:	embest R.X.Huang
;* Desc：	Memory Read/Write (ASM code) Test
;* History:	
;*********************************************************************************************/
    
;/*------------------------------------------------------------------------------------------*/
;/*                                     global label                                         */
;/*------------------------------------------------------------------------------------------*/                                                                                                                                                           
	global s_ram_test

;/*------------------------------------------------------------------------------------------*/
;/*                                     constant definition                                     */
;/*------------------------------------------------------------------------------------------*/
RW_NUM     EQU	100
RW_BASE    EQU	0x0c010000
RW_TARGET  EQU	0x0c020000
    
;/*********************************************************************************************
;* name:		s_ram_test
;* func:		access memory by word, hard word, byte
;* para:		none
;* ret:		none
;* modify:
;* comment:		
;*********************************************************************************************/
        AREA text,CODE,READONLY
		export 
s_ram_test
	stmdb	sp!, {r2-r4, lr}      ;/* push r0-r11, ip, lr */
	bl      init_ram
;	@ read from RW_BASE and write them into RW_TARGET
	ldr     r2,=RW_BASE
	ldr     r3,[r2]                   ;/* Read by Word */
	ldr     r2,=RW_TARGET
	str     r3,[r2]                    ;/* Write by Word */

	bl      init_ram
;	@ read from RW_BASE and write them into RW_TARGET
	ldr     r2,=RW_BASE 	
	ldrh    r3,[r2],#2                 ;/* Read by half Word */
	ldrh    r4,[r2]                    ;/* Read next half Word */
	ldr     r2,=RW_TARGET
	strh    r3,[r2],#2                 ;/* Write by half Word */
	strh    r4,[r2]                    ;/* Write next half Word */
	
;	@ read from RW_BASE     
	ldr     r2,=RW_BASE                       
	ldrb    r3,[r2]	                   ;/* Read by Byte */
;	@ write 0xDDBB2211 into RW_TARGET
	ldr     r2,=RW_TARGET
	ldr     r3,=0xDD
	strb    r3,[r2],#1                 ;/* Write by Byte */
	ldr     r3,=0xBB	
	strb    r3,[r2],#1	
	ldr     r3,=0x22	
	strb    r3,[r2],#1 
	ldr     r3,=0x11	
	strb    r3,[r2]
	
	ldmia	sp!, {r2-r4, lr}           ;/* pop r0-r11, ip, lr */
	bx      lr                      ;/* return */
    
;/*********************************************************************************************
;* name:		init_ram
;* func:		write constant into memory
;* para:		none
;* ret:		none
;* modify:
;* comment:		
;*********************************************************************************************/
init_ram
	ldr     r2,=RW_BASE
	ldr     r3,=0x55AA55AA	
	str     r3,[r2]                    ;/* write 0x55AA55AA into RW_BASE */
	ldr     r2,=RW_TARGET
	ldr     r3,=0x0	
	str     r3,[r2]                    ;/* write 0x0 into RW_TARGET */
    bx      lr                      ;/* return */
    end