sfr_r81b.h

本代码以低成本的瑞萨单片机为主控制器

#define     ilvl1_int0ic  int0ic_addr.bit.ilvl1
#define     ilvl2_int0ic  int0ic_addr.bit.ilvl2
#define     ir_int0ic     int0ic_addr.bit.ir
#define     pol_int0ic    int0ic_addr.bit.pol

/*------------------------------------------------------
  UARTi transmit/receive mode register
------------------------------------------------------*/
union{
  struct{
    char  smd0  :1;    /* Serial I/O mode select bit */
    char  smd1  :1;    /* Serial I/O mode select bit */
    char  smd2  :1;    /* Serial I/O mode select bit */
    char  ckdir :1;    /* Internal/external clock select bit */
    char  stps  :1;    /* Stop bit length select bit */
    char  pry   :1;    /* Odd/even parity select bit */
    char  prye  :1;    /* Parity enable bit */
    char  b7    :1;         
  }bit;
  char  byte;
}u0mr_addr,u1mr_addr;

/*------------------------------------------------------
  UART0 transmit/receive mode register
------------------------------------------------------*/
#define    u0mr          u0mr_addr.byte

#define    smd0_u0mr     u0mr_addr.bit.smd0    /* Serial I/O mode select bit */
#define    smd1_u0mr     u0mr_addr.bit.smd1    /* Serial I/O mode select bit */
#define    smd2_u0mr     u0mr_addr.bit.smd2    /* Serial I/O mode select bit */
#define    ckdir_u0mr    u0mr_addr.bit.ckdir   /* Internal/external clock select bit */
#define    stps_u0mr     u0mr_addr.bit.stps    /* Stop bit length select bit */
#define    pry_u0mr      u0mr_addr.bit.pry     /* Odd/even parity select bit */
#define    prye_u0mr     u0mr_addr.bit.prye    /* Parity enable bit */

/*------------------------------------------------------
  UART1 transmit/receive mode register
------------------------------------------------------*/
#define    u1mr          u1mr_addr.byte

#define    smd0_u1mr     u1mr_addr.bit.smd0    /* Serial I/O mode select bit */
#define    smd1_u1mr     u1mr_addr.bit.smd1    /* Serial I/O mode select bit */
#define    smd2_u1mr     u1mr_addr.bit.smd2    /* Serial I/O mode select bit */
#define    ckdir_u1mr    u1mr_addr.bit.ckdir   /* Internal/external clock select bit */
#define    stps_u1mr     u1mr_addr.bit.stps    /* Stop bit length select bit */
#define    pry_u1mr      u1mr_addr.bit.pry     /* Odd/even parity select bit *//
#define    prye_u1mr     u1mr_addr.bit.prye    /* Parity enable bit */

/*------------------------------------------------------
  UARTi transmit/receive control register0
------------------------------------------------------*/
union{
  struct{
    char  clk0  :1;    /* BRG count source select bit */
    char  clk1  :1;    /* BRG count source select bit */
    char  b2    :1;         
    char  txept :1;    /* Transmit register empty flag */
    char  b4    :1;         
    char  nch   :1;    /* Data output select bit */
    char  ckpol :1;    /* CLK polarity select bit */
    char  uform :1;    /* Transfer format select bit */
  }bit;
  char  byte;
}u0c0_addr,u1c0_addr;

/*------------------------------------------------------
  UART0 transmit/receive control register0
------------------------------------------------------*/
#define    u0c0          u0c0_addr.byte

#define    clk0_u0c0     u0c0_addr.bit.clk0    /* BRG count source select bit */
#define    clk1_u0c0     u0c0_addr.bit.clk1    /* BRG count source select bit */
#define    txept_u0c0    u0c0_addr.bit.txept   /* Transmit register empty flag */
#define    nch_u0c0      u0c0_addr.bit.nch     /* Data output select bit */
#define    ckpol_u0c0    u0c0_addr.bit.ckpol   /* CLK polarity select bit */
#define    uform_u0c0    u0c0_addr.bit.uform   /* Transfer format select bit */

/*------------------------------------------------------
  UART1 transmit/receive control register0
------------------------------------------------------*/
#define    u1c0          u1c0_addr.byte

#define    clk0_u1c0     u1c0_addr.bit.clk0    /* BRG count source select bit */
#define    clk1_u1c0     u1c0_addr.bit.clk1    /* BRG count source select bit */
#define    txept_u1c0    u1c0_addr.bit.txept   /* Transmit register empty flag */
#define    nch_u1c0      u1c0_addr.bit.nch     /* Data output select bit */
#define    ckpol_u1c0    u1c0_addr.bit.ckpol   /* CLK polarity select bit */
#define    uform_u1c0    u1c0_addr.bit.uform   /* Transfer format select bit */

/*------------------------------------------------------
  UARTi transmit/receive control register1
------------------------------------------------------*/
union{
  struct{
    char  te:1;        /* Transmit enable bit */
    char  ti:1;        /* Transmit buffer empty flag */
    char  re:1;        /* Receive enable bit */
    char  ri:1;        /* Receive complete flag */
    char  b4:1;
    char  b5:1;
    char  b6:1;
    char  b7:1;
  }bit;
  char  byte;
}u0c1_addr,u1c1_addr;

/*------------------------------------------------------
  UART0 transmit/receive control register1
------------------------------------------------------*/
#define    u0c1          u0c1_addr.byte

#define    te_u0c1       u0c1_addr.bit.te      /* Transmit enable bit */
#define    ti_u0c1       u0c1_addr.bit.ti      /* Transmit buffer empty flag */
#define    re_u0c1       u0c1_addr.bit.re      /* Receive enable bit */
#define    ri_u0c1       u0c1_addr.bit.ri      /* Receive complete flag */

/*------------------------------------------------------
  UART1 transmit/receive control register1
------------------------------------------------------*/
#define    u1c1          u1c1_addr.byte

#define    te_u1c1       u1c1_addr.bit.te      /* Transmit enable bit */
#define    ti_u1c1       u1c1_addr.bit.ti      /* Transmit buffer empty flag */
#define    re_u1c1       u1c1_addr.bit.re      /* Receive enable bit */
#define    ri_u1c1       u1c1_addr.bit.ri      /* Receive complete flag */

/*------------------------------------------------------
  UARTi receive buffer register
------------------------------------------------------*/
union{
  struct{
    char  b0:1;
    char  b1:1;
    char  b2:1;
    char  b3:1;
    char  b4:1;
    char  b5:1;
    char  b6:1;
    char  b7:1;
    char  b8:1;
    char  b9:1;
    char  b10:1;
    char  b11:1;
    char  oer:1;       /* Overrun error flag */
    char  fer:1;       /* Framing error flag */
    char  per:1;       /* Parity error flag */
    char  sum:1;       /* Error sum flag */
  }bit;
   struct{
    char  low;         /* Low  8 bit */
    char  high;        /* High 8 bit */
  }byte;
  unsigned short  word;
}u0rb_addr,u1rb_addr;

/*------------------------------------------------------
  UART0 receive buffer register
------------------------------------------------------*/
#define    u0rb          u0rb_addr.word
#define    u0rbl         u0rb_addr.byte.low
#define    u0rbh         u0rb_addr.byte.high

#define    oer_u0rb      u0rb_addr.bit.oer     /* Overrun error flag */
#define    fer_u0rb      u0rb_addr.bit.fer     /* Framing error flag */
#define    per_u0rb      u0rb_addr.bit.per     /* Parity error flag */
#define    sum_u0rb      u0rb_addr.bit.sum     /* Error sum flag */

/*------------------------------------------------------
  UART1 receive buffer register
------------------------------------------------------*/
#define    u1rb          u1rb_addr.word
#define    u1rbl         u1rb_addr.byte.low
#define    u1rbh         u1rb_addr.byte.high

#define    oer_u1rb      u1rb_addr.bit.oer     /* Overrun error flag */
#define    fer_u1rb      u1rb_addr.bit.fer     /* Framing error flag */
#define    per_u1rb      u1rb_addr.bit.per     /* Parity error flag */
#define    sum_u1rb      u1rb_addr.bit.sum     /* Error sum flag */

/********************************************************
*  declare SFR union                                    *
********************************************************/

union{
  struct{
    char  b0:1;
    char  b1:1;
    char  b2:1;
    char  b3:1;
    char  b4:1;
    char  b5:1;
    char  b6:1;
    char  b7:1;
    char  b8:1;
    char  b9:1;
    char  b10:1;
    char  b11:1;
    char  b12:1;
    char  b13:1;
    char  b14:1;
    char  b15:1;
    char  b16:1;
    char  b17:1;
    char  b18:1;
    char  b19:1;
   }bit;
   struct{
    char  low;         /* low  8 bit */
    char  mid;         /* mid  8 bit */
    char  high;        /* high 8 bit */
    char  nc;          /* non use */
  }byte;

  unsigned long  dword;
}rmad0_addr,rmad1_addr;

#define    rmad0         rmad0_addr.dword      /* Address match interrupt register0 */
#define    rmad0l        rmad0_addr.byte.low   /* Address match interrupt register0 Low */
#define    rmad0m        rmad0_addr.byte.mid   /* Address match interrupt register0 Middle */
#define    rmad0h        rmad0_addr.byte.high  /* Address match interrupt register0 High */
#define    rmad1         rmad1_addr.dword      /* Address match interrupt register1 */
#define    rmad1l        rmad1_addr.byte.low   /* Address match interrupt register1 Low */
#define    rmad1m        rmad1_addr.byte.mid   /* Address match interrupt register1 Middle */
#define    rmad1h        rmad1_addr.byte.high  /* Address match interrupt register1 High */


union{
  struct{
    char  b0:1;
    char  b1:1;
    char  b2:1;
    char  b3:1;
    char  b4:1;
    char  b5:1;
    char  b6:1;
    char  b7:1;
    char  b8:1;
    char  b9:1;
    char  b10:1;
    char  b11:1;
    char  b12:1;
    char  b13:1;
    char  b14:1;
    char  b15:1;
   }bit;
  struct{
    char  low;         /* low  8 bit */
    char  high;        /* high 8 bit */
  }byte;
  unsigned int  word;
} tc_addr, tm0_addr, tm1_addr, u0tb_addr, u1tb_addr, ad_addr;

#define    tc            tc_addr.word          /* Timer C */
#define    tcl           tc_addr.byte.low      /* Timer C Low */
#define    tch           tc_addr.byte.high     /* Timer C High */
#define    tm0           tm0_addr.word         /* Capture, compare0 register */
#define    tm0l          tm0_addr.byte.low     /* Capture, compare0 register Low */
#define    tm0h          tm0_addr.byte.high    /* Capture, compare0 register High */
#define    tm1           tm1_addr.word         /* Compare1 register */
#define    tm1l          tm1_addr.byte.low     /* Compare1 register Low */
#define    tm1h          tm1_addr.byte.high    /* Compare1 register High */
#define    u0tb          u0tb_addr.word        /* UART0 transmit buffer register */
#define    u0tbl         u0tb_addr.byte.low    /* UART0 transmit buffer register Low */
#define    u0tbh         u0tb_addr.byte.high   /* UART0 transmit buffer register High */
#define    u1tb          u1tb_addr.word        /* UART1 transmit buffer register */
#define    u1tbl         u1tb_addr.byte.low    /* UART1 transmit buffer register Low */
#define    u1tbh         u1tb_addr.byte.high   /* UART1 transmit buffer register High */
#define    ad            ad_addr.word          /* A-D register  */
#define    adl           ad_addr.byte.low      /* A-D register Low */
#define    adh           ad_addr.byte.high     /* A-D register High */

#endif		/*	SFR_R81B_H_INCLUDED	*/

#define uchar unsigned char  
#define uint unsigned int