sfr_r81b.h

本代码以低成本的瑞萨单片机为主控制器

/***********************************************************************************
File Name		sfr_r81b.h
Description		Definition of R8C/1B on-chip SFR.

Copyright   : 2006 Renesas Technology Europe Ltd.
Copyright   : 2006 Renesas Technology Corporation.
All Rights Reserved
***********************************************************************************/

/***********************************************************************************
Revision History
DD.MM.YYYY OSO-UID Description
07.04.2006 RTE-VNA First Release
***********************************************************************************/

#ifndef SFR_R81B_H_INCLUDED
#define SFR_R81B_H_INCLUDED

#pragma ADDRESS    pm0_addr     0004H    /* Processor mode register0 */

#pragma ADDRESS    pm1_addr     0005H    /* Processor mode register1 */

#pragma ADDRESS    cm0_addr     0006H    /* System clock control register0 */

#pragma ADDRESS    cm1_addr     0007H    /* System clock control register1 */

#pragma ADDRESS    aier_addr    0009H    /* Address match interrupt enable register */

#pragma ADDRESS    prcr_addr    000AH    /* Protect register */

#pragma ADDRESS    ocd_addr     000CH    /* Oscillation stop detect register */

#pragma ADDRESS    wdtr_addr    000DH    /* Watchdog timer reset register */

#pragma ADDRESS    wdts_addr    000EH    /* Watchdog timer start register */

#pragma ADDRESS    wdc_addr     000FH    /* Watchdog timer control register */

#pragma ADDRESS    rmad0_addr   0010H    /* Address match interrupt register0 */

#pragma ADDRESS    rmad1_addr   0014H    /* Address match interrupt register1 */

#pragma ADDRESS    cspr_addr    001CH    /* Count source protect mode register */

#pragma ADDRESS    int0f_addr   001EH    /* INT0 input filter select register */

#pragma ADDRESS    hra0_addr    0020H    /* High-speed on-chip oscillator A control register 0 */

#pragma ADDRESS    hra1_addr    0021H    /* High-speed on-chip oscillator A control register 1 */

#pragma ADDRESS    hra2_addr    0022H    /* High-speed on-chip oscillator A control register 2 */

#pragma ADDRESS    vca1_addr    0031H    /* Voltage detection A register 1 */

#pragma ADDRESS    vca2_addr    0032H    /* Voltage detection A register 2 */

#pragma ADDRESS    vw1c_addr    0036H    /* Voltage monitor 1 circuit control register */

#pragma ADDRESS    vw2c_addr    0037H    /* Voltage monitor 2 circuit control register */

#pragma ADDRESS    kupic_addr   004DH    /* Key input interrupt control register */

#pragma ADDRESS    adic_addr    004EH    /* Comparator conversion interrupt control register */

#pragma ADDRESS    cmp1ic_addr  0050H    /* Compare 1 interrupt control register */

#pragma ADDRESS    s0tic_addr   0051H    /* UART0 transmit interrupt control register */

#pragma ADDRESS    s0ric_addr   0052H    /* UART0 receive interrupt control register */

#pragma ADDRESS    s1tic_addr   0053H    /* UART1 transmit interrupt control register */

#pragma ADDRESS    s1ric_addr   0054H    /* UART1 receive interrupt control register */

#pragma ADDRESS    txic_addr    0056H    /* Timer X interrupt control register */

#pragma ADDRESS    tzic_addr    0058H    /* Timer Z interrupt control register */

#pragma ADDRESS    int1ic_addr  0059H    /* INT1 interrupt control register */

#pragma ADDRESS    int3ic_addr  005AH    /* INT3 interrupt control register */

#pragma ADDRESS    tcic_addr    005BH    /* Timer C interrupt control register */

#pragma ADDRESS    cmp0ic_addr  005CH    /* Compare 0 interrupt control register */

#pragma ADDRESS    int0ic_addr  005DH    /* INT0 interrupt control register */

#pragma ADDRESS    tzmr_addr    0080H    /* Timer Z mode register */
#pragma ADDRESS    tyzmr_addr   0080H    /* Timer Z mode register */

#pragma ADDRESS    pum_addr     0084H    /* Timer Z waveform output control register */

#pragma ADDRESS    prez_addr    0085H    /* Prescaler Z */

#pragma ADDRESS    tzsc_addr    0086H    /* Timer Z secondary */

#pragma ADDRESS    tzpr_addr    0087H    /* Timer Z primary */

#pragma ADDRESS    tzoc_addr    008AH    /* Timer Z output control register */
#pragma ADDRESS    tyzoc_addr   008AH    /* Timer Z output control register */

#pragma ADDRESS    txmr_addr    008BH    /* Timer X mode register */

#pragma ADDRESS    prex_addr    008CH    /* Prescaler X */

#pragma ADDRESS    tx_addr      008DH    /* Timer X register */

#pragma ADDRESS    tcss_addr    008EH    /* Timer count source select register */

#pragma ADDRESS    tc_addr      0090H    /* Timer C  register */

#pragma ADDRESS    inten_addr   0096H    /* External input enable register */

#pragma ADDRESS    kien_addr    0098H    /* Key input enable register */

#pragma ADDRESS    tcc0_addr    009AH    /* Timer C control register0 */

#pragma ADDRESS    tcc1_addr    009BH    /* Timer C control register1 */

#pragma ADDRESS    tm0_addr     009CH    /* Capture and compare0 register */

#pragma ADDRESS    tm1_addr     009EH    /* Compare1 register */

#pragma ADDRESS    u0mr_addr    00A0H    /* UART0 transmit/receive mode register */

#pragma ADDRESS    u0brg_addr   00A1H    /* UART0 bit rate generator */

#pragma ADDRESS    u0tb_addr    00A2H    /* UART0 transmit buffer register */

#pragma ADDRESS    u0c0_addr    00A4H    /* UART0 transmit/receive control register0 */

#pragma ADDRESS    u0c1_addr    00A5H    /* UART0 transmit/receive control register1 */

#pragma ADDRESS    u0rb_addr    00A6H    /* UART0 receive buffer register */

#pragma ADDRESS    u1mr_addr    00A8H    /* UART1 transmit/receive mode register */

#pragma ADDRESS    u1brg_addr   00A9H    /* UART1 bit rate generator */

#pragma ADDRESS    u1tb_addr    00AAH    /* UART1 transmit buffer register */

#pragma ADDRESS    u1c0_addr    00ACH    /* UART1 transmit/receive control register0 */

#pragma ADDRESS    u1c1_addr    00ADH    /* UART1 transmit/receive control register1 */

#pragma ADDRESS    u1rb_addr    00AEH    /* UART1 receive buffer register */

#pragma ADDRESS    ucon_addr    00B0H    /* UART transmit/receive control register2 */

#pragma ADDRESS    sscrh_addr   00B8H    /* SS control register H */

#pragma ADDRESS    sscrl_addr   00B9H    /* SS control register L */

#pragma ADDRESS    ssmr_addr    00BAH    /* SS mode reigister */

#pragma ADDRESS    sser_addr    00BBH    /* SS enable register */

#pragma ADDRESS    sssr_addr    00BCH    /* SS status register */

#pragma ADDRESS    ssmr2_addr   00BDH    /* SS mode register 2 */

#pragma ADDRESS    sstdr_addr   00BEH    /* SS transmit data register */

#pragma ADDRESS    ssrdr_addr   00BFH    /* SS receive data register */

#pragma ADDRESS    iccr1_addr   00B8H    /* IIC bus control register 1 */

#pragma ADDRESS    iccr2_addr   00B9H    /* IIC bus control register 2 */

#pragma ADDRESS    icmr_addr    00BAH    /* IIC bus mode register */

#pragma ADDRESS    icier_addr   00BBH    /* IIC bus interrupt enable register */

#pragma ADDRESS    icsr_addr    00BCH    /* IIC bus status register */

#pragma ADDRESS    sar_addr     00BDH    /* Slave ddress register */

#pragma ADDRESS    icdrt_addr   00BEH    /* IIC bus transmit data register */

#pragma ADDRESS    icdrr_addr   00BFH    /* IIC bus receive data register */

#pragma ADDRESS    ad_addr      00C0H    /* A-D register */

#pragma ADDRESS    adcon2_addr  00D4H    /* A-D control register2 */

#pragma ADDRESS    adcon0_addr  00D6H    /* A-D control register0 */

#pragma ADDRESS    adcon1_addr  00D7H    /* A-D control register1 */

#pragma ADDRESS    p1_addr      00E1H    /* Port P1 register */

#pragma ADDRESS    pd1_addr     00E3H    /* Port P1 direction register */

#pragma ADDRESS    p3_addr      00E5H    /* Port P3 register */

#pragma ADDRESS    pd3_addr     00E7H    /* Port P3 direction register */

#pragma ADDRESS    p4_addr      00E8H    /* Port P4 register */

#pragma ADDRESS    pd4_addr     00EAH    /* Port P4 direction register */

#pragma ADDRESS    pmr_addr     00F8H    /* Port mode register */

#pragma ADDRESS    pur0_addr    00FCH    /* Pull-up control register0 */

#pragma ADDRESS    pur1_addr    00FDH    /* Pull-up control register1 */

#pragma ADDRESS    drr_addr     00FEH    /* Port P1 drivability control register */

#pragma ADDRESS    tcout_addr   00FFH    /* Timer C output control register */

#pragma ADDRESS    fmr4_addr    01B3H    /* Flash memory control register4 */

#pragma ADDRESS    fmr1_addr    01B5H    /* Flash memory control register1 */

#pragma ADDRESS    fmr0_addr    01B7H    /* Flash memory control register0 */

/********************************************************
*  declare SFR bit                                      *
********************************************************/
struct bit_def {
    char  b0:1;
    char  b1:1;
    char  b2:1;
    char  b3:1;
    char  b4:1;
    char  b5:1;
    char  b6:1;
    char  b7:1;
};
union byte_def{
  struct bit_def bit;
  char  byte;
};

/*------------------------------------------------------
  Processor mode register0
------------------------------------------------------*/
union byte_def pm0_addr;
#define    pm0           pm0_addr.byte

#define    pm03          pm0_addr.bit.b3       /* Software reset bit */

/*------------------------------------------------------
  Processor mode register1
------------------------------------------------------*/
union byte_def pm1_addr;
#define    pm1           pm1_addr.byte

#define    pm12          pm1_addr.bit.b2       /* WDT interrupt/reset select bit */

/*------------------------------------------------------
  System clock control register0
------------------------------------------------------*/
union byte_def cm0_addr;
#define    cm0           cm0_addr.byte

#define    cm02          cm0_addr.bit.b2       /* WAIT peripheral function clock stop bit */
#define    cm05          cm0_addr.bit.b5       /* Main clock (Xin-Xout) stop bit */
#define    cm06          cm0_addr.bit.b6       /* Main clock division select bit0 */

/*------------------------------------------------------
  System clock control register1
------------------------------------------------------*/
union byte_def cm1_addr;
#define    cm1           cm1_addr.byte

#define    cm10          cm1_addr.bit.b0       /* All clock stop control bit */
#define    cm13          cm1_addr.bit.b3       /* Port Xin-Xout switch bits */
#define    cm14          cm1_addr.bit.b4       /* Low-speed on-chip oscillator stop bit */
#define    cm15          cm1_addr.bit.b5       /* Xin-Xout drive capability select bit */
#define    cm16          cm1_addr.bit.b6       /* Main clock division select bit1 */
#define    cm17          cm1_addr.bit.b7       /* Main clock division select bit1 */

/*------------------------------------------------------
  Address match interrupt enable register
------------------------------------------------------*/