stm32f10x_usart.txt

STM32手持式示波器源代码

; generated by ARM C/C++ Compiler with , RVCT4.0 [Build 524] for uVision
; commandline ArmCC [--split_sections --debug -c --asm --interleave -o.\Obj\stm32f10x_usart.o --depend=.\Obj\stm32f10x_usart.d --device=DARMSTM --apcs=interwork -O0 -Otime -I..\..\Libraries\CMSIS\Core\CM3 -I..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I..\..\Source\inc -Id:\Keil\ARM\INC\ST\STM32F10x -D__MICROLIB -DSTM32F10X_HD -DUSE_STDPERIPH_DRIVER ..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c]
                          THUMB

                          AREA ||i.USART_ClearFlag||, CODE, READONLY, ALIGN=1

                  USART_ClearFlag PROC
;;;831      */
;;;832    void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG)
000000  f4017200          AND      r2,r1,#0x200
;;;833    {
;;;834      /* Check the parameters */
;;;835      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;836      assert_param(IS_USART_CLEAR_FLAG(USART_FLAG));
;;;837      /* The CTS flag is not available for UART4 and UART5 */
;;;838      if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS)
000004  f5b27f00          CMP      r2,#0x200
000008  d100              BNE      |L1.12|
;;;839      {
;;;840        assert_param(IS_USART_123_PERIPH(USARTx));
00000a  bf00              NOP      
                  |L1.12|
;;;841      } 
;;;842       
;;;843      USARTx->SR = (uint16_t)~USART_FLAG;
00000c  43ca              MVNS     r2,r1
00000e  8002              STRH     r2,[r0,#0]
;;;844    }
000010  4770              BX       lr
;;;845    
                          ENDP


                          AREA ||i.USART_ClearITPendingBit||, CODE, READONLY, ALIGN=1

                  USART_ClearITPendingBit PROC
;;;938      */
;;;939    void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT)
000000  b510              PUSH     {r4,lr}
;;;940    {
;;;941      uint16_t bitpos = 0x00, itmask = 0x00;
000002  2200              MOVS     r2,#0
000004  2300              MOVS     r3,#0
;;;942      /* Check the parameters */
;;;943      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;944      assert_param(IS_USART_CLEAR_IT(USART_IT));
;;;945      /* The CTS interrupt is not available for UART4 and UART5 */
;;;946      if (USART_IT == USART_IT_CTS)
000006  f5a16410          SUB      r4,r1,#0x900
00000a  3c6a              SUBS     r4,r4,#0x6a
00000c  d100              BNE      |L2.16|
;;;947      {
;;;948        assert_param(IS_USART_123_PERIPH(USARTx));
00000e  bf00              NOP      
                  |L2.16|
;;;949      }   
;;;950      
;;;951      bitpos = USART_IT >> 0x08;
000010  120a              ASRS     r2,r1,#8
;;;952      itmask = ((uint16_t)0x01 << (uint16_t)bitpos);
000012  2401              MOVS     r4,#1
000014  4094              LSLS     r4,r4,r2
000016  b2a3              UXTH     r3,r4
;;;953      USARTx->SR = (uint16_t)~itmask;
000018  43dc              MVNS     r4,r3
00001a  8004              STRH     r4,[r0,#0]
;;;954    }
00001c  bd10              POP      {r4,pc}
;;;955    /**
                          ENDP


                          AREA ||i.USART_ClockInit||, CODE, READONLY, ALIGN=1

                  USART_ClockInit PROC
;;;269      */
;;;270    void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct)
000000  b510              PUSH     {r4,lr}
;;;271    {
;;;272      uint32_t tmpreg = 0x00;
000002  2200              MOVS     r2,#0
;;;273      /* Check the parameters */
;;;274      assert_param(IS_USART_123_PERIPH(USARTx));
;;;275      assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock));
;;;276      assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL));
;;;277      assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA));
;;;278      assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit));
;;;279      
;;;280    /*---------------------------- USART CR2 Configuration -----------------------*/
;;;281      tmpreg = USARTx->CR2;
000004  8a02              LDRH     r2,[r0,#0x10]
;;;282      /* Clear CLKEN, CPOL, CPHA and LBCL bits */
;;;283      tmpreg &= CR2_CLOCK_CLEAR_Mask;
000006  f24f03ff          MOV      r3,#0xf0ff
00000a  401a              ANDS     r2,r2,r3
;;;284      /* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/
;;;285      /* Set CLKEN bit according to USART_Clock value */
;;;286      /* Set CPOL bit according to USART_CPOL value */
;;;287      /* Set CPHA bit according to USART_CPHA value */
;;;288      /* Set LBCL bit according to USART_LastBit value */
;;;289      tmpreg |= (uint32_t)USART_ClockInitStruct->USART_Clock | USART_ClockInitStruct->USART_CPOL | 
00000c  880b              LDRH     r3,[r1,#0]
00000e  884c              LDRH     r4,[r1,#2]
000010  4323              ORRS     r3,r3,r4
000012  888c              LDRH     r4,[r1,#4]
000014  4323              ORRS     r3,r3,r4
000016  88cc              LDRH     r4,[r1,#6]
000018  4323              ORRS     r3,r3,r4
00001a  431a              ORRS     r2,r2,r3
;;;290                     USART_ClockInitStruct->USART_CPHA | USART_ClockInitStruct->USART_LastBit;
;;;291      /* Write to USART CR2 */
;;;292      USARTx->CR2 = (uint16_t)tmpreg;
00001c  8202              STRH     r2,[r0,#0x10]
;;;293    }
00001e  bd10              POP      {r4,pc}
;;;294    
                          ENDP


                          AREA ||i.USART_ClockStructInit||, CODE, READONLY, ALIGN=1

                  USART_ClockStructInit PROC
;;;300      */
;;;301    void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct)
000000  2100              MOVS     r1,#0
;;;302    {
;;;303      /* USART_ClockInitStruct members default value */
;;;304      USART_ClockInitStruct->USART_Clock = USART_Clock_Disable;
000002  8001              STRH     r1,[r0,#0]
;;;305      USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low;
000004  8041              STRH     r1,[r0,#2]
;;;306      USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge;
000006  8081              STRH     r1,[r0,#4]
;;;307      USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable;
000008  80c1              STRH     r1,[r0,#6]
;;;308    }
00000a  4770              BX       lr
;;;309    
                          ENDP


                          AREA ||i.USART_Cmd||, CODE, READONLY, ALIGN=1

                  USART_Cmd PROC
;;;318      */
;;;319    void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
000000  b121              CBZ      r1,|L5.12|
;;;320    {
;;;321      /* Check the parameters */
;;;322      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;323      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;324      
;;;325      if (NewState != DISABLE)
;;;326      {
;;;327        /* Enable the selected USART by setting the UE bit in the CR1 register */
;;;328        USARTx->CR1 |= CR1_UE_Set;
000002  8982              LDRH     r2,[r0,#0xc]
000004  f4425200          ORR      r2,r2,#0x2000
000008  8182              STRH     r2,[r0,#0xc]
00000a  e004              B        |L5.22|
                  |L5.12|
;;;329      }
;;;330      else
;;;331      {
;;;332        /* Disable the selected USART by clearing the UE bit in the CR1 register */
;;;333        USARTx->CR1 &= CR1_UE_Reset;
00000c  8982              LDRH     r2,[r0,#0xc]
00000e  f64d73ff          MOV      r3,#0xdfff
000012  401a              ANDS     r2,r2,r3
000014  8182              STRH     r2,[r0,#0xc]
                  |L5.22|
;;;334      }
;;;335    }
000016  4770              BX       lr
;;;336    
                          ENDP


                          AREA ||i.USART_DMACmd||, CODE, READONLY, ALIGN=1

                  USART_DMACmd PROC
;;;414      */
;;;415    void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState)
000000  b510              PUSH     {r4,lr}
;;;416    {
;;;417      /* Check the parameters */
;;;418      assert_param(IS_USART_1234_PERIPH(USARTx));
;;;419      assert_param(IS_USART_DMAREQ(USART_DMAReq));  
;;;420      assert_param(IS_FUNCTIONAL_STATE(NewState)); 
;;;421      if (NewState != DISABLE)
000002  b11a              CBZ      r2,|L6.12|
;;;422      {
;;;423        /* Enable the DMA transfer for selected requests by setting the DMAT and/or
;;;424           DMAR bits in the USART CR3 register */
;;;425        USARTx->CR3 |= USART_DMAReq;
000004  8a83              LDRH     r3,[r0,#0x14]
000006  430b              ORRS     r3,r3,r1
000008  8283              STRH     r3,[r0,#0x14]
00000a  e004              B        |L6.22|
                  |L6.12|
;;;426      }
;;;427      else
;;;428      {
;;;429        /* Disable the DMA transfer for selected requests by clearing the DMAT and/or
;;;430           DMAR bits in the USART CR3 register */
;;;431        USARTx->CR3 &= (uint16_t)~USART_DMAReq;
00000c  8a83              LDRH     r3,[r0,#0x14]
00000e  43cc              MVNS     r4,r1
000010  b2a4              UXTH     r4,r4
000012  4023              ANDS     r3,r3,r4
000014  8283              STRH     r3,[r0,#0x14]
                  |L6.22|
;;;432      }
;;;433    }
000016  bd10              POP      {r4,pc}
;;;434    
                          ENDP


                          AREA ||i.USART_DeInit||, CODE, READONLY, ALIGN=2

                  USART_DeInit PROC
;;;119      */
;;;120    void USART_DeInit(USART_TypeDef* USARTx)
000000  b510              PUSH     {r4,lr}
;;;121    {
000002  4604              MOV      r4,r0
;;;122      /* Check the parameters */
;;;123      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;124    
;;;125      if (USARTx == USART1)
000004  4820              LDR      r0,|L7.136|
000006  4284              CMP      r4,r0
000008  d109              BNE      |L7.30|
;;;126      {
;;;127        RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE);
00000a  2101              MOVS     r1,#1
00000c  0388              LSLS     r0,r1,#14
00000e  f7fffffe          BL       RCC_APB2PeriphResetCmd
;;;128        RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE);
000012  2100              MOVS     r1,#0
000014  f44f4080          MOV      r0,#0x4000
000018  f7fffffe          BL       RCC_APB2PeriphResetCmd
00001c  e032              B        |L7.132|
                  |L7.30|
;;;129      }
;;;130      else if (USARTx == USART2)
00001e  481b              LDR      r0,|L7.140|
000020  4284              CMP      r4,r0
000022  d109              BNE      |L7.56|
;;;131      {
;;;132        RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE);
000024  2101              MOVS     r1,#1
000026  0448              LSLS     r0,r1,#17
000028  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;133        RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE);
00002c  2100              MOVS     r1,#0
00002e  f44f3000          MOV      r0,#0x20000
000032  f7fffffe          BL       RCC_APB1PeriphResetCmd
000036  e025              B        |L7.132|
                  |L7.56|
;;;134      }
;;;135      else if (USARTx == USART3)
000038  4815              LDR      r0,|L7.144|
00003a  4284              CMP      r4,r0
00003c  d109              BNE      |L7.82|
;;;136      {
;;;137        RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE);
00003e  2101              MOVS     r1,#1
000040  0488              LSLS     r0,r1,#18
000042  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;138        RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE);
000046  2100              MOVS     r1,#0
000048  f44f2080          MOV      r0,#0x40000
00004c  f7fffffe          BL       RCC_APB1PeriphResetCmd
000050  e018              B        |L7.132|
                  |L7.82|
;;;139      }    
;;;140      else if (USARTx == UART4)
000052  4810              LDR      r0,|L7.148|
000054  4284              CMP      r4,r0
000056  d109              BNE      |L7.108|
;;;141      {
;;;142        RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE);
000058  2101              MOVS     r1,#1
00005a  04c8              LSLS     r0,r1,#19
00005c  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;143        RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE);
000060  2100              MOVS     r1,#0
000062  f44f2000          MOV      r0,#0x80000
000066  f7fffffe          BL       RCC_APB1PeriphResetCmd
00006a  e00b              B        |L7.132|
                  |L7.108|
;;;144      }