skxmac2.c

这是Marvell Technology Group Ltd. 4355 (rev 12)网卡在linux下的驱动程序源代码

		case SK_LSPEED_AUTO:
		case SK_LSPEED_1000MBPS:
			PhyCtrl |= (((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) != 0) ?
						PHY_CT_SP1000 : PHY_CT_SP100);
			break;
		case SK_LSPEED_100MBPS:
			PhyCtrl |= PHY_CT_SP100;
			break;
		case SK_LSPEED_10MBPS:
			break;
		default:
			SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E019,
				SKERR_HWI_E019MSG);
		}

		if ((pPrt->PFlowCtrlMode == SK_FLOW_STAT_NONE) ||
			/* disable Pause also for 10/100 Mbps in half duplex mode */
			(!(ChipId == CHIP_ID_YUKON_EC_U ||
			   ChipId == CHIP_ID_YUKON_EX ||
			   ChipId >= CHIP_ID_YUKON_SUPR) &&
			(pPrt->PLinkMode == SK_LMODE_HALF) &&
			 ((pPrt->PLinkSpeed == SK_LSPEED_STAT_100MBPS) ||
			  (pPrt->PLinkSpeed == SK_LSPEED_STAT_10MBPS)))) {

			/* set Pause Off */
			PauseMode = (SK_U8)GMC_PAUSE_OFF;
		}

		SK_OUT8(IoC, MR_ADDR(Port, GMAC_CTRL), PauseMode);

		if (!DoLoop) {
			/* assert software reset */
			PhyCtrl |= PHY_CT_RESET;
		}
	}
	else {
		/* set Auto-negotiation advertisement */

		if (pAC->GIni.GICopperType) {
			/* set Speed capabilities */
			switch (pPrt->PLinkSpeed) {
			case SK_LSPEED_AUTO:
				if ((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) != 0) {
					C1000BaseT |= PHY_M_1000C_AFD;
#ifdef xSK_DIAG
					C1000BaseT |= PHY_M_1000C_AHD;
#endif /* SK_DIAG */
				}
				AutoNegAdv |= PHY_M_AN_100_FD_HD | PHY_M_AN_10_FD_HD;
				break;
			case SK_LSPEED_1000MBPS:
				if ((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) != 0) {
					C1000BaseT |= PHY_M_1000C_AFD;
#ifdef xSK_DIAG
					C1000BaseT |= PHY_M_1000C_AHD;
#endif /* SK_DIAG */
				}
				break;
			case SK_LSPEED_100MBPS:
				AutoNegAdv |= PHY_M_AN_100_FD_HD;

				if (!(HW_FEATURE(pAC, HWF_FORCE_AUTO_NEG) &&
						/* only in case of 100FD */
						pPrt->PLinkModeConf < SK_LMODE_AUTOHALF)) {
					/* advertise 10Base-T also */
					AutoNegAdv |= PHY_M_AN_10_FD_HD;
				}
				break;
			case SK_LSPEED_10MBPS:
				AutoNegAdv |= PHY_M_AN_10_FD_HD;
				break;
			default:
				SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E019,
					SKERR_HWI_E019MSG);
			}

			/* set Full/half duplex capabilities */
			switch (pPrt->PLinkMode) {
			case SK_LMODE_AUTOHALF:
				C1000BaseT &= ~PHY_M_1000C_AFD;
				AutoNegAdv &= ~(PHY_M_AN_100_FD | PHY_M_AN_10_FD);
				break;
			case SK_LMODE_AUTOFULL:
				C1000BaseT &= ~PHY_M_1000C_AHD;
				AutoNegAdv &= ~(PHY_M_AN_100_HD | PHY_M_AN_10_HD);
				break;
			case SK_LMODE_AUTOBOTH:
				break;
			default:
				SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
					SKERR_HWI_E015MSG);
			}

			/* set Flow-control capabilities */
			switch (pPrt->PFlowCtrlMode) {
			case SK_FLOW_MODE_NONE:
				AutoNegAdv |= PHY_B_P_NO_PAUSE;
				break;
			case SK_FLOW_MODE_LOC_SEND:
				AutoNegAdv |= PHY_B_P_ASYM_MD;
				break;
			case SK_FLOW_MODE_SYMMETRIC:
				AutoNegAdv |= PHY_B_P_SYM_MD;
				break;
			case SK_FLOW_MODE_SYM_OR_REM:
				AutoNegAdv |= PHY_B_P_BOTH_MD;
				break;
			default:
				SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
					SKERR_HWI_E016MSG);
			}
		}
		else {	/* special defines for FIBER (88E1040S only) */

			/* set Full/half duplex capabilities */
			switch (pPrt->PLinkMode) {
			case SK_LMODE_AUTOHALF:
				AutoNegAdv |= PHY_M_AN_1000X_AHD;
				break;
			case SK_LMODE_AUTOFULL:
				AutoNegAdv |= PHY_M_AN_1000X_AFD;
				break;
			case SK_LMODE_AUTOBOTH:
				AutoNegAdv |= PHY_M_AN_1000X_AHD | PHY_M_AN_1000X_AFD;
				break;
			default:
				SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
					SKERR_HWI_E015MSG);
			}

			/* set Flow-control capabilities */
			switch (pPrt->PFlowCtrlMode) {
			case SK_FLOW_MODE_NONE:
				AutoNegAdv |= PHY_M_P_NO_PAUSE_X;
				break;
			case SK_FLOW_MODE_LOC_SEND:
				AutoNegAdv |= PHY_M_P_ASYM_MD_X;
				break;
			case SK_FLOW_MODE_SYMMETRIC:
				AutoNegAdv |= PHY_M_P_SYM_MD_X;
				break;
			case SK_FLOW_MODE_SYM_OR_REM:
				AutoNegAdv |= PHY_M_P_BOTH_MD_X;
				break;
			default:
				SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
					SKERR_HWI_E016MSG);
			}
		}

		if (!DoLoop) {
			/* Restart Auto-negotiation */
			PhyCtrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
		}
	}

#ifdef VCPU
	/*
	 * E-mail from Gu Lin (08-03-2002):
	 */

	/* Program PHY register 30 as 16'h0708 for simulation speed up */
	SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_DATA, 0x0700 /* 0x0708 */);

	VCpuWait(2000);

#else /* !VCPU */

	if (ChipId != CHIP_ID_YUKON_FE && ChipId != CHIP_ID_YUKON_FE_P) {
		/* Write 1000Base-T Control Register */
		SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_1000T_CTRL, C1000BaseT);
		SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
			("Set 1000B-T Ctrl  = 0x%04X\n", C1000BaseT));
	}

	/* Write AutoNeg Advertisement Register */
	SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_AUNE_ADV, AutoNegAdv);
	SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
		("Set Auto-Neg.Adv. = 0x%04X\n", AutoNegAdv));
#endif /* !VCPU */

#ifndef SK_SLIM
	if (DoLoop) {
		/* set the PHY Loopback bit */
		PhyCtrl |= PHY_CT_LOOP;
	}
#endif /* !SK_SLIM */

	/* Write to the PHY Control register */
	SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, PhyCtrl);
	SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
		("Set PHY Ctrl Reg. = 0x%04X\n", PhyCtrl));

#ifdef VCPU
#ifndef HASE
	VCpuWait(2000);
#endif /* HASE */
#else /* !VCPU */

	LedCtrl = PHY_M_LED_PULS_DUR(PULS_170MS);

	LedOver = 0;

	BlinkCtrl = pAC->GIni.GILedBlinkCtrl;

	if ((BlinkCtrl & SK_ACT_LED_BLINK) != 0) {

		if (ChipId == CHIP_ID_YUKON_FE) {
			/* on 88E3082 these bits are at 11..9 (shifted left) */
			LedCtrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;

			Word = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_LINK) |
				   /* change ACT LED control to LINK/ACT or blink mode */
				   PHY_M_FELP_LED1_CTRL(
					((BlinkCtrl & SK_LED_COMB_ACT_LNK) != 0) ?
					LED_PAR_CTRL_LNK_AC : LED_PAR_CTRL_ACT_BL) |
				   PHY_M_FELP_LED0_CTRL(
					/* check for LINK_LED mux */
					((BlinkCtrl & SK_LED_LINK_MUX_P60) != 0) ?
					LED_PAR_CTRL_LINK : LED_PAR_CTRL_SPEED);

			SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_FE_LED_PAR, Word);
		}
		else if (ChipId == CHIP_ID_YUKON_FE_P) {
			/* Enable Link Partner Next Page */
			PhySpec |= PHY_M_PC_ENA_LIP_NP;

			/* disable Energy Detect and enable scrambler */
			PhySpec &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);

			SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, PhySpec);

			/* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
			Word = PHY_M_FELP_LED2_CTRL(
					((BlinkCtrl & SK_LED_COMB_ACT_LNK) != 0) ?
					LED_PAR_CTRL_LNK_AC : LED_PAR_CTRL_ACT_BL) |
				   PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
				   PHY_M_FELP_LED0_CTRL(
					/* check for LINK_LED mux */
					((BlinkCtrl & SK_LED_LINK_MUX_P60) != 0) ?
					LED_PAR_CTRL_LINK : LED_PAR_CTRL_SPEED);

			SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_FE_LED_PAR, Word);
		}
		else if (NewPhyType) {
			/* save page register */
			SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_ADR, &PageReg);

			/* select page 3 to access LED control register */
			SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 3);

			/* LINK/ACT (Yukon-2 only) */
			LedConf = PHY_M_LEDC_LOS_CTRL(LC_LNK_ON_ACT_BL) |
					  PHY_M_LEDC_STA1_CTRL(LC_LINK_ON) |	/* 100 Mbps */
					  PHY_M_LEDC_STA0_CTRL(LC_LINK_ON);		/* 1000 Mbps */

			Mode = LC_LINK_ON;		/* 10 Mbps: On */

			if (ChipId == CHIP_ID_YUKON_XL) {
				/* set Polarity Control register */
				SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_STAT, (SK_U16)
					(PHY_M_POLC_LS1_P_MIX(4) | PHY_M_POLC_IS0_P_MIX(4) |
					 PHY_M_POLC_LOS_CTRL(2) | PHY_M_POLC_INIT_CTRL(2) |
					 PHY_M_POLC_STA1_CTRL(2) | PHY_M_POLC_STA0_CTRL(2)));
			}
			else if (ChipId == CHIP_ID_YUKON_EC_U ||
					 ChipId == CHIP_ID_YUKON_EX ||
					 ChipId >= CHIP_ID_YUKON_SUPR) {
				/* check for LINK_LED mux */
				if ((BlinkCtrl & SK_LED_LINK_MUX_P60) != 0) {

					/* LED scheme 2 */
					SK_IN16(IoC, GPHY_CTRL, &Word);

					Word |= GPC_LED_CONF_VAL(4);

					/* set GPHY LED Config */
					SK_OUT16(IoC, GPHY_CTRL, Word);
				}
				else {
					/* check for LED config bit 8 in PCI Our4 */
					SK_IN16(IoC, PCI_C(pAC, PCI_OUR_REG_4), &Word);

					if ((Word & P_PIN63_LINK_LED_ENA) == 0) {
						/* LED scheme 1 */
						Mode = LC_FORCE_OFF;	/* 10 Mbps: forced Off */

						if ((BlinkCtrl & SK_ACT_LED_NOTR_OFF) == 0) {
							/* set LED[5:4] Function Control and Polarity */
							SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_STAT,
								(SK_U16)
								/* LED_ACT to Link/Act. */
								(PHY_M_LEDC_STA1_CTRL(LC_LNK_ON_ACT_BL) |
								/* LED_DUP to Duplex */
								PHY_M_LEDC_STA0_CTRL(LC_DUPLEX_ON)));
						}
					}
					/* LED scheme 3 if P_PIN63_LINK_LED_ENA is set */
				}

				/* set Blink Rate in LED Timer Control Register */
				SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK,
					LedCtrl | (SK_U16)PHY_M_LED_BLINK_RT(BLINK_84MS));
			}

			LedConf |= PHY_M_LEDC_INIT_CTRL(Mode);

			/* set LED Function Control register */
			SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, LedConf);

#if (defined(SK_DIAG) || (defined(DEBUG) && !defined(SK_SLIM)))
			/* select page 6 to access Packet Generation register */
			SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 6);

			SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);

			Word |= BIT_4S;			/* enable CRC checker */

			SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
#endif /* SK_DIAG || (DEBUG && !SK_SLIM) */

			/* restore page register */
			SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, PageReg);
		}
		else {
			/* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
			LedCtrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;

			/* on PHY 88E1111 there is a change for LED control */
			if (ChipId == CHIP_ID_YUKON_EC &&
				(BlinkCtrl & SK_DUAL_LED_ACT_LNK) != 0) {
				/* Yukon-EC needs setting of 2 bits: 0,6=11) */
				LedCtrl |= PHY_M_LEDC_TX_C_LSB;
			}
			/* turn off the Rx LED (LED_RX) */
			LedOver |= PHY_M_LED_MO_RX(MO_LED_OFF);
		}
	}

	if ((BlinkCtrl & SK_DUP_LED_NORMAL) != 0) {
		/* disable blink mode (LED_DUPLEX) on collisions */
		LedCtrl |= PHY_M_LEDC_DP_CTRL;
	}

	if (ChipId == CHIP_ID_YUKON_EC_U || ChipId == CHIP_ID_YUKON_UL_2) {
		/* apply fixes in PHY AFE */
		SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 0x00ff);

		/* increase differential signal amplitude in 10BASE-T */
		SkGmPhyWrite(pAC, IoC, Port, 24, 0xaa99);
		SkGmPhyWrite(pAC, IoC, Port, 23, 0x2011);

		if (ChipId == CHIP_ID_YUKON_EC_U) {
			/* fix for IEEE A/B Symmetry failure in 1000BASE-T */
			SkGmPhyWrite(pAC, IoC, Port, 24, 0xa204);
			SkGmPhyWrite(pAC, IoC, Port, 23, 0x2002);
		}

		/* set page register to 0 */
		SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 0);
	}
	else if (ChipId == CHIP_ID_YUKON_FE_P &&
			 pAC->GIni.GIChipRev == CHIP_REV_YU_FE2_A0) {
		/* apply workaround for integrated resistors calibration */
		SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_ADDR, 17);

		SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_DATA, 0x3f60);
	}
	else if (ChipId != CHIP_ID_YUKON_EX &&
			 ChipId < CHIP_ID_YUKON_SUPR) {
		/* no effect on Yukon-XL */
		SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_CTRL, LedCtrl);

#ifndef SK_SLIM
		if ((BlinkCtrl & SK_LED_LINK100_ON) != 0) {
			/* only in forced 100 Mbps mode */
			if (!AutoNeg && pPrt->PLinkSpeed == SK_LSPEED_100MBPS) {
				/* turn on 100 Mbps LED (LED_LINK100) */
				LedOver |= PHY_M_LED_MO_100(MO_LED_ON);
			}
		}
#endif /* !SK_SLIM */

		if (LedOver != 0) {
			/* set Manual LED Override */
			SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_OVER, LedOver);
		}
	}

#ifdef SK_DIAG
	c_print("Set PHY Ctrl = 0x%04X\n", PhyCtrl);
	c_print("Set 1000 B-T = 0x%04X\n", C1000BaseT);
	c_print("Set Auto-Neg = 0x%04X\n", AutoNegAdv);
	c_print("Set PHY Spec = 0x%04X\n", PhySpec);
	c_print("Set Ext Ctrl = 0x%04X\n", ExtPhyCtrl);
#endif /* SK_DIAG */

#if (defined(SK_DIAG) || (defined(DEBUG) && !defined(SK_SLIM)))
	/* Read PHY Control */
	SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &PhyCtrl);
	SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
		("PHY Ctrl Reg. = 0x%04X\n", PhyCtrl));

	/* Read AutoNeg Advertisement Register */
	SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_ADV, &AutoNegAdv);
	SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
		("Auto-Neg.Adv. = 0x%04X\n", AutoNegAdv));

	if (ChipId != CHIP_ID_YUKON_FE && ChipId != CHIP_ID_YUKON_FE_P) {
		/* Read 1000Base-T Control Register */
		SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_CTRL, &C1000BaseT);
		SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
			("1000B-T Ctrl  = 0x%04X\n", C1000BaseT));

		/* Read Ext. PHY Specific Control */
		SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
		SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
			("Ext. PHY Ctrl = 0x%04X\n", ExtPhyCtrl));
	}

	/* Read PHY Status */
	SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat);
	SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
		("PHY Stat Reg. = 0x%04X\n", PhyStat));

	SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat1);
	SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
		("PHY Stat Reg. = 0x%04X\n", PhyStat1));

	/* Read PHY Specific Status */
	SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &PhySpecStat);
	SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
		("PHY Spec Stat = 0x%04X\n", PhySpecStat));
#endif /* SK_DIAG || (DEBUG && !SK_SLIM) */

#ifdef SK_DIAG
	c_print("PHY Ctrl Reg = 0x%04X\n", PhyCtrl);
	c_print("PHY 1000 Reg = 0x%04X\n", C1000BaseT);
	c_print("PHY AnAd Reg = 0x%04X\n", AutoNegAdv);
	c_print("Ext Ctrl Reg = 0x%04X\n", ExtPhyCtrl);
	c_print("PHY Stat Reg = 0x%04X\n", PhyStat);
	c_print("PHY Stat Reg = 0x%04X\n", PhyStat1);
	c_print("PHY Spec Reg = 0x%04X\n", PhySpecStat);
#endif /* SK_DIAG */

	/* clear PHY IRQ status */
	SkGmPhyRead(pAC, IoC, Port, PHY_MARV_INT_STAT, &Word);

	/* enable PHY interrupts */
	SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, (SK_U16)PHY_M_DEF_MSK);
#endif /* !VCPU */

}	/* SkGmInitPhyMarv */


/******************************************************************************
 *
 *	SkMacInitPhy() - Initialize the PHY registers
 *
 * Description:	calls the Init PHY routines dep. on board type
 *
 * Note:
 *
 * Returns:
 *	nothing
 */
void SkMacInitPhy(
SK_AC	*pAC,		/* Adapter Context */
SK_IOC	IoC,		/* I/O Context */
int		Port,		/* Port Index (MAC_1 + n) */
SK_BOOL	DoLoop)		/* Should a PHY LoopBack be set-up? */
{
	SK_GEPORT	*pPrt;

	pPrt = &pAC->GIni.GP[Port];

	SkGmInitPhyMarv(pAC, IoC, Port, DoLoop);

}	/* SkMacInitPhy */


/******************************************************************************
 *
 *	SkGmAutoNegDoneMarv() - Auto-negotiation handling
 *
 * Description:
 *	This function handles the auto-negotiation if the Done bit is set.
 *
 * Returns:
 *	SK_AND_OK	o.k.
 *	SK_AND_DUP_CAP	Duplex capability error happened
 *	SK_AND_