skdrv2nd.h

这是Marvell Technology Group Ltd. 4355 (rev 12)网卡在linux下的驱动程序源代码

#define C_OFFSET_TCPHEADER_TCPCS        16
#define C_OFFSET_UDPHEADER_UDPCS        6

#define C_OFFSET_IPPROTO                ( (C_LEN_ETHERMAC_HEADER) + \
                                          (C_OFFSET_IPHEADER_IPPROTO) )

#define C_PROTO_ID_UDP                  17       /* refer to RFC 790 or Stevens'   */
#define C_PROTO_ID_TCP                  6        /* TCP/IP illustrated for details */

/******************************************************************************
 *
 * Tx and Rx descriptor definitions
 *
 ******************************************************************************/

typedef struct s_RxD RXD; /* the receive descriptor */
struct s_RxD {
	volatile SK_U32  RBControl;     /* Receive Buffer Control            */
	SK_U32           VNextRxd;      /* Next receive descriptor,low dword */
	SK_U32           VDataLow;      /* Receive buffer Addr, low dword    */
	SK_U32           VDataHigh;     /* Receive buffer Addr, high dword   */
	SK_U32           FrameStat;     /* Receive Frame Status word         */
	SK_U32           TimeStamp;     /* Time stamp from XMAC              */
	SK_U32           TcpSums;       /* TCP Sum 2 / TCP Sum 1             */
	SK_U32           TcpSumStarts;  /* TCP Sum Start 2 / TCP Sum Start 1 */
	RXD             *pNextRxd;      /* Pointer to next Rxd               */
	struct sk_buff  *pMBuf;         /* Pointer to Linux' socket buffer   */
};

typedef struct s_TxD TXD; /* the transmit descriptor */
struct s_TxD {
	volatile SK_U32  TBControl;     /* Transmit Buffer Control            */
	SK_U32           VNextTxd;      /* Next transmit descriptor,low dword */
	SK_U32           VDataLow;      /* Transmit Buffer Addr, low dword    */
	SK_U32           VDataHigh;     /* Transmit Buffer Addr, high dword   */
	SK_U32           FrameStat;     /* Transmit Frame Status Word         */
	SK_U32           TcpSumOfs;     /* Reserved / TCP Sum Offset          */
	SK_U16           TcpSumSt;      /* TCP Sum Start                      */
	SK_U16           TcpSumWr;      /* TCP Sum Write                      */
	SK_U32           TcpReserved;   /* not used                           */
	TXD             *pNextTxd;      /* Pointer to next Txd                */
	struct sk_buff  *pMBuf;         /* Pointer to Linux' socket buffer    */
};

/******************************************************************************
 *
 * Generic Yukon-II defines
 *
 ******************************************************************************/


/* Number of Status LE which will be allocated at init time. */
#define NUMBER_OF_ST_LE 4096L

/* Number of revceive LE which will be allocated at init time. */
#define NUMBER_OF_RX_LE 512

/* Number of transmit LE which will be allocated at init time. */
#define NUMBER_OF_TX_LE 1024L

#define LE_SIZE   sizeof(SK_HWLE)
#define MAX_NUM_FRAGS   (MAX_SKB_FRAGS + 1)
#define MIN_LEN_OF_LE_TAB   128
#define MAX_UNUSED_RX_LE_WORKING   8
#ifdef MAX_FRAG_OVERHEAD
#undef MAX_FRAG_OVERHEAD
#define MAX_FRAG_OVERHEAD   4
#endif
// as we have a maximum of 16 physical fragments,
// maximum 1 ADDR64 per physical fragment
// maximum 4 LEs for VLAN, Csum, LargeSend, Packet
#define MIN_LE_FREE_REQUIRED   ((16*2) + 4)
//#define IS_GMAC(pAc)   (!pAc->GIni.GIGenesis)
#define IS_GMAC(pAc)   (0)
#ifdef USE_SYNC_TX_QUEUE
#define TXS_MAX_LE   256
#else /* !USE_SYNC_TX_QUEUE */
#define TXS_MAX_LE   0
#endif

#define ETHER_MAC_HDR_LEN   (6+6+2) // MAC SRC ADDR, MAC DST ADDR, TYPE
#define IP_HDR_LEN   20
#define TCP_CSUM_OFFS   0x10
#define UDP_CSUM_OFFS   0x06

#if (defined (Y2_RECOVERY) || defined (Y2_LE_CHECK))
/* event for recovery from rx out of sync */
#define SK_DRV_RECOVER    SK_DRV_PRIVATE_BASE + 1
#endif
/******************************************************************************
 *
 * Structures specific for Yukon-II
 *
 ******************************************************************************/

typedef	struct s_frag SK_FRAG;
struct s_frag {
 	SK_FRAG       *pNext;
 	char          *pVirt;
  	SK_U64         pPhys;
 	unsigned int   FragLen;
};

typedef	struct s_packet SK_PACKET;
struct s_packet {
	/* Common infos: */
	SK_PACKET       *pNext;         /* pointer for packet queues          */
	unsigned int     PacketLen;     /* length of packet                   */
	unsigned int     NumFrags;      /* nbr of fragments (for Rx always 1) */
	SK_FRAG         *pFrag;         /* fragment list                      */
	SK_FRAG          FragArray[MAX_NUM_FRAGS]; /* TX fragment array       */
	unsigned int     NextLE;        /* next LE to use for the next packet */

	/* Private infos: */
	struct sk_buff	*pMBuf;         /* Pointer to Linux' socket buffer    */
};

typedef	struct s_queue SK_PKT_QUEUE;
struct s_queue {
 	SK_PACKET       *pHead;
 	SK_PACKET       *pTail;
	spinlock_t       QueueLock;     /* serialize packet accesses          */
};

/*******************************************************************************
 *
 * Macros specific for Yukon-II queues
 *
 ******************************************************************************/

#define IS_Q_EMPTY(pQueue)  ((pQueue)->pHead != NULL) ? SK_FALSE : SK_TRUE
#define IS_Q_LOCKED(pQueue) spin_is_locked(&((pQueue)->QueueLock))

#define PLAIN_POP_FIRST_PKT_FROM_QUEUE(pQueue, pPacket)	{	\
        if ((pQueue)->pHead != NULL) {				\
		(pPacket)       = (pQueue)->pHead;		\
		(pQueue)->pHead = (pPacket)->pNext;		\
		if ((pQueue)->pHead == NULL) {			\
			(pQueue)->pTail = NULL;			\
		}						\
		(pPacket)->pNext = NULL;			\
	} else {						\
		(pPacket) = NULL;				\
	}							\
}

#define PLAIN_PUSH_PKT_AS_FIRST_IN_QUEUE(pQueue, pPacket) {	\
	if ((pQueue)->pHead != NULL) {				\
		(pPacket)->pNext = (pQueue)->pHead;		\
	} else {						\
		(pPacket)->pNext = NULL;			\
		(pQueue)->pTail  = (pPacket);			\
	}							\
      	(pQueue)->pHead  = (pPacket);				\
}

#define PLAIN_PUSH_PKT_AS_LAST_IN_QUEUE(pQueue, pPacket) {	\
	(pPacket)->pNext = NULL;				\
	if ((pQueue)->pTail != NULL) {				\
		(pQueue)->pTail->pNext = (pPacket);		\
	} else {						\
		(pQueue)->pHead        = (pPacket);		\
	}							\
	(pQueue)->pTail = (pPacket);				\
}

#define PLAIN_PUSH_MULTIPLE_PKT_AS_LAST_IN_QUEUE(pQueue,pPktGrpStart,pPktGrpEnd) { \
	if ((pPktGrpStart) != NULL) {					\
		if ((pQueue)->pTail != NULL) {				\
			(pQueue)->pTail->pNext = (pPktGrpStart);	\
		} else {						\
			(pQueue)->pHead = (pPktGrpStart);		\
		}							\
		(pQueue)->pTail = (pPktGrpEnd);				\
	}								\
}

/* Required: 'Flags' */ 
#define POP_FIRST_PKT_FROM_QUEUE(pQueue, pPacket)	{	\
	spin_lock_irqsave(&((pQueue)->QueueLock), Flags);	\
	if ((pQueue)->pHead != NULL) {				\
		(pPacket)       = (pQueue)->pHead;		\
		(pQueue)->pHead = (pPacket)->pNext;		\
		if ((pQueue)->pHead == NULL) {			\
			(pQueue)->pTail = NULL;			\
		}						\
		(pPacket)->pNext = NULL;			\
	} else {						\
		(pPacket) = NULL;				\
	}							\
	spin_unlock_irqrestore(&((pQueue)->QueueLock), Flags);	\
}

/* Required: 'Flags' */
#define PUSH_PKT_AS_FIRST_IN_QUEUE(pQueue, pPacket)	{	\
	spin_lock_irqsave(&(pQueue)->QueueLock, Flags);		\
	if ((pQueue)->pHead != NULL) {				\
		(pPacket)->pNext = (pQueue)->pHead;		\
	} else {						\
		(pPacket)->pNext = NULL;			\
		(pQueue)->pTail  = (pPacket);			\
	}							\
	(pQueue)->pHead = (pPacket);				\
	spin_unlock_irqrestore(&(pQueue)->QueueLock, Flags);	\
}

/* Required: 'Flags' */
#define PUSH_PKT_AS_LAST_IN_QUEUE(pQueue, pPacket)	{	\
	(pPacket)->pNext = NULL;				\
	spin_lock_irqsave(&(pQueue)->QueueLock, Flags);		\
	if ((pQueue)->pTail != NULL) {				\
		(pQueue)->pTail->pNext = (pPacket);		\
	} else {						\
		(pQueue)->pHead = (pPacket);			\
	}							\
	(pQueue)->pTail = (pPacket);				\
	spin_unlock_irqrestore(&(pQueue)->QueueLock, Flags);	\
}

/* Required: 'Flags' */
#define PUSH_MULTIPLE_PKT_AS_LAST_IN_QUEUE(pQueue,pPktGrpStart,pPktGrpEnd) {	\
	if ((pPktGrpStart) != NULL) {					\
		spin_lock_irqsave(&(pQueue)->QueueLock, Flags);		\
		if ((pQueue)->pTail != NULL) {				\
			(pQueue)->pTail->pNext = (pPktGrpStart);	\
		} else {						\
			(pQueue)->pHead = (pPktGrpStart);		\
		}							\
		(pQueue)->pTail = (pPktGrpEnd);				\
		spin_unlock_irqrestore(&(pQueue)->QueueLock, Flags);	\
	}								\
}

/*
 *Check if the low address (32 bit) is near the 4G limit or over it.
 * Set the high address to a wrong value.
 * Doing so we force to write the ADDR64 LE.
 */
#define CHECK_LOW_ADDRESS( _HighAddress, _LowAddress , _Length) {	\
	if ((~0-_LowAddress) <_Length) {				\
		_HighAddress= MAXIMUM_LOW_ADDRESS;			\
		SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,			\
			("High Address must be set for HW. LowAddr = %d  Length = %d\n",	\
			_LowAddress, _Length));				\
	}								\
}

/*******************************************************************************
 *
 * Macros specific for Yukon-II queues (tist)
 *
 ******************************************************************************/

#ifdef USE_TIST_FOR_RESET
/* port is fully operational */
#define SK_PSTATE_NOT_WAITING_FOR_TIST                  0
/* port in reset until any tist LE */
#define SK_PSTATE_WAITING_FOR_ANY_TIST          BIT_0
/* port in reset until timer reaches pAC->MinTistLo */
#define SK_PSTATE_WAITING_FOR_SPECIFIC_TIST     BIT_1   
#define SK_PSTATE_PORT_SHIFT    4
#define SK_PSTATE_PORT_MASK             ((1 << SK_PSTATE_PORT_SHIFT) - 1)

/* use this + Port to build OP_MOD_TXINDEX_NO_PORT_A|B */
#define OP_MOD_TXINDEX 0x71
/* opcode for a TX_INDEX LE in which Port A has to be ignored */
#define OP_MOD_TXINDEX_NO_PORT_A 0x71
/* opcode for a TX_INDEX LE in which Port B has to be ignored */
#define OP_MOD_TXINDEX_NO_PORT_B 0x72
/* opcode for LE to be ignored because port is still in reset */
#define OP_MOD_LE 0x7F

/* set tist wait mode Bit for port */ 
#define SK_SET_WAIT_BIT_FOR_PORT(pAC, Bit, Port)        \
	{ \
		(pAC)->AdapterResetState |= ((Bit) << (SK_PSTATE_PORT_SHIFT * Port)); \
	}

/* reset tist waiting for specified port */
#define SK_CLR_STATE_FOR_PORT(pAC, Port)        \
	{ \
		(pAC)->AdapterResetState &= \
			~(SK_PSTATE_PORT_MASK << (SK_PSTATE_PORT_SHIFT * Port)); \
	}

/* return SK_TRUE when port is in reset waiting for tist */
#define SK_PORT_WAITING_FOR_TIST(pAC, Port) \
	((((pAC)->AdapterResetState >> (SK_PSTATE_PORT_SHIFT * Port)) & \
		SK_PSTATE_PORT_MASK) != SK_PSTATE_NOT_WAITING_FOR_TIST)

/* return SK_TRUE when port is in reset waiting for any tist */
#define SK_PORT_WAITING_FOR_ANY_TIST(pAC, Port) \
	((((pAC)->AdapterResetState >> (SK_PSTATE_PORT_SHIFT * Port)) & \
		SK_PSTATE_WAITING_FOR_ANY_TIST) == SK_PSTATE_WAITING_FOR_ANY_TIST)

/* return SK_TRUE when port is in reset waiting for a specific tist */
#define SK_PORT_WAITING_FOR_SPECIFIC_TIST(pAC, Port) \
	((((pAC)->AdapterResetState >> (SK_PSTATE_PORT_SHIFT * Port)) & \
		SK_PSTATE_WAITING_FOR_SPECIFIC_TIST) == \
		SK_PSTATE_WAITING_FOR_SPECIFIC_TIST)
        
/* return whether adapter is expecting a tist LE */
#define SK_ADAPTER_WAITING_FOR_TIST(pAC)        ((pAC)->AdapterResetState != 0)

/* enable timestamp timer and force creation of tist LEs */
#define Y2_ENABLE_TIST(IoC) \
	SK_OUT8(IoC, GMAC_TI_ST_CTRL, (SK_U8) GMT_ST_START)
        
/* disable timestamp timer and stop creation of tist LEs */
#define Y2_DISABLE_TIST(IoC) \
	SK_OUT8(IoC, GMAC_TI_ST_CTRL, (SK_U8) GMT_ST_STOP)

/* get current value of timestamp timer */
#define Y2_GET_TIST_LOW_VAL(IoC, pVal) \
	SK_IN32(IoC, GMAC_TI_ST_VAL, pVal)

#endif


/*******************************************************************************
 *
 * Used interrupt bits in the interrupts source register
 *
 ******************************************************************************/

#define DRIVER_IRQS	((IS_IRQ_SW) | \