📄 pv_characteristic.mdl
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Position [115, 264, 160, 296]
Gain "G"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
Port {
PortNumber 1
Name "Iph"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType MinMax
Name "MinMax"
Ports [2, 1]
Position [750, 77, 780, 108]
Function "max"
Inputs "2"
InputSameDT off
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name "Ns"
Position [655, 262, 695, 298]
Gain "Ns"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Fcn
Name "PN-junction characteristic"
Position [430, 334, 510, 366]
Orientation "left"
Expr "Io*(exp(u/Vt)-1)"
Port {
PortNumber 1
Name "Id"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Product
Name "Product"
Ports [2, 1]
Position [905, 152, 935, 183]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name "Rs"
Position [420, 160, 460, 190]
NamePlacement "alternate"
Gain "Rs"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Saturate
Name "Saturation"
Position [290, 35, 320, 65]
UpperLimit "inf"
LowerLimit "0"
}
Block {
BlockType Sum
Name "Sum1"
Ports [2, 1]
Position [575, 270, 595, 290]
ShowName off
IconShape "round"
Inputs "-+|"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
Port {
PortNumber 1
Name "Vpvcell"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Sum
Name "Sum2"
Ports [2, 1]
Position [325, 340, 345, 360]
Orientation "left"
ShowName off
IconShape "round"
Inputs "|++"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum3"
Ports [2, 1]
Position [225, 270, 245, 290]
ShowName off
IconShape "round"
Inputs "-+|"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum4"
Ports [2, 1]
Position [285, 270, 305, 290]
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Switch
Name "Switch"
Position [840, 255, 870, 285]
Criteria "u2 > Threshold"
InputSameDT off
SaturateOnIntegerOverflow off
}
Block {
BlockType Outport
Name "Vpv"
Position [980, 263, 1010, 277]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "Ppv"
Position [980, 163, 1010, 177]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "Insolation"
SrcPort 1
DstBlock "Insolation to \ncurrent gain"
DstPort 1
}
Line {
Name "Iph"
Labels [1, 0]
SrcBlock "Insolation to \ncurrent gain"
SrcPort 1
DstBlock "Sum3"
DstPort 2
}
Line {
Name "Ipv"
Labels [0, 0]
SrcBlock "Ipv"
SrcPort 1
Points [30, 0]
Branch {
Points [0, -125]
DstBlock "Saturation"
DstPort 1
}
Branch {
Points [145, 0]
Branch {
Labels [1, 0]
DstBlock "Sum3"
DstPort 1
}
Branch {
DstBlock "Rs"
DstPort 1
}
}
}
Line {
SrcBlock "Product"
SrcPort 1
DstBlock "Ppv"
DstPort 1
}
Line {
SrcBlock "Sum4"
SrcPort 1
DstBlock "Algebraic Constraint"
DstPort 1
}
Line {
Name "Vd"
Labels [0, 0]
SrcBlock "Algebraic Constraint"
SrcPort 1
Points [50, 0]
Branch {
DstBlock "Sum1"
DstPort 2
}
Branch {
Points [0, 70]
Branch {
Points [0, 55]
DstBlock "1/Rp"
DstPort 1
}
Branch {
DstBlock "PN-junction characteristic"
DstPort 1
}
}
}
Line {
Name "Vpvcell"
Labels [0, 0]
SrcBlock "Sum1"
SrcPort 1
DstBlock "Ns"
DstPort 1
}
Line {
SrcBlock "Rs"
SrcPort 1
Points [120, 0]
DstBlock "Sum1"
DstPort 1
}
Line {
SrcBlock "By-pass diode"
SrcPort 1
DstBlock "MinMax"
DstPort 1
}
Line {
SrcBlock "Ns"
SrcPort 1
Points [20, 0]
Branch {
Points [0, -180]
DstBlock "MinMax"
DstPort 2
}
Branch {
DstBlock "Switch"
DstPort 3
}
}
Line {
SrcBlock "MinMax"
SrcPort 1
Points [30, 0; 0, 165]
DstBlock "Switch"
DstPort 1
}
Line {
SrcBlock "Constant"
SrcPort 1
Points [10, 0; 0, 65]
DstBlock "Switch"
DstPort 2
}
Line {
SrcBlock "Switch"
SrcPort 1
Points [15, 0]
Branch {
DstBlock "Vpv"
DstPort 1
}
Branch {
DstBlock "Product"
DstPort 2
}
}
Line {
SrcBlock "Saturation"
SrcPort 1
Points [55, 0]
Branch {
Points [500, 0; 0, 110]
DstBlock "Product"
DstPort 1
}
Branch {
Points [0, 35]
DstBlock "By-pass diode"
DstPort 1
}
}
Line {
SrcBlock "Sum3"
SrcPort 1
DstBlock "Sum4"
DstPort 1
}
Line {
SrcBlock "Sum2"
SrcPort 1
Points [-25, 0]
DstBlock "Sum4"
DstPort 2
}
Line {
Name "Id"
Labels [0, 0]
SrcBlock "PN-junction characteristic"
SrcPort 1
DstBlock "Sum2"
DstPort 1
}
Line {
Name "Vd/Rp"
Labels [0, 0]
SrcBlock "1/Rp"
SrcPort 1
Points [-105, 0]
DstBlock "Sum2"
DstPort 2
}
}
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [325, 100, 345, 120]
ShowName off
IconShape "round"
Inputs "-+|"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Outport
Name "Ipv"
Position [520, 103, 550, 117]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "Ppv"
Position [520, 158, 550, 172]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "Insolation"
SrcPort 1
DstBlock "PV module (I)"
DstPort 2
}
Line {
SrcBlock "PV module (I)"
SrcPort 1
DstBlock "Sum"
DstPort 2
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "Algebraic Constraint"
DstPort 1
}
Line {
SrcBlock "Algebraic Constraint"
SrcPort 1
Points [5, 0]
Branch {
DstBlock "Ipv"
DstPort 1
}
Branch {
Points [0, -55; -335, 0; 0, 55]
DstBlock "PV module (I)"
DstPort 1
}
}
Line {
SrcBlock "Vpv"
SrcPort 1
Points [285, 0]
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "PV module (I)"
SrcPort 2
Points [30, 0; 0, 30]
DstBlock "Ppv"
DstPort 1
}
}
}
Block {
BlockType Reference
Name "Vpv"
Ports [0, 1]
Position [15, 15, 80, 45]
SourceBlock "simulink/Sources/Repeating\nSequence"
SourceType "Repeating table"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
rep_seq_t "[0 1 2]"
rep_seq_y "[-0.5 25 -0.5]"
Port {
PortNumber 1
Name "Vpv"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Line {
Name "Vpv"
Labels [0, 0]
SrcBlock "Vpv"
SrcPort 1
Points [65, 0]
Branch {
Points [0, 115]
DstBlock "PV1"
DstPort 1
}
Branch {
Points [185, 0]
Branch {
Labels [1, 0]
DstBlock "PV power"
DstPort 1
}
Branch {
Points [0, 45]
DstBlock "I-V characteristic"
DstPort 1
}
}
}
Line {
SrcBlock "PV1"
SrcPort 2
Points [135, 0]
DstBlock "PV power"
DstPort 2
}
Line {
SrcBlock "Insolation"
SrcPort 1
DstBlock "PV1"
DstPort 2
}
Line {
Name "Ipv"
Labels [2, 0]
SrcBlock "PV1"
SrcPort 1
Points [30, 0; 0, -55]
DstBlock "I-V characteristic"
DstPort 2
}
Annotation {
Name "ECEN2060\nPV Module Characteristics"
Position [236, 61]
UseDisplayTextAsClickCallback off
}
}
}
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