📄 tau.h
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/*
Timer Input Select Register 0 (TIS0)
*/
/* Initial Value */
#define TAU_TIS0_INITIALVALUE 0x00
/* Selection of timer input/subsystem clock used with channel 0(TIS00) */
#define TAU_CH0_INPUT_TI0N 0x00 /* input signal of timer input pin (TI00) */
#define TAU_CH0_INPUT_FXT 0x01 /* subsystem clock divided by 4 (fXT/4) */
/* Selection of timer input/subsystem clock used with channel 1(TIS01) */
#define TAU_CH1_INPUT_TI0N 0x00 /* input signal of timer input pin (TI01) */
#define TAU_CH1_INPUT_FXT 0x02 /* subsystem clock divided by 4 (fXT/4) */
/* Selection of timer input/subsystem clock used with channel 2(TIS02) */
#define TAU_CH2_INPUT_TI0N 0x00 /* input signal of timer input pin (TI02) */
#define TAU_CH2_INPUT_FXT 0x04 /* subsystem clock divided by 4 (fXT/4) */
/* Selection of timer input/subsystem clock used with channel 3(TIS03) */
#define TAU_CH3_INPUT_TI0N 0x00 /* input signal of timer input pin (TI03) */
#define TAU_CH3_INPUT_FXT 0x08 /* subsystem clock divided by 4 (fXT/4) */
/* Selection of timer input/subsystem clock used with channel 4(TIS04) */
#define TAU_CH4_INPUT_TI0N 0x00 /* input signal of timer input pin (TI04) */
#define TAU_CH4_INPUT_FXT 0x10 /* subsystem clock divided by 4 (fXT/4) */
/* Selection of timer input/subsystem clock used with channel 5(TIS05) */
#define TAU_CH5_INPUT_TI0N 0x00 /* input signal of timer input pin (TI05) */
#define TAU_CH5_INPUT_FXT 0x20 /* subsystem clock divided by 4 (fXT/4) */
/* Selection of timer input/subsystem clock used with channel 6(TIS06) */
#define TAU_CH6_INPUT_TI0N 0x00 /* input signal of timer input pin (TI06) */
#define TAU_CH6_INPUT_FXT 0x40 /* subsystem clock divided by 4 (fXT/4) */
/* Selection of timer input/subsystem clock used with channel 7(TIS07) */
#define TAU_CH7_INPUT_TI0N 0x00 /* input signal of timer input pin (TI07) */
#define TAU_CH7_INPUT_FXT 0x80 /* subsystem clock divided by 4 (fXT/4) */
/*
Timer Output Enable Register 0 (TOE0)
*/
/* Initial Value */
#define TAU_TOE0_INITIALVALUE 0x0000
/* Timer output enable/disable of channel 0(TOE00) */
#define TAU_CH0_OUTPUT_ENABLE 0x0001 /* the TO00 operation enabled by count operation (timer channel output bit) */
#define TAU_CH0_OUTPUT_DISABLE 0x0000 /* the TO00 operation stopped by count operation (timer channel output bit) */
/* Timer output enable/disable of channel 1(TOE01) */
#define TAU_CH1_OUTPUT_ENABLE 0x0002 /* the TO01 operation enabled by count operation (timer channel output bit) */
#define TAU_CH1_OUTPUT_DISABLE 0x0000 /* the TO01 operation stopped by count operation (timer channel output bit) */
/* Timer output enable/disable of channel 2(TOE02) */
#define TAU_CH2_OUTPUT_ENABLE 0x0004 /* the TO02 operation enabled by count operation (timer channel output bit) */
#define TAU_CH2_OUTPUT_DISABLE 0x0000 /* the TO02 operation stopped by count operation (timer channel output bit) */
/* Timer output enable/disable of channel 3(TOE03) */
#define TAU_CH3_OUTPUT_ENABLE 0x0008 /* the TO03 operation enabled by count operation (timer channel output bit) */
#define TAU_CH3_OUTPUT_DISABLE 0x0000 /* the TO03 operation stopped by count operation (timer channel output bit) */
/* Timer output enable/disable of channel 4(TOE04) */
#define TAU_CH4_OUTPUT_ENABLE 0x0010 /* the TO04 operation enabled by count operation (timer channel output bit) */
#define TAU_CH4_OUTPUT_DISABLE 0x0000 /* the TO04 operation stopped by count operation (timer channel output bit) */
/* Timer output enable/disable of channel 5(TOE05) */
#define TAU_CH5_OUTPUT_ENABLE 0x0020 /* the TO05 operation enabled by count operation (timer channel output bit) */
#define TAU_CH5_OUTPUT_DISABLE 0x0000 /* the TO05 operation stopped by count operation (timer channel output bit) */
/* Timer output enable/disable of channel 6(TOE06) */
#define TAU_CH6_OUTPUT_ENABLE 0x0040 /* the TO06 operation enabled by count operation (timer channel output bit) */
#define TAU_CH6_OUTPUT_DISABLE 0x0000 /* the TO06 operation stopped by count operation (timer channel output bit) */
/* Timer output enable/disable of channel 7(TOE07) */
#define TAU_CH7_OUTPUT_ENABLE 0x0080 /* the TO07 operation enabled by count operation (timer channel output bit) */
#define TAU_CH7_OUTPUT_DISABLE 0x0000 /* the TO07 operation stopped by count operation (timer channel output bit) */
/*
Timer Output Register 0 (TO0)
*/
/* Initial Value */
#define TAU_TO0_INITIALVALUE 0x0000
/* Timer output of channel 0(TO00) */
#define TAU_CH0_OUTPUT_VALUE_0 0x0000 /* timer output value is ��0�� */
#define TAU_CH0_OUTPUT_VALUE_1 0x0001 /* timer output value is ��1�� */
/* Timer output of channel 1(TO01) */
#define TAU_CH1_OUTPUT_VALUE_0 0x0000 /* timer output value is ��0�� */
#define TAU_CH1_OUTPUT_VALUE_1 0x0002 /* timer output value is ��1�� */
/* Timer output of channel 2(TO02) */
#define TAU_CH2_OUTPUT_VALUE_0 0x0000 /* timer output value is ��0�� */
#define TAU_CH2_OUTPUT_VALUE_1 0x0004 /* timer output value is ��1�� */
/* Timer output of channel 3(TO03) */
#define TAU_CH3_OUTPUT_VALUE_0 0x0000 /* timer output value is ��0�� */
#define TAU_CH3_OUTPUT_VALUE_1 0x0008 /* timer output value is ��1�� */
/* Timer output of channel 4(TO04) */
#define TAU_CH4_OUTPUT_VALUE_0 0x0000 /* timer output value is ��0�� */
#define TAU_CH4_OUTPUT_VALUE_1 0x0010 /* timer output value is ��1�� */
/* Timer output of channel 5(TO05) */
#define TAU_CH5_OUTPUT_VALUE_0 0x0000 /* timer output value is ��0�� */
#define TAU_CH5_OUTPUT_VALUE_1 0x0020 /* timer output value is ��1�� */
/* Timer output of channel 6(TO06) */
#define TAU_CH6_OUTPUT_VALUE_0 0x0000 /* timer output value is ��0�� */
#define TAU_CH6_OUTPUT_VALUE_1 0x0040 /* timer output value is ��1�� */
/* Timer output of channel 7(TO07) */
#define TAU_CH7_OUTPUT_VALUE_0 0x0000 /* timer output value is ��0�� */
#define TAU_CH7_OUTPUT_VALUE_1 0x0080 /* timer output value is ��1�� */
/*
Timer Output Level Register 0 (TOL0)
*/
/* Initial Value */
#define TAU_TOL0_INITIALVALUE 0x0000
/* Control of timer output level of channel 0(TOL00) */
#define TAU_CH0_OUTPUT_LEVEL_H 0x0000 /* positive logic output (active-high) */
#define TAU_CH0_OUTPUT_LEVEL_L 0x0001 /* inverted output (active-low) */
/* Control of timer output level of channel 1(TOL01) */
#define TAU_CH1_OUTPUT_LEVEL_H 0x0000 /* positive logic output (active-high) */
#define TAU_CH1_OUTPUT_LEVEL_L 0x0002 /* inverted output (active-low) */
/* Control of timer output level of channel 2(TOL02) */
#define TAU_CH2_OUTPUT_LEVEL_H 0x0000 /* positive logic output (active-high) */
#define TAU_CH2_OUTPUT_LEVEL_L 0x0004 /* inverted output (active-low) */
/* Control of timer output level of channel 3(TOL03) */
#define TAU_CH3_OUTPUT_LEVEL_H 0x0000 /* positive logic output (active-high) */
#define TAU_CH3_OUTPUT_LEVEL_L 0x0008 /* inverted output (active-low) */
/* Control of timer output level of channel 4(TOL04) */
#define TAU_CH4_OUTPUT_LEVEL_H 0x0000 /* positive logic output (active-high) */
#define TAU_CH4_OUTPUT_LEVEL_L 0x0010 /* inverted output (active-low) */
/* Control of timer output level of channel 5(TOL05) */
#define TAU_CH5_OUTPUT_LEVEL_H 0x0000 /* positive logic output (active-high) */
#define TAU_CH5_OUTPUT_LEVEL_L 0x0020 /* inverted output (active-low) */
/* Control of timer output level of channel 6(TOL06) */
#define TAU_CH6_OUTPUT_LEVEL_H 0x0000 /* positive logic output (active-high) */
#define TAU_CH6_OUTPUT_LEVEL_L 0x0040 /* inverted output (active-low) */
/* Control of timer output level of channel 7(TOL07) */
#define TAU_CH7_OUTPUT_LEVEL_H 0x0000 /* positive logic output (active-high) */
#define TAU_CH7_OUTPUT_LEVEL_L 0x0080 /* inverted output (active-low) */
/*
Timer Output Mode Register 0 (TOM0)
*/
/* Initial Value */
#define TAU_TOM0_INITIALVALUE 0x0000
/* Control of timer output mode of channel 0(TOM00) */
#define TAU_CH0_OUTPUT_TOGGLE 0x0000 /* toggle operation mode */
#define TAU_CH0_OUTPUT_COMBIN 0x0001 /* combination operation mode */
/* Control of timer output mode of channel 1(TOM01) */
#define TAU_CH1_OUTPUT_TOGGLE 0x0000 /* toggle operation mode */
#define TAU_CH1_OUTPUT_COMBIN 0x0002 /* combination operation mode */
/* Control of timer output mode of channel 2(TOM02) */
#define TAU_CH2_OUTPUT_TOGGLE 0x0000 /* toggle operation mode */
#define TAU_CH2_OUTPUT_COMBIN 0x0004 /* combination operation mode */
/* Control of timer output mode of channel 3(TOM03) */
#define TAU_CH3_OUTPUT_TOGGLE 0x0000 /* toggle operation mode */
#define TAU_CH3_OUTPUT_COMBIN 0x0008 /* combination operation mode */
/* Control of timer output mode of channel 4(TOM04) */
#define TAU_CH4_OUTPUT_TOGGLE 0x0000 /* toggle operation mode */
#define TAU_CH4_OUTPUT_COMBIN 0x0010 /* combination operation mode */
/* Control of timer output mode of channel 5(TOM05) */
#define TAU_CH5_OUTPUT_TOGGLE 0x0000 /* toggle operation mode */
#define TAU_CH5_OUTPUT_COMBIN 0x0020 /* combination operation mode */
/* Control of timer output mode of channel 6(TOM06) */
#define TAU_CH6_OUTPUT_TOGGLE 0x0000 /* toggle operation mode */
#define TAU_CH6_OUTPUT_COMBIN 0x0040 /* combination operation mode */
/* Control of timer output mode of channel 7(TOM07) */
#define TAU_CH7_OUTPUT_TOGGLE 0x0000 /* toggle operation mode */
#define TAU_CH7_OUTPUT_COMBIN 0x0080 /* combination operation mode */
/*
Input Switch Control Register (ISC)
*/
/* Initial Value */
#define TAU_ISC_INITIALVALUE 0x00
/* Switching channel 7 input of timer array unit(ISC1) */
#define TAU_CH7_STATUS 0x02 /* for clear the bits */
#define TAU_CH7_NO_INPUT 0x00 /* timer input is not used */
#define TAU_CH7_RXD3_INPUT 0x02 /* input signal of RxD3 pin is used as timer input*/
/*
Noise Filter Enable Register 1 (NFEN1)
*/
/* Initial Value */
#define TAU_NFEN1_INITIALVALUE 0x00
/* Enable/disable using noise filter of TI07/TO07/P145 pin input signal(TNFEN07) */
#define TAU_CH7_NOISE_CLR 0x80 /* for clear the bits */
#define TAU_CH7_NOISE_OFF 0x00 /* noise filter OFF */
#define TAU_CH7_NOISE_ON 0x80 /* noise filter ON */
/* Enable/disable using noise filter of TI06/TO06/P06 pin input signal(TNFEN06) */
#define TAU_CH6_NOISE_CLR 0x40 /* for clear the bits */
#define TAU_CH6_NOISE_OFF 0x00 /* noise filter OFF */
#define TAU_CH6_NOISE_ON 0x40 /* noise filter ON */
/* Enable/disable using noise filter of TI05/TO05/P05 pin input signal(TNFEN05) */
#define TAU_CH5_NOISE_CLR 0x20 /* for clear the bits */
#define TAU_CH5_NOISE_OFF 0x00 /* noise filter OFF */
#define TAU_CH5_NOISE_ON 0x20 /* noise filter ON */
/* Enable/disable using noise filter of TI04/TO04/P42 pin input signal(TNFEN04) */
#define TAU_CH4_NOISE_CLR 0x10 /* for clear the bits */
#define TAU_CH4_NOISE_OFF 0x00 /* noise filter OFF */
#define TAU_CH4_NOISE_ON 0x10 /* noise filter ON */
/* Enable/disable using noise filter of TI03/TO03/INTP4/P31 pin input signal(TNFEN03) */
#define TAU_CH3_NOISE_CLR 0x08 /* for clear the bits */
#define TAU_CH3_NOISE_OFF 0x00 /* noise filter OFF */
#define TAU_CH3_NOISE_ON 0x08 /* noise filter ON */
/* Enable/disable using noise filter of TI02/TO02/P17 pin input signal(TNFEN02) */
#define TAU_CH2_NOISE_CLR 0x04 /* for clear the bits */
#define TAU_CH2_NOISE_OFF 0x00 /* noise filter OFF */
#define TAU_CH2_NOISE_ON 0x04 /* noise filter ON */
/* Enable/disable using noise filter of TI01/TO01/INTP5/P16 pin input signal(TNFEN01) */
#define TAU_CH1_NOISE_CLR 0x02 /* for clear the bits */
#define TAU_CH1_NOISE_OFF 0x00 /* noise filter OFF */
#define TAU_CH1_NOISE_ON 0x02 /* noise filter ON */
/* Enable/disable using noise filter of TI00/P00 pin input signal(TNFEN00) */
#define TAU_CH0_NOISE_CLR 0x01 /* for clear the bits */
#define TAU_CH0_NOISE_OFF 0x00 /* noise filter OFF */
#define TAU_CH0_NOISE_ON 0x01 /* noise filter ON */
/*
*******************************************************************************
** Macro define
*******************************************************************************
*/
/* 16-bit timer data register 00 (TDR00) */
#define TAU_TDR00_VALUE 0x9895
/* Clock divisor for channel0 */
#define TAU_CHANNEL0_DIVISOR 128
/* Start user code for macro definition. Do not edit comment generated here */
/* End user code for macro definition. Do not edit comment generated here */
/*
*******************************************************************************
** Function define
*******************************************************************************
*/
void TAU_Init(void);
void TAU_Channel0_Start(void);
void TAU_Channel0_Stop(void);
void TAU_Channel0_ChangeCondition(USHORT regvalue);
#endif
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