pic16f87.h

PS2 读取键盘数具,非常好的一个软件PCB

static          bank1 bit	INTEDG		@ ((unsigned)&OPTION*8)+6;
static          bank1 bit	RBPU		@ ((unsigned)&OPTION*8)+7;

/* Definitions for TRISA register */
static volatile bank1 bit	TRISA0		@ ((unsigned)&TRISA*8)+0;
static volatile bank1 bit	TRISA1		@ ((unsigned)&TRISA*8)+1;
static volatile bank1 bit	TRISA2		@ ((unsigned)&TRISA*8)+2;
static volatile bank1 bit	TRISA3		@ ((unsigned)&TRISA*8)+3;
static volatile bank1 bit	TRISA4		@ ((unsigned)&TRISA*8)+4;
static volatile bank1 bit	TRISA5		@ ((unsigned)&TRISA*8)+5;
static volatile bank1 bit	TRISA6		@ ((unsigned)&TRISA*8)+6;
static volatile bank1 bit	TRISA7		@ ((unsigned)&TRISA*8)+7;

/* Definitions for TRISB register */
static volatile bank1 bit	TRISB0		@ ((unsigned)&TRISB*8)+0;
static volatile bank1 bit	TRISB1		@ ((unsigned)&TRISB*8)+1;
static volatile bank1 bit	TRISB2		@ ((unsigned)&TRISB*8)+2;
static volatile bank1 bit	TRISB3		@ ((unsigned)&TRISB*8)+3;
static volatile bank1 bit	TRISB4		@ ((unsigned)&TRISB*8)+4;
static volatile bank1 bit	TRISB5		@ ((unsigned)&TRISB*8)+5;
static volatile bank1 bit	TRISB6		@ ((unsigned)&TRISB*8)+6;
static volatile bank1 bit	TRISB7		@ ((unsigned)&TRISB*8)+7;

/* Definitions for PIE1 register */
static          bank1 bit	TMR1IE		@ ((unsigned)&PIE1*8)+0;
static          bank1 bit	TMR2IE		@ ((unsigned)&PIE1*8)+1;
static          bank1 bit	CCP1IE		@ ((unsigned)&PIE1*8)+2;
static          bank1 bit	SSPIE		@ ((unsigned)&PIE1*8)+3;
static          bank1 bit	TXIE		@ ((unsigned)&PIE1*8)+4;
static          bank1 bit	RCIE		@ ((unsigned)&PIE1*8)+5;
static          bank1 bit	ADIE		@ ((unsigned)&PIE1*8)+6;

/* Definitions for PIE2 register */
static          bank1 bit	EEIE		@ ((unsigned)&PIE2*8)+4;
static          bank1 bit	CMIE		@ ((unsigned)&PIE2*8)+6;
static          bank1 bit	OSFIE		@ ((unsigned)&PIE2*8)+7;

/* Definitions for PCON register */
static volatile bank1 bit	BOR		@ ((unsigned)&PCON*8)+0;
static volatile bank1 bit	POR		@ ((unsigned)&PCON*8)+1;

/* Definitions for OSCCON register */
static          bank1 bit	SCS0		@ ((unsigned)&OSCCON*8)+0;
static          bank1 bit	SCS1		@ ((unsigned)&OSCCON*8)+1;
static volatile bank1 bit	IOFS		@ ((unsigned)&OSCCON*8)+2;
static volatile bank1 bit	OSTS		@ ((unsigned)&OSCCON*8)+3;
static          bank1 bit	IRCF0		@ ((unsigned)&OSCCON*8)+4;
static          bank1 bit	IRCF1		@ ((unsigned)&OSCCON*8)+5;
static          bank1 bit	IRCF2		@ ((unsigned)&OSCCON*8)+6;

/* Definitions for OSCTUNE register */
static          bank1 bit	TUN0		@ ((unsigned)&OSCTUNE*8)+0;
static          bank1 bit	TUN1		@ ((unsigned)&OSCTUNE*8)+1;
static          bank1 bit	TUN2		@ ((unsigned)&OSCTUNE*8)+2;
static          bank1 bit	TUN3		@ ((unsigned)&OSCTUNE*8)+3;
static          bank1 bit	TUN4		@ ((unsigned)&OSCTUNE*8)+4;
static          bank1 bit	TUN5		@ ((unsigned)&OSCTUNE*8)+5;

/* Definitions for SSPSTAT register */
static volatile bank1 bit	BF		@ ((unsigned)&SSPSTAT*8)+0;
static volatile bank1 bit	UA		@ ((unsigned)&SSPSTAT*8)+1;
static volatile bank1 bit	RW		@ ((unsigned)&SSPSTAT*8)+2;
static volatile bank1 bit	START		@ ((unsigned)&SSPSTAT*8)+3;
static volatile bank1 bit	STOP		@ ((unsigned)&SSPSTAT*8)+4;
static volatile bank1 bit	DA		@ ((unsigned)&SSPSTAT*8)+5;
static          bank1 bit	CKE		@ ((unsigned)&SSPSTAT*8)+6;
static          bank1 bit	SMP		@ ((unsigned)&SSPSTAT*8)+7;

/* Definitions for TXSTA register */
static volatile bank1 bit	TX9D		@ ((unsigned)&TXSTA*8)+0;
static volatile bank1 bit	TRMT		@ ((unsigned)&TXSTA*8)+1;
static          bank1 bit	BRGH		@ ((unsigned)&TXSTA*8)+2;
static          bank1 bit	SYNC		@ ((unsigned)&TXSTA*8)+4;
static          bank1 bit	TXEN		@ ((unsigned)&TXSTA*8)+5;
static          bank1 bit	TX9		@ ((unsigned)&TXSTA*8)+6;
static          bank1 bit	CSRC		@ ((unsigned)&TXSTA*8)+7;

#if defined(_16F88)
/* Definitions for ANSEL register */
static          bank1 bit	ANS0		@ ((unsigned)&ANSEL*8)+0;
static          bank1 bit	ANS1		@ ((unsigned)&ANSEL*8)+1;
static          bank1 bit	ANS2		@ ((unsigned)&ANSEL*8)+2;
static          bank1 bit	ANS3		@ ((unsigned)&ANSEL*8)+3;
static          bank1 bit	ANS4		@ ((unsigned)&ANSEL*8)+4;
static          bank1 bit	ANS5		@ ((unsigned)&ANSEL*8)+5;
static          bank1 bit	ANS6		@ ((unsigned)&ANSEL*8)+6;
#endif

/* Definitions for CMCON register */
static          bank1 bit	CM0		@ ((unsigned)&CMCON*8)+0;
static          bank1 bit	CM1		@ ((unsigned)&CMCON*8)+1;
static          bank1 bit	CM2		@ ((unsigned)&CMCON*8)+2;
static          bank1 bit	CIS		@ ((unsigned)&CMCON*8)+3;
static          bank1 bit	C1INV		@ ((unsigned)&CMCON*8)+4;
static          bank1 bit	C2INV		@ ((unsigned)&CMCON*8)+5;
static volatile bank1 bit	C1OUT		@ ((unsigned)&CMCON*8)+6;
static volatile bank1 bit	C2OUT		@ ((unsigned)&CMCON*8)+7;

/* Definitions for CVRCON register */
static          bank1 bit	CVR0		@ ((unsigned)&CVRCON*8)+0;
static          bank1 bit	CVR1		@ ((unsigned)&CVRCON*8)+1;
static          bank1 bit	CVR2		@ ((unsigned)&CVRCON*8)+2;
static          bank1 bit	CVR3		@ ((unsigned)&CVRCON*8)+3;
static          bank1 bit	CVRR		@ ((unsigned)&CVRCON*8)+5;
static          bank1 bit	CVROE		@ ((unsigned)&CVRCON*8)+6;
static          bank1 bit	CVREN		@ ((unsigned)&CVRCON*8)+7;

#if defined(_16F88)
/* Definitions for ADCON1 register */
static          bank1 bit	VCFG0		@ ((unsigned)&ADCON1*8)+4;
static          bank1 bit	VCFG1		@ ((unsigned)&ADCON1*8)+5;
static          bank1 bit	ADCS2		@ ((unsigned)&ADCON1*8)+6;
static          bank1 bit	ADFM		@ ((unsigned)&ADCON1*8)+7;
#endif

/* Definitions for WDTCON register */
static          bank2 bit	SWDTEN		@ ((unsigned)&WDTCON*8)+0;
static          bank2 bit	WDTPS0		@ ((unsigned)&WDTCON*8)+1;
static          bank2 bit	WDTPS1		@ ((unsigned)&WDTCON*8)+2;
static          bank2 bit	WDTPS2		@ ((unsigned)&WDTCON*8)+3;
static          bank2 bit	WDTPS3		@ ((unsigned)&WDTCON*8)+4;

/* Definitions for EECON1 register */
static volatile bank3 bit	RD		@ ((unsigned)&EECON1*8)+0;
static volatile bank3 bit	WR		@ ((unsigned)&EECON1*8)+1;
static          bank3 bit	WREN		@ ((unsigned)&EECON1*8)+2;
static volatile bank3 bit	WRERR		@ ((unsigned)&EECON1*8)+3;
static volatile bank3 bit	FREE		@ ((unsigned)&EECON1*8)+4;
static          bank3 bit	EEPGD		@ ((unsigned)&EECON1*8)+7;

					
// Configuration Mask Definitions
#define CONFIG_ADDR	0x2007
// Protection of program code 
#define PROTECT		0x1FFF
#define UNPROTECT	0x3FFF
// CCP1 Pin selection 
#define CCPRB0		0x3FFF
#define CCPRB3		0x2FFF
// In-Circuit Debugger Mode 
#define DEBUGEN		0x37FF
#define DEBUGDIS	0x3FFF
// Flash Program Memory Write Enable 
#define UNPROTECT	0x3FFF
#define WP0		0x3DFF
#define WP1		0x3BFF
#define WPA		0x39FF
// Data EE Memory Code Protection 
#define UNPROTECT	0x3FFF
#define CPD		0x3EFF
// Low Voltage Programming Enable 
#define LVPEN		0x3FFF
#define LVPDIS		0x3F7F
// Brown out detection enable 
#define BOREN		0x3FFF
#define BORDIS		0x3FBF
// Memory clear enable 
#define MCLREN		0x3FFF
#define MCLRDIS		0x3FDF
// Power up timer enable 
#define PWRTDIS		0x3FFF
#define PWRTEN		0x3FF7
// Watchdog timer enable 
#define WDTEN		0x3FFF
#define WDTDIS		0x3FFB
// Oscillator configurations 
#define RCCLK		0x3FFF
#define RCIO		0x3FFE
#define INTCLK		0x3FFD
#define INTIO		0x3FFC
#define EC		0x3FEF
#define HS		0x3FEE
#define XT		0x3FED
#define LP		0x3FEC

#define CONFIG_ADDR2	0x2008
// Fail Clock Monitor Enable 
#define FCMEN		0x3FFF
#define FCMDIS		0x3FFE
// Internal External Switch Over 
#define IESOEN		0x3FFF
#define IESODIS		0x3FFD



#endif