📄 level2.lst
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GAS LISTING C:\DOCUME~1\ADMINI~1\LOCALS~1\Temp/ccU5baaa.s page 1
1 .file "level2.c"
2 .arch atmega8
3 __SREG__ = 0x3f
4 __SP_H__ = 0x3e
5 __SP_L__ = 0x3d
6 __tmp_reg__ = 0
7 __zero_reg__ = 1
8 .global __do_copy_data
9 .global __do_clear_bss
10 .stabs "E:\\PROJECT_GCC\\ISO15693_OK/",100,0,0,.Ltext0
11 .stabs "level2.c",100,0,0,.Ltext0
12 .text
13 .Ltext0:
14 .stabs "gcc2_compiled.",60,0,0,0
15 .stabs "int:t(0,1)=r(0,1);-32768;32767;",128,0,0,0
16 .stabs "char:t(0,2)=@s8;r(0,2);0;255;",128,0,0,0
17 .stabs "long int:t(0,3)=@s32;r(0,3);0020000000000;0017777777777;",128,0,0,0
18 .stabs "unsigned int:t(0,4)=r(0,4);0000000000000;0000000177777;",128,0,0,0
19 .stabs "long unsigned int:t(0,5)=@s32;r(0,5);0000000000000;0037777777777;",128,0,0,0
20 .stabs "long long int:t(0,6)=@s64;r(0,6);01000000000000000000000;0777777777777777777777;",128,0,0,
21 .stabs "long long unsigned int:t(0,7)=@s64;r(0,7);0000000000000;01777777777777777777777;",128,0,0,
22 .stabs "short int:t(0,8)=r(0,8);-32768;32767;",128,0,0,0
23 .stabs "short unsigned int:t(0,9)=r(0,9);0000000000000;0000000177777;",128,0,0,0
24 .stabs "signed char:t(0,10)=@s8;r(0,10);-128;127;",128,0,0,0
25 .stabs "unsigned char:t(0,11)=@s8;r(0,11);0;255;",128,0,0,0
26 .stabs "float:t(0,12)=r(0,1);4;0;",128,0,0,0
27 .stabs "double:t(0,13)=r(0,1);4;0;",128,0,0,0
28 .stabs "long double:t(0,14)=r(0,1);4;0;",128,0,0,0
29 .stabs "complex int:t(0,15)=s4real:(0,1),0,16;imag:(0,1),16,16;;",128,0,0,0
30 .stabs "complex float:t(0,16)=R3;8;0;",128,0,0,0
31 .stabs "complex double:t(0,17)=R3;8;0;",128,0,0,0
32 .stabs "complex long double:t(0,18)=R3;8;0;",128,0,0,0
33 .stabs "__builtin_va_list:t(0,19)=*(0,20)=(0,20)",128,0,0,0
34 .stabs "_Bool:t(0,21)=@s8;-16;",128,0,0,0
35 .stabs "level2.c",130,0,0,0
36 .stabs "C:/WinAVR/avr/include/avr/io.h",130,0,0,0
37 .stabs "C:/WinAVR/avr/include/avr/sfr_defs.h",130,0,0,0
38 .stabs "C:/WinAVR/avr/include/inttypes.h",130,0,0,0
39 .stabs "int8_t:t(4,1)=(0,10)",128,0,67,0
40 .stabs "uint8_t:t(4,2)=(0,11)",128,0,72,0
41 .stabs "int16_t:t(4,3)=(0,1)",128,0,90,0
42 .stabs "uint16_t:t(4,4)=(0,4)",128,0,95,0
43 .stabs "int32_t:t(4,5)=(0,3)",128,0,106,0
44 .stabs "uint32_t:t(4,6)=(0,5)",128,0,111,0
45 .stabs "int64_t:t(4,7)=(0,6)",128,0,124,0
46 .stabs "uint64_t:t(4,8)=(0,7)",128,0,129,0
47 .stabs "intptr_t:t(4,9)=(4,3)",128,0,141,0
48 .stabs "uintptr_t:t(4,10)=(4,4)",128,0,146,0
49 .stabn 162,0,0,0
50 .stabn 162,0,0,0
51 .stabs "C:/WinAVR/avr/include/avr/iom8.h",130,0,0,0
52 .stabn 162,0,0,0
53 .stabs "C:/WinAVR/avr/include/avr/portpins.h",130,0,0,0
54 .stabn 162,0,0,0
55 .stabn 162,0,0,0
56 .stabs "C:/WinAVR/avr/include/avr/interrupt.h",130,0,0,0
57 .stabn 162,0,0,0
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58 .stabs "C:/WinAVR/avr/include/avr/signal.h",130,0,0,0
59 .stabn 162,0,0,0
60 .stabs "level4.h",130,0,0,0
61 .stabn 162,0,0,0
62 .stabs "level3.h",130,0,0,0
63 .stabn 162,0,0,0
64 .stabs "level2.h",130,0,0,0
65 .stabs "TCAPTURE:T(11,1)=s256capture_data:(11,2)=ar(11,3)=r(11,3);0000000000000;0000000177777;;0;1
66 .stabs "TCAPTURE:t(11,4)=(11,1)",128,0,89,0
67 .stabn 162,0,0,0
68 .stabs "level1.h",130,0,0,0
69 .stabn 162,0,0,0
70 .global bufferClean
71 .global bufferClean
72 .section .bss
73 .type bufferClean, @object
74 .size bufferClean, 1
75 bufferClean:
76 0000 00 .skip 1,0
77 .global fwd_delays
78 .data
79 .type fwd_delays, @object
80 .size fwd_delays, 14
81 fwd_delays:
82 0000 AFFF .word -81
83 0002 12FF .word -238
84 0004 80FE .word -384
85 0006 EBFD .word -533
86 0008 51FD .word -687
87 000a BFFC .word -833
88 000c 2FFC .word -977
89 .text
90 .stabs "__vector_8:F(0,20)",36,0,52,__vector_8
91 .global __vector_8
92 .type __vector_8, @function
93 __vector_8:
1:level2.c ****
2:level2.c ****
3:level2.c **** #include <avr/io.h>
4:level2.c **** #include <inttypes.h>
5:level2.c **** #include <avr/interrupt.h>
6:level2.c **** #include <avr/signal.h>
7:level2.c **** #include "level4.h"
8:level2.c **** #include "level3.h"
9:level2.c **** #include "level2.h"
10:level2.c **** #include "level1.h"
11:level2.c ****
12:level2.c **** //--------------------------------------------------------------
13:level2.c **** //global variables
14:level2.c ****
15:level2.c **** uint8_t bufferClean = 0; //flag for pre-cleaning
16:level2.c ****
17:level2.c **** struct TCAPTURE capture;
18:level2.c ****
19:level2.c **** uint8_t * forward_ptr; //ptr for forward message preparation
20:level2.c ****
21:level2.c **** uint8_t data_buffer[ CAPTURE_SIZE ]; //array of forwarded bits XOR clean response data
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22:level2.c ****
23:level2.c **** #ifdef DEBUG
24:level2.c **** uint16_t solich = 0;
25:level2.c **** uint16_t offset = 0;
26:level2.c **** #endif
27:level2.c ****
28:level2.c **** //uint16_t fwd_delays[7] = { -81, -238, -384, -531, -685, -831, -975 }; //for 16MHz clock
29:level2.c **** uint16_t fwd_delays[ 7 ] = { -81, -238, -384, -533, -687, -833, -977 }; //for 16MHz clock
30:level2.c **** uint16_t fwd_flow[ 9 ];
31:level2.c ****
32:level2.c **** //--------------------------------------------------------------
33:level2.c **** //local variables
34:level2.c ****
35:level2.c **** register uint8_t captured_byte asm ("r6"); //store_bit current capture bits
36:level2.c **** register uint8_t captured_valid asm ("r7"); //store_bit current capture valid bits
37:level2.c **** register uint8_t capture_cnt asm ("r8"); //store_bit current capture byte index
38:level2.c **** register uint8_t captured_bit_count asm ("r9"); //store_bit current capture bit counter
39:level2.c ****
40:level2.c **** #define SPI_DELAY 5 //dummy cycles of WaitSPI
41:level2.c ****
42:level2.c **** volatile uint8_t fwd_bit_phase; //forwardlink bit phase
43:level2.c **** uint8_t fwd_bit_sz; //forwardlink bit counter
44:level2.c **** uint8_t * fwd_write_ptr; //forwardlink bit pointer
45:level2.c ****
46:level2.c **** uint8_t field_stop; //next field stop in RF clocks
47:level2.c ****
48:level2.c **** // ==================================================================
49:level2.c **** // Forward link interrupt routine (implements a final state machine)
50:level2.c ****
51:level2.c **** SIGNAL ( SIG_OVERFLOW1 )
52:level2.c **** {
94 .stabn 68,0,52,.LM1-__vector_8
95 .LM1:
96 /* prologue: frame size=0 */
97 0000 1F92 push __zero_reg__
98 0002 0F92 push __tmp_reg__
99 0004 0FB6 in __tmp_reg__,__SREG__
100 0006 0F92 push __tmp_reg__
101 0008 1124 clr __zero_reg__
102 000a 8F93 push r24
103 000c 9F93 push r25
104 000e AF93 push r26
105 0010 BF93 push r27
106 0012 EF93 push r30
107 0014 FF93 push r31
108 /* prologue end (size=11) */
53:level2.c **** if ( forward_link_type == 0x01 ) //1 from 4 type forwardlink
109 .stabn 68,0,53,.LM2-__vector_8
110 .LM2:
111 0016 8091 0000 lds r24,forward_link_type
112 001a 8130 cpi r24,lo8(1)
113 001c 09F0 breq .+2
114 001e 98C0 rjmp .L2
54:level2.c **** {
55:level2.c **** switch ( fwd_bit_phase )
115 .stabn 68,0,55,.LM3-__vector_8
116 .LM3:
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117 0020 8091 0000 lds r24,fwd_bit_phase
118 0024 9927 clr r25
119 0026 8630 cpi r24,6
120 0028 9105 cpc r25,__zero_reg__
121 002a 09F4 brne .+2
122 002c 48C0 rjmp .L10
123 002e 8730 cpi r24,7
124 0030 9105 cpc r25,__zero_reg__
125 0032 34F4 brge .L19
126 0034 8430 cpi r24,4
127 0036 9105 cpc r25,__zero_reg__
128 0038 59F0 breq .L4
129 003a 0597 sbiw r24,5
130 003c 51F1 breq .L7
131 003e 68C0 rjmp .L13
132 .L19:
133 0040 8C30 cpi r24,12
134 0042 9105 cpc r25,__zero_reg__
135 0044 09F4 brne .+2
136 0046 54C0 rjmp .L11
137 0048 0D97 sbiw r24,13
138 004a 09F4 brne .+2
139 004c 5AC0 rjmp .L12
140 004e 60C0 rjmp .L13
141 .L4:
56:level2.c **** {
57:level2.c **** case 4 :
58:level2.c **** cbi( PORTC , MOD_PIN );
142 .stabn 68,0,58,.LM4-__vector_8
143 .LM4:
144 0050 A998 cbi 53-0x20,1
59:level2.c ****
60:level2.c **** if ( fwd_bit_sz-- > 0 )
145 .stabn 68,0,60,.LM5-__vector_8
146 .LM5:
147 0052 8091 0000 lds r24,fwd_bit_sz
148 0056 982F mov r25,r24
149 0058 8150 subi r24,lo8(-(-1))
150 005a 8093 0000 sts fwd_bit_sz,r24
151 005e 9923 tst r25
152 0060 81F0 breq .L5
61:level2.c **** { //prepare next bit modulation
62:level2.c **** TCNT1 = fwd_delays[ ( *fwd_write_ptr ) * 2 ];
153 .stabn 68,0,62,.LM6-__vector_8
154 .LM6:
155 0062 E091 0000 lds r30,fwd_write_ptr
156 0066 F091 0000 lds r31,(fwd_write_ptr)+1
157 006a 8081 ld r24,Z
158 006c E82F mov r30,r24
159 006e FF27 clr r31
160 0070 EE0F lsl r30
161 0072 FF1F rol r31
162 0074 EE0F lsl r30
163 0076 FF1F rol r31
164 0078 E050 subi r30,lo8(-(fwd_delays))
165 007a F040 sbci r31,hi8(-(fwd_delays))
166 007c 8081 ld r24,Z
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167 007e 9181 ldd r25,Z+1
168 0080 43C0 rjmp .L23
169 .L5:
63:level2.c **** fwd_bit_phase = 5;
64:level2.c **** }
65:level2.c **** else
66:level2.c **** { //EOF
67:level2.c **** TCNT1 = fwd_delays[ 1 ];
170 .stabn 68,0,67,.LM7-__vector_8
171 .LM7:
172 0082 8091 0000 lds r24,fwd_delays+2
173 0086 9091 0000 lds r25,(fwd_delays+2)+1
174 008a 9DBD out (76)+1-0x20,r25
175 008c 8CBD out 76-0x20,r24
68:level2.c **** fwd_bit_phase = 8;
176 .stabn 68,0,68,.LM8-__vector_8
177 .LM8:
178 008e 88E0 ldi r24,lo8(8)
179 0090 59C0 rjmp .L22
180 .L7:
69:level2.c **** }
70:level2.c **** break;
71:level2.c ****
72:level2.c **** case 5:
73:level2.c **** sbi( PORTC , MOD_PIN );
181 .stabn 68,0,73,.LM9-__vector_8
182 .LM9:
183 0092 A99A sbi 53-0x20,1
74:level2.c **** TCNT1 = fwd_delays[ 0 ];
184 .stabn 68,0,74,.LM10-__vector_8
185 .LM10:
186 0094 8091 0000 lds r24,fwd_delays
187 0098 9091 0000 lds r25,(fwd_delays)+1
188 009c 9DBD out (76)+1-0x20,r25
189 009e 8CBD out 76-0x20,r24
75:level2.c ****
76:level2.c **** if ( ( *fwd_write_ptr ) == 3 )
190 .stabn 68,0,76,.LM11-__vector_8
191 .LM11:
192 00a0 E091 0000 lds r30,fwd_write_ptr
193 00a4 F091 0000 lds r31,(fwd_write_ptr)+1
194 00a8 8081 ld r24,Z
195 00aa 8330 cpi r24,lo8(3)
196 00ac 31F4 brne .L8
77:level2.c **** {
78:level2.c **** fwd_write_ptr++;
197 .stabn 68,0,78,.LM12-__vector_8
198 .LM12:
199 00ae 3196 adiw r30,1
200 00b0 F093 0000 sts (fwd_write_ptr)+1,r31
201 00b4 E093 0000 sts fwd_write_ptr,r30
79:level2.c **** fwd_bit_phase = 4;
202 .stabn 68,0,79,.LM13-__vector_8
203 .LM13:
204 00b8 19C0 rjmp .L24
205 .L8:
80:level2.c **** }
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