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📄 pic18fxx8.h

📁 使用微芯公司的PIC8F458单片机
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// RXERRCNT Register
static volatile	near bit	REC7	@ ((unsigned)&RXERRCNT*8)+7;	// RX error count bits
static volatile	near bit	REC6	@ ((unsigned)&RXERRCNT*8)+6;
static volatile	near bit	REC5	@ ((unsigned)&RXERRCNT*8)+5;
static volatile	near bit	REC4	@ ((unsigned)&RXERRCNT*8)+4;
static volatile	near bit	REC3	@ ((unsigned)&RXERRCNT*8)+3;
static volatile	near bit	REC2	@ ((unsigned)&RXERRCNT*8)+2;
static volatile	near bit	REC1	@ ((unsigned)&RXERRCNT*8)+1;
static volatile	near bit	REC0	@ ((unsigned)&RXERRCNT*8)+0;

// COMSTAT Register
static volatile	near bit	RXB0OVFL	@ ((unsigned)&COMSTAT*8)+7;	// RX buffer 0 overflow
static volatile	near bit	RXB1OVFL	@ ((unsigned)&COMSTAT*8)+6;	// RX buffer 1 overflow
static volatile	near bit	TXBO		@ ((unsigned)&COMSTAT*8)+5;	// TX bus off
static volatile	near bit	TXBP		@ ((unsigned)&COMSTAT*8)+4;	// TX bus passive bit
static volatile	near bit	RXBP		@ ((unsigned)&COMSTAT*8)+3;	// RX bus passive bit
static volatile	near bit	TXWARN		@ ((unsigned)&COMSTAT*8)+2;	// transmitter warning
static volatile	near bit	RXWARN		@ ((unsigned)&COMSTAT*8)+1;	// reciever warning
static volatile	near bit	EWARN		@ ((unsigned)&COMSTAT*8)+0;	// error warning

// CIOCON Register
static		near bit	ENDRHI		@ ((unsigned)&CIOCON*8)+5;	// enable drive high bit
static		near bit	CANCAP		@ ((unsigned)&CIOCON*8)+4;	// CAN message rec. capture enable bit

// BRGCON3 Register
static		near bit	WAKFIL		@ ((unsigned)&BRGCON3*8)+6;	// select CANbus line filter for wake-up bit
static		near bit	SEG2PH2		@ ((unsigned)&BRGCON3*8)+2;	// phase segment 2 time select
static		near bit	SEG2PH1		@ ((unsigned)&BRGCON3*8)+1;
static		near bit	SEG2PH0		@ ((unsigned)&BRGCON3*8)+0;

// BRGCON2 Register
static		near bit	SEG2PHTS	@ ((unsigned)&BRGCON2*8)+7;	// phase segment 2 time select
static		near bit	SAM		@ ((unsigned)&BRGCON2*8)+6;	// sample of CANbus line bit
static		near bit	SEG1PH2		@ ((unsigned)&BRGCON2*8)+5;	// phase segment 1 bits
static		near bit	SEG1PH1		@ ((unsigned)&BRGCON2*8)+4;
static		near bit	SEG1PH0		@ ((unsigned)&BRGCON2*8)+3;
static		near bit	PRSEG2		@ ((unsigned)&BRGCON2*8)+2;	// propagation time select
static		near bit	PRSEG1		@ ((unsigned)&BRGCON2*8)+1;
static		near bit	PRSEG0		@ ((unsigned)&BRGCON2*8)+0;

// BRGCON1 Register
static		near bit	SJW1		@ ((unsigned)&BRGCON1*8)+7;	// sync jump width bits
static		near bit	SJW0		@ ((unsigned)&BRGCON1*8)+6;
static		near bit	BRP5		@ ((unsigned)&BRGCON1*8)+5;	// baud rate prescaler
static		near bit	BRP4		@ ((unsigned)&BRGCON1*8)+4;
static		near bit	BRP3		@ ((unsigned)&BRGCON1*8)+3;
static		near bit	BRP2		@ ((unsigned)&BRGCON1*8)+2;
static		near bit	BRP1		@ ((unsigned)&BRGCON1*8)+1;
static		near bit	BRP0		@ ((unsigned)&BRGCON1*8)+0;

// CANCON Register
static		near bit	REQOP2		@ ((unsigned)&CANCON*8)+7;	// request CAN operation mode bits
static		near bit	REQOP1		@ ((unsigned)&CANCON*8)+6;
static		near bit	REQOP0		@ ((unsigned)&CANCON*8)+5;
static		near bit	ABAT		@ ((unsigned)&CANCON*8)+4;	// abort all pendig transmissions
static		near bit	WIN2		@ ((unsigned)&CANCON*8)+3;	// window address bits
static		near bit	WIN1		@ ((unsigned)&CANCON*8)+2;
static		near bit	WIN0		@ ((unsigned)&CANCON*8)+1;

// CANSTAT Register
static volatile	near bit	OPMODE2		@ ((unsigned)&CANSTAT*8)+7;	// operation mode bits
static volatile	near bit	OPMODE1		@ ((unsigned)&CANSTAT*8)+6;
static volatile	near bit	OPMODE0		@ ((unsigned)&CANSTAT*8)+5;
static volatile	near bit	ICODE2		@ ((unsigned)&CANSTAT*8)+3;	// interrupt code bits
static volatile	near bit	ICODE1		@ ((unsigned)&CANSTAT*8)+2;
static volatile	near bit	ICODE0		@ ((unsigned)&CANSTAT*8)+1;

// RXB0D7 Register
static volatile	near bit	RXB0D77		@ ((unsigned)&RXB0D7*8)+7;	// RX data
static volatile	near bit	RXB0D76		@ ((unsigned)&RXB0D7*8)+6;
static volatile	near bit	RXB0D75		@ ((unsigned)&RXB0D7*8)+5;
static volatile	near bit	RXB0D74		@ ((unsigned)&RXB0D7*8)+4;
static volatile	near bit	RXB0D73		@ ((unsigned)&RXB0D7*8)+3;
static volatile	near bit	RXB0D72		@ ((unsigned)&RXB0D7*8)+2;
static volatile	near bit	RXB0D71		@ ((unsigned)&RXB0D7*8)+1;
static volatile	near bit	RXB0D70		@ ((unsigned)&RXB0D7*8)+0;

// RXB0D6 Register
static volatile	near bit	RXB0D67		@ ((unsigned)&RXB0D6*8)+7;
static volatile	near bit	RXB0D66		@ ((unsigned)&RXB0D6*8)+6;
static volatile	near bit	RXB0D65		@ ((unsigned)&RXB0D6*8)+5;
static volatile	near bit	RXB0D64		@ ((unsigned)&RXB0D6*8)+4;
static volatile	near bit	RXB0D63		@ ((unsigned)&RXB0D6*8)+3;
static volatile	near bit	RXB0D62		@ ((unsigned)&RXB0D6*8)+2;
static volatile	near bit	RXB0D61		@ ((unsigned)&RXB0D6*8)+1;
static volatile	near bit	RXB0D60		@ ((unsigned)&RXB0D6*8)+0;

// RXB0D5 Register
static volatile	near bit	RXB0D57		@ ((unsigned)&RXB0D5*8)+7;
static volatile	near bit	RXB0D56		@ ((unsigned)&RXB0D5*8)+6;
static volatile	near bit	RXB0D55		@ ((unsigned)&RXB0D5*8)+5;
static volatile	near bit	RXB0D54		@ ((unsigned)&RXB0D5*8)+4;
static volatile	near bit	RXB0D53		@ ((unsigned)&RXB0D5*8)+3;
static volatile	near bit	RXB0D52		@ ((unsigned)&RXB0D5*8)+2;
static volatile	near bit	RXB0D51		@ ((unsigned)&RXB0D5*8)+1;
static volatile	near bit	RXB0D50		@ ((unsigned)&RXB0D5*8)+0;

// RXB0D4 Register
static volatile	near bit	RXB0D47		@ ((unsigned)&RXB0D4*8)+7;
static volatile	near bit	RXB0D46		@ ((unsigned)&RXB0D4*8)+6;
static volatile	near bit	RXB0D45		@ ((unsigned)&RXB0D4*8)+5;
static volatile	near bit	RXB0D44		@ ((unsigned)&RXB0D4*8)+4;
static volatile	near bit	RXB0D43		@ ((unsigned)&RXB0D4*8)+3;
static volatile	near bit	RXB0D42		@ ((unsigned)&RXB0D4*8)+2;
static volatile	near bit	RXB0D41		@ ((unsigned)&RXB0D4*8)+1;
static volatile	near bit	RXB0D40		@ ((unsigned)&RXB0D4*8)+0;

// RXB0D3 Register
static volatile	near bit	RXB0D37		@ ((unsigned)&RXB0D3*8)+7;
static volatile	near bit	RXB0D36		@ ((unsigned)&RXB0D3*8)+6;
static volatile	near bit	RXB0D35		@ ((unsigned)&RXB0D3*8)+5;
static volatile	near bit	RXB0D34		@ ((unsigned)&RXB0D3*8)+4;
static volatile	near bit	RXB0D33		@ ((unsigned)&RXB0D3*8)+3;
static volatile	near bit	RXB0D32		@ ((unsigned)&RXB0D3*8)+2;
static volatile	near bit	RXB0D31		@ ((unsigned)&RXB0D3*8)+1;
static volatile	near bit	RXB0D30		@ ((unsigned)&RXB0D3*8)+0;

// RXB0D2 Register
static volatile	near bit	RXB0D27		@ ((unsigned)&RXB0D2*8)+7;
static volatile	near bit	RXB0D26		@ ((unsigned)&RXB0D2*8)+6;
static volatile	near bit	RXB0D25		@ ((unsigned)&RXB0D2*8)+5;
static volatile	near bit	RXB0D24		@ ((unsigned)&RXB0D2*8)+4;
static volatile	near bit	RXB0D23		@ ((unsigned)&RXB0D2*8)+3;
static volatile	near bit	RXB0D22		@ ((unsigned)&RXB0D2*8)+2;
static volatile	near bit	RXB0D21		@ ((unsigned)&RXB0D2*8)+1;
static volatile	near bit	RXB0D20		@ ((unsigned)&RXB0D2*8)+0;

// RXB0D1 Register
static volatile	near bit	RXB0D17		@ ((unsigned)&RXB0D1*8)+7;
static volatile	near bit	RXB0D16		@ ((unsigned)&RXB0D1*8)+6;
static volatile	near bit	RXB0D15		@ ((unsigned)&RXB0D1*8)+5;
static volatile	near bit	RXB0D14		@ ((unsigned)&RXB0D1*8)+4;
static volatile	near bit	RXB0D13		@ ((unsigned)&RXB0D1*8)+3;
static volatile	near bit	RXB0D12		@ ((unsigned)&RXB0D1*8)+2;
static volatile	near bit	RXB0D11		@ ((unsigned)&RXB0D1*8)+1;
static volatile	near bit	RXB0D10		@ ((unsigned)&RXB0D1*8)+0;

// RXB0D0 Register
static volatile	near bit	RXB0D07		@ ((unsigned)&RXB0D0*8)+7;
static volatile	near bit	RXB0D06		@ ((unsigned)&RXB0D0*8)+6;
static volatile	near bit	RXB0D05		@ ((unsigned)&RXB0D0*8)+5;
static volatile	near bit	RXB0D04		@ ((unsigned)&RXB0D0*8)+4;
static volatile	near bit	RXB0D03		@ ((unsigned)&RXB0D0*8)+3;
static volatile	near bit	RXB0D02		@ ((unsigned)&RXB0D0*8)+2;
static volatile	near bit	RXB0D01		@ ((unsigned)&RXB0D0*8)+1;
static volatile	near bit	RXB0D00		@ ((unsigned)&RXB0D0*8)+0;

// RXB0DLC Register
static volatile	near bit	RXB0RXRTR	@ ((unsigned)&RXB0DLC*8)+6;
static volatile	near bit	RXB0RB1		@ ((unsigned)&RXB0DLC*8)+5;
static volatile	near bit	RXB0RB0		@ ((unsigned)&RXB0DLC*8)+4;
static volatile	near bit	RXB0DLC3	@ ((unsigned)&RXB0DLC*8)+3;
static volatile	near bit	RXB0DLC2	@ ((unsigned)&RXB0DLC*8)+2;
static volatile	near bit	RXB0DLC1	@ ((unsigned)&RXB0DLC*8)+1;
static volatile	near bit	RXB0DLC0	@ ((unsigned)&RXB0DLC*8)+0;

// RXB0EIDL Register
static volatile	near bit	RXB0EID7	@ ((unsigned)&RXB0EIDL*8)+7;
static volatile	near bit	RXB0EID6	@ ((unsigned)&RXB0EIDL*8)+6;
static volatile	near bit	RXB0EID5	@ ((unsigned)&RXB0EIDL*8)+5;
static volatile	near bit	RXB0EID4	@ ((unsigned)&RXB0EIDL*8)+4;
static volatile	near bit	RXB0EID3	@ ((unsigned)&RXB0EIDL*8)+3;
static volatile	near bit	RXB0EID2	@ ((unsigned)&RXB0EIDL*8)+2;
static volatile	near bit	RXB0EID1	@ ((unsigned)&RXB0EIDL*8)+1;
static volatile	near bit	RXB0EID0	@ ((unsigned)&RXB0EIDL*8)+0;

// RXB0EIDH Register
static volatile	near bit	RXB0EID15	@ ((unsigned)&RXB0EIDH*8)+7;
static volatile	near bit	RXB0EID14	@ ((unsigned)&RXB0EIDH*8)+6;
static volatile	near bit	RXB0EID13	@ ((unsigned)&RXB0EIDH*8)+5;
static volatile	near bit	RXB0EID12	@ ((unsigned)&RXB0EIDH*8)+4;
static volatile	near bit	RXB0EID11	@ ((unsigned)&RXB0EIDH*8)+3;
static volatile	near bit	RXB0EID10	@ ((unsigned)&RXB0EIDH*8)+2;
static volatile	near bit	RXB0EID9	@ ((unsigned)&RXB0EIDH*8)+1;
static volatile	near bit	RXB0EID8	@ ((unsigned)&RXB0EIDH*8)+0;

// RXB0SIDL Register
static volatile	near bit	RXB0SID2	@ ((unsigned)&RXB0SIDL*8)+7;	
static volatile	near bit	RXB0SID1	@ ((unsigned)&RXB0SIDL*8)+6;
static volatile	near bit	RXB0SID0	@ ((unsigned)&RXB0SIDL*8)+5;
static volatile	near bit	RXB0SRR		@ ((unsigned)&RXB0SIDL*8)+4;
static volatile	near bit	RXB0EXID	@ ((unsigned)&RXB0SIDL*8)+3;
static volatile	near bit	RXB0EID17	@ ((unsigned)&RXB0SIDL*8)+1;
static volatile	near bit	RXB0EID16	@ ((unsigned)&RXB0SIDL*8)+0;

// RXB0SIDH Register
static volatile	near bit	RXB0SID10	@ ((unsigned)&RXB0SIDH*8)+7;
static volatile	near bit	RXB0SID9	@ ((unsigned)&RXB0SIDH*8)+6;
static volatile	near bit	RXB0SID8	@ ((unsigned)&RXB0SIDH*8)+5;
static volatile	near bit	RXB0SID7	@ ((unsigned)&RXB0SIDH*8)+4;
static volatile	near bit	RXB0SID6	@ ((unsigned)&RXB0SIDH*8)+3;
static volatile	near bit	RXB0SID5	@ ((unsigned)&RXB0SIDH*8)+2;
static volatile	near bit	RXB0SID4	@ ((unsigned)&RXB0SIDH*8)+1;
static volatile	near bit	RXB0SID3	@ ((unsigned)&RXB0SIDH*8)+0;

// RXB0CON Register
static volatile	near bit	RXB0FUL		@ ((unsigned)&RXB0CON*8)+7;	// recieve full status
static		near bit	RXB0M1		@ ((unsigned)&RXB0CON*8)+6;	// RX buffer mode
static		near bit	RXB0M0		@ ((unsigned)&RXB0CON*8)+5;
static volatile	near bit	RXB0RTRRO	@ ((unsigned)&RXB0CON*8)+3;	// RX remote transfer request
static		near bit	RXB0DBEN	@ ((unsigned)&RXB0CON*8)+2;	// RX buffer, double buffer enable
static volatile	near bit	JTOFF		@ ((unsigned)&RXB0CON*8)+1;	// jump table offset
static volatile	near bit	RXB0FILHIT0	@ ((unsigned)&RXB0CON*8)+0;	// filter hit bit

// CANSTATRO1 Register
static volatile      bit	OPMODE12	@ ((unsigned)&CANSTATRO1*8)+7;
static volatile      bit	OPMODE11	@ ((unsigned)&CANSTATRO1*8)+6;
static volatile      bit	OPMODE10	@ ((unsigned)&CANSTATRO1*8)+5;
static volatile      bit	ICODE12		@ ((unsigned)&CANSTATRO1*8)+3;
static volatile      bit	ICODE11		@ ((unsigned)&CANSTATRO1*8)+2;
static volatile      bit	ICODE10		@ ((unsigned)&CANSTATRO1*8)+1;

// RXB1D7 Register
static volatile      bit	RXB1D77		@ ((unsigned)&RXB1D7*8)+7;
static volatile      bit	RXB1D76		@ ((unsigned)&RXB1D7*8)+6;
static volatile      bit	RXB1D75		@ ((unsigned)&RXB1D7*8)+5;
static volatile      bit	RXB1D74		@ ((unsigned)&RXB1D7*8)+4;
static volatile      bit	RXB1D73		@ ((unsigned)&RXB1D7*8)+3;
static volatile      bit	RXB1D72		@ ((unsigned)&RXB1D7*8)+2;
static volatile      bit	RXB1D71		@ ((unsigned)&RXB1D7*8)+1;
static volatile      bit	RXB1D70		@ ((unsigned)&RXB1D7*8)+0;

// RXB1D6 Register
static volatile      bit	RXB1D67		@ ((unsigned)&RXB1D6*8)+7;
static volatile      bit	RXB1D66		@ ((unsigned)&RXB1D6*8)+6;
static volatile      bit	RXB1D65		@ ((unsigned)&RXB1D6*8)+5;
static volatile      bit	RXB1D64		@ ((unsigned)&RXB1D6*8)+4;
static volatile      bit	RXB1D63		@ ((unsigned)&RXB1D6*8)+3;
static volatile      bit	RXB1D62		@ ((unsigned)&RXB1D6*8)+2;
static volatile      bit	RXB1D61		@ ((unsigned)&RXB1D6*8)+1;
static volatile      bit	RXB1D60		@ ((unsigned)&RXB1D6*8)+0;

// RXB1D5 Register
static volatile      bit	RXB1D57		@ ((unsigned)&RXB1D5*8)+7;
static volatile      bit	RXB1D56		@ ((unsigned)&RXB1D5*8)+6;
static volatile      bit	RXB1D55		@ ((unsigned)&RXB1D5*8)+5;
static volatile      bit	RXB1D54		@ ((unsigned)&RXB1D5*8)+4;
static volatile      bit	RXB1D53		@ ((unsigned)&RXB1D5*8)+3;
static volatile      bit	RXB1D52		@ ((unsigned)&RXB1D5*8)+2;
static volatile      bit	RXB1D51		@ ((unsigned)&RXB1D5*8)+1;
static volatile      bit	RXB1D50		@ ((unsigned)&RXB1D5*8)+0;

// RXB1D4 Register
static volatile      bit	RXB1D47		@ ((unsigned)&RXB1D4*8)+7;
static volatile      bit	RXB1D46		@ ((unsigned)&RXB1D4*8)+6;
static volatile      bit	RXB1D45		@ ((unsigned)&RXB1D4*8)+5;
static volatile      bit	RXB1D44		@ ((unsigned)&RXB1D4*8)+4;
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