mgcoge.c

来自「最新版的u-boot,2008-10-18发布」· C语言 代码 · 共 361 行 · 第 1/2 页

    }
};

/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
 *
 * This routine performs standard 8260 initialization sequence
 * and calculates the available memory size. It may be called
 * several times to try different SDRAM configurations on both
 * 60x and local buses.
 */
static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
						  ulong orx, volatile uchar * base)
{
	volatile uchar c = 0xff;
	volatile uint *sdmr_ptr;
	volatile uint *orx_ptr;
	ulong maxsize, size;
	int i;

	/* We must be able to test a location outsize the maximum legal size
	 * to find out THAT we are outside; but this address still has to be
	 * mapped by the controller. That means, that the initial mapping has
	 * to be (at least) twice as large as the maximum expected size.
	 */
	maxsize = (1 + (~orx | 0x7fff))/* / 2*/;

	sdmr_ptr = &memctl->memc_psdmr;
	orx_ptr = &memctl->memc_or1;

	*orx_ptr = orx;

	/*
	 * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
	 *
	 * "At system reset, initialization software must set up the
	 *  programmable parameters in the memory controller banks registers
	 *  (ORx, BRx, P/LSDMR). After all memory parameters are configured,
	 *  system software should execute the following initialization sequence
	 *  for each SDRAM device.
	 *
	 *  1. Issue a PRECHARGE-ALL-BANKS command
	 *  2. Issue eight CBR REFRESH commands
	 *  3. Issue a MODE-SET command to initialize the mode register
	 *
	 *  The initial commands are executed by setting P/LSDMR[OP] and
	 *  accessing the SDRAM with a single-byte transaction."
	 *
	 * The appropriate BRx/ORx registers have already been set when we
	 * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
	 */

	*sdmr_ptr = sdmr | PSDMR_OP_PREA;
	*base = c;

	*sdmr_ptr = sdmr | PSDMR_OP_CBRR;
	for (i = 0; i < 8; i++)
		*base = c;

	*sdmr_ptr = sdmr | PSDMR_OP_MRW;
	*(base + CFG_MRS_OFFS) = c;	/* setting MR on address lines */

	*sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
	*base = c;

	size = get_ram_size((long *)base, maxsize);
	*orx_ptr = orx | ~(size - 1);

	return (size);
}

phys_size_t initdram(int board_type)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;
	volatile memctl8260_t *memctl = &immap->im_memctl;

	long psize;

	memctl->memc_psrt = CFG_PSRT;
	memctl->memc_mptpr = CFG_MPTPR;

#ifndef CFG_RAMBOOT
	/* 60x SDRAM setup:
	 */
	psize = try_init (memctl, CFG_PSDMR, CFG_OR1,
						  (uchar *) CFG_SDRAM_BASE);
#endif /* CFG_RAMBOOT */

	icache_enable ();

	return (psize);
}

int checkboard(void)
{
	puts("Board: mgcoge\n");

	return 0;
}

/*
 * Early board initalization.
 */
int board_early_init_r(void)
{
	/* setup the UPIOx */
	*(char *)(CFG_PIGGY_BASE + 0x02) = 0xc0;
	*(char *)(CFG_PIGGY_BASE + 0x03) = 0x15;
	return 0;
}

#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
/*
 * update "memory" property in the blob
 */
void ft_blob_update(void *blob, bd_t *bd)
{
	int ret, nodeoffset = 0;
	ulong memory_data[2] = {0};
	ulong flash_data[8] = {0};

	memory_data[0] = cpu_to_be32(bd->bi_memstart);
	memory_data[1] = cpu_to_be32(bd->bi_memsize);

	nodeoffset = fdt_path_offset (blob, "/memory");
	if (nodeoffset >= 0) {
		ret = fdt_setprop(blob, nodeoffset, "reg", memory_data,
					sizeof(memory_data));
	if (ret < 0)
		printf("ft_blob_update(): cannot set /memory/reg "
			"property err:%s\n", fdt_strerror(ret));
	}
	else {
		/* memory node is required in dts */
		printf("ft_blob_update(): cannot find /memory node "
		"err:%s\n", fdt_strerror(nodeoffset));
	}
	/* update Flash addr, size */
	flash_data[2] = cpu_to_be32(CFG_FLASH_BASE);
	flash_data[3] = cpu_to_be32(CFG_FLASH_SIZE);
	flash_data[4] = cpu_to_be32(1);
	flash_data[5] = cpu_to_be32(0);
	flash_data[6] = cpu_to_be32(CFG_FLASH_BASE_1);
	flash_data[7] = cpu_to_be32(CFG_FLASH_SIZE_1);
	nodeoffset = fdt_path_offset (blob, "/localbus");
	if (nodeoffset >= 0) {
		ret = fdt_setprop(blob, nodeoffset, "ranges", flash_data,
					sizeof(flash_data));
	if (ret < 0)
		printf("ft_blob_update(): cannot set /localbus/ranges "
			"property err:%s\n", fdt_strerror(ret));
	}
	else {
		/* memory node is required in dts */
		printf("ft_blob_update(): cannot find /localbus node "
		"err:%s\n", fdt_strerror(nodeoffset));
	}
	/* MAC Adresse */
	nodeoffset = fdt_path_offset (blob, "/soc/cpm/ethernet");
	if (nodeoffset >= 0) {
		ret = fdt_setprop(blob, nodeoffset, "mac-address", bd->bi_enetaddr,
					sizeof(uchar) * 6);
	if (ret < 0)
		printf("ft_blob_update(): cannot set /soc/cpm/ethernet/mac-address "
			"property err:%s\n", fdt_strerror(ret));
	}
	else {
		/* memory node is required in dts */
		printf("ft_blob_update(): cannot find /soc/cpm/ethernet node "
		"err:%s\n", fdt_strerror(nodeoffset));
	}

}

void ft_board_setup(void *blob, bd_t *bd)
{
	ft_cpu_setup( blob, bd);
	ft_blob_update(blob, bd);
}
#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */