tqm85xx.h

来自「最新版的u-boot,2008-10-18发布」· C头文件 代码 · 共 728 行 · 第 1/2 页

#define CFG_NAND3_BASE		(CFG_NAND2_BASE + CFG_NAND_CS_DIST)

#define CFG_MAX_NAND_DEVICE     2	/* Max number of NAND devices	*/
#define NAND_MAX_CHIPS		1

#if (CFG_MAX_NAND_DEVICE == 1)
#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE }
#elif (CFG_MAX_NAND_DEVICE == 2)
#define	CFG_NAND_QUIET_TEST	1
#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE, \
			     CFG_NAND1_BASE, \
}
#elif (CFG_MAX_NAND_DEVICE == 4)
#define	CFG_NAND_QUIET_TEST	1
#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE, \
			     CFG_NAND1_BASE, \
			     CFG_NAND2_BASE, \
			     CFG_NAND3_BASE, \
}
#endif

/* CS3 for NAND Flash */
#define CFG_BR3_PRELIM		((CFG_NAND0_BASE & BR_BA) | BR_PS_8 | \
				 BR_MS_UPMB | BR_V)
#define CFG_OR3_PRELIM		(P2SZ_TO_AM(CFG_NAND_SIZE) | OR_UPM_BI)

#define NAND_BIG_DELAY_US       25	/* max tR for Samsung devices	*/

#endif /* CONFIG_NAND */

/*
 * General PCI
 * Addresses are mapped 1-1.
 */
#define CFG_PCI1_MEM_BASE	0x80000000
#define CFG_PCI1_MEM_PHYS	CFG_PCI1_MEM_BASE
#define CFG_PCI1_MEM_SIZE	0x20000000	/* 512M			*/
#define CFG_PCI1_IO_BASE	(CFG_CCSRBAR + 0x02000000)
#define CFG_PCI1_IO_PHYS	CFG_PCI1_IO_BASE
#define CFG_PCI1_IO_SIZE	0x1000000	/*  16M			*/

/* PCI view of System Memory */
#define CFG_PCI_MEMORY_BUS	0x00000000
#define CFG_PCI_MEMORY_PHYS	0x00000000
#define CFG_PCI_MEMORY_SIZE	0x80000000

#ifdef CONFIG_PCIE1
/*
 * General PCI express
 * Addresses are mapped 1-1.
 */
#ifdef CONFIG_TQM_BIGFLASH
#define CFG_PCIE1_MEM_BASE	0xb0000000
#define CFG_PCIE1_MEM_SIZE	0x10000000      /* 512M                 */
#define CFG_PCIE1_IO_BASE	0xaf000000
#else /* !CONFIG_TQM_BIGFLASH */
#define CFG_PCIE1_MEM_BASE	0xc0000000
#define CFG_PCIE1_MEM_SIZE	0x20000000      /* 512M                 */
#define CFG_PCIE1_IO_BASE	0xef000000
#endif /* CONFIG_TQM_BIGFLASH */
#define CFG_PCIE1_MEM_PHYS	CFG_PCIE1_MEM_BASE
#define CFG_PCIE1_IO_PHYS	CFG_PCIE1_IO_BASE
#define CFG_PCIE1_IO_SIZE	0x1000000       /* 16M                  */
#endif /* CONFIG_PCIE1 */

#if defined(CONFIG_PCI)

#define CONFIG_PCI_PNP			/* do pci plug-and-play		*/

#define CONFIG_EEPRO100
#undef CONFIG_TULIP

#undef CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup	*/
#define CFG_PCI_SUBSYS_VENDORID 0x1057	/* Motorola			*/

#endif /* CONFIG_PCI */

#define CONFIG_NET_MULTI	1

#define CONFIG_MII		1	/* MII PHY management		*/
#define CONFIG_TSEC1	1
#define CONFIG_TSEC1_NAME	"TSEC0"
#define CONFIG_TSEC2	1
#define CONFIG_TSEC2_NAME	"TSEC1"
#define TSEC1_PHY_ADDR		2
#define TSEC2_PHY_ADDR		1
#define TSEC1_PHYIDX		0
#define TSEC2_PHYIDX		0
#define TSEC1_FLAGS		TSEC_GIGABIT
#define TSEC2_FLAGS		TSEC_GIGABIT
#define FEC_PHY_ADDR		3
#define FEC_PHYIDX		0
#define FEC_FLAGS		0
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
#define CONFIG_HAS_ETH2

#ifdef CONFIG_TQM8548
/*
 * TQM8548 has 4 ethernet ports. 4 ETSEC's.
 *
 * On the STK85xx Starterkit the ETSEC3/4 ports are on an
 * additional adapter (AIO) between module and Starterkit.
 */
#define CONFIG_TSEC3	1
#define CONFIG_TSEC3_NAME	"TSEC2"
#define CONFIG_TSEC4	1
#define CONFIG_TSEC4_NAME	"TSEC3"
#define TSEC3_PHY_ADDR		4
#define TSEC4_PHY_ADDR		5
#define TSEC3_PHYIDX		0
#define TSEC4_PHYIDX		0
#define TSEC3_FLAGS		(TSEC_GIGABIT | TSEC_REDUCED)
#define TSEC4_FLAGS		(TSEC_GIGABIT | TSEC_REDUCED)
#define CONFIG_HAS_ETH3
#define CONFIG_HAS_ETH4
#endif	/* CONFIG_TQM8548 */

/* Options are TSEC[0-1], FEC */
#define CONFIG_ETHPRIME		"TSEC0"

#if defined(CONFIG_TQM8540)
/*
 * TQM8540 has 3 ethernet ports. 2 TSEC's and one FEC.
 * The FEC port is connected on the same signals as the FCC3 port
 * of the TQM8560 to the baseboard (STK85xx Starterkit).
 *
 * On the STK85xx Starterkit the X47/X50 jumper has to be set to
 * a - d (X50.2 - 3) to enable the FEC port.
 */
#define CONFIG_MPC85XX_FEC	1
#define CONFIG_MPC85XX_FEC_NAME	"FEC"
#endif

#if defined(CONFIG_TQM8541) || defined(CONFIG_TQM8555)
/*
 * TQM8541/55 have 4 ethernet ports. 2 TSEC's and 2 FCC's. Only one FCC port
 * can be used at once, since only one FCC port is available on the STK85xx
 * Starterkit.
 *
 * To use this port you have to configure U-Boot to use the FCC port 1...2
 * and set the X47/X50 jumper to:
 * FCC1: a - b (X47.2 - X50.2)
 * FCC2: a - c (X50.2 - 1)
 */
#define CONFIG_ETHER_ON_FCC
#define	CONFIG_ETHER_INDEX    1	/* FCC channel for ethernet	*/
#endif

#if defined(CONFIG_TQM8560)
/*
 * TQM8560 has 5 ethernet ports. 2 TSEC's and 3 FCC's. Only one FCC port
 * can be used at once, since only one FCC port is available on the STK85xx
 * Starterkit.
 *
 * To use this port you have to configure U-Boot to use the FCC port 1...3
 * and set the X47/X50 jumper to:
 * FCC1: a - b (X47.2 - X50.2)
 * FCC2: a - c (X50.2 - 1)
 * FCC3: a - d (X50.2 - 3)
 */
#define CONFIG_ETHER_ON_FCC
#define	CONFIG_ETHER_INDEX    3	/* FCC channel for ethernet	*/
#endif

#if defined(CONFIG_ETHER_ON_FCC) && (CONFIG_ETHER_INDEX == 1)
#define CONFIG_ETHER_ON_FCC1
#define CFG_CMXFCR_MASK1	(CMXFCR_FC1 | CMXFCR_RF1CS_MSK | \
				 CMXFCR_TF1CS_MSK)
#define CFG_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK12)
#define CFG_CPMFCR_RAMTYPE	0
#define CFG_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
#endif

#if defined(CONFIG_ETHER_ON_FCC) && (CONFIG_ETHER_INDEX == 2)
#define CONFIG_ETHER_ON_FCC2
#define CFG_CMXFCR_MASK2	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | \
				 CMXFCR_TF2CS_MSK)
#define CFG_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK16 | CMXFCR_TF2CS_CLK13)
#define CFG_CPMFCR_RAMTYPE	0
#define CFG_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
#endif

#if defined(CONFIG_ETHER_ON_FCC) && (CONFIG_ETHER_INDEX == 3)
#define CONFIG_ETHER_ON_FCC3
#define CFG_CMXFCR_MASK3	(CMXFCR_FC3 | CMXFCR_RF3CS_MSK | \
				 CMXFCR_TF3CS_MSK)
#define CFG_CMXFCR_VALUE3	(CMXFCR_RF3CS_CLK15 | CMXFCR_TF3CS_CLK14)
#define CFG_CPMFCR_RAMTYPE	0
#define CFG_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
#endif

/*
 * Environment
 */
#define CONFIG_ENV_IS_IN_FLASH	1

#ifdef CONFIG_TQM_FLASH_N_TYPE
#define CONFIG_ENV_SECT_SIZE	0x40000 /* 256K (one sector) for env	*/
#else /* !CONFIG_TQM_FLASH_N_TYPE */
#define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) for env	*/
#endif /* CONFIG_TQM_FLASH_N_TYPE */
#define CONFIG_ENV_ADDR		(CFG_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE		0x2000
#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)

#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
#define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/

#define	CONFIG_TIMESTAMP	/* Print image info with ts	*/

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

#ifdef CONFIG_NAND
/*
 * Use NAND-FLash as JFFS2 device
 */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_JFFS2

#define	CONFIG_JFFS2_NAND	1

#ifdef CONFIG_JFFS2_CMDLINE
#define MTDIDS_DEFAULT		"nand0=TQM85xx-nand"
#define MTDPARTS_DEFAULT	"mtdparts=TQM85xx-nand:-"
#else
#define CONFIG_JFFS2_DEV 	"nand0"	/* NAND device jffs2 lives on	*/
#define CONFIG_JFFS2_PART_OFFSET 0	/* start of jffs2 partition	*/
#define CONFIG_JFFS2_PART_SIZE	0x200000 /* size of jffs2 partition	*/
#endif /* CONFIG_JFFS2_CMDLINE */

#endif /* CONFIG_NAND */

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_PING
#define CONFIG_CMD_I2C
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NFS
#define CONFIG_CMD_SNTP
#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_DTT
#define CONFIG_CMD_MII

#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
#endif

#undef CONFIG_WATCHDOG			/* watchdog disabled		*/

/*
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP			/* undef to save memory		*/
#define CFG_LOAD_ADDR	0x2000000	/* default load address		*/
#define CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/

#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/
#else
#define CFG_CBSIZE	256		/* Console I/O Buffer Size	*/
#endif

#define CFG_PBSIZE	(CFG_CBSIZE + \
			 sizeof(CFG_PROMPT) + 16)   /* Print Buf Size	*/
#define CFG_MAXARGS	16		/* max number of command args	*/
#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/
#define CFG_HZ		1000		/* decrementer freq: 1ms ticks	*/

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux	*/

/*
 * Internal Definitions
 *
 * Boot Flags
 */
#define BOOTFLAG_COLD	0x01		/* Power-On: Boot from FLASH	*/
#define BOOTFLAG_WARM	0x02		/* Software reboot		*/

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port*/
#define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use	*/
#endif

#define CONFIG_LOADADDR	 200000		/* default addr for tftp & bootm*/

#define CONFIG_BOOTDELAY 5		/* -1 disables auto-boot	*/

#define CONFIG_PREBOOT	"echo;"	\
	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
	"echo"

#undef	CONFIG_BOOTARGS		/* the boot command will set bootargs	*/


/*
 * Setup some board specific values for the default environment variables
 */
#ifdef CONFIG_CPM2
#define CONFIG_ENV_CONSDEV		"consdev=ttyCPM0\0"
#else
#define CONFIG_ENV_CONSDEV		"consdev=ttyS0\0"
#endif
#define CONFIG_ENV_FDT_FILE	"fdt_file="MK_STR(CONFIG_HOSTNAME)"/" \
				MK_STR(CONFIG_HOSTNAME)".dtb\0"
#define CONFIG_ENV_BOOTFILE	"bootfile="MK_STR(CONFIG_HOSTNAME)"/uImage\0"
#define CONFIG_ENV_UBOOT		"uboot="MK_STR(CONFIG_HOSTNAME)"/u-boot.bin\0" \
				"uboot_addr="MK_STR(TEXT_BASE)"\0"

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	CONFIG_ENV_BOOTFILE						\
	CONFIG_ENV_FDT_FILE						\
	CONFIG_ENV_CONSDEV							\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=$serverip:$rootpath\0"				\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addip=setenv bootargs $bootargs "				\
		"ip=$ipaddr:$serverip:$gatewayip:$netmask"		\
		":$hostname:$netdev:off panic=1\0"			\
	"addcons=setenv bootargs $bootargs "				\
		"console=$consdev,$baudrate\0"				\
	"flash_nfs=run nfsargs addip addcons;"				\
		"bootm $kernel_addr - $fdt_addr\0"			\
	"flash_self=run ramargs addip addcons;"				\
		"bootm $kernel_addr $ramdisk_addr $fdt_addr\0"		\
	"net_nfs=tftp $kernel_addr_r $bootfile;"       			\
		"tftp $fdt_addr_r $fdt_file;"				\
		"run nfsargs addip addcons;"				\
		"bootm $kernel_addr_r - $fdt_addr_r\0"    		\
	"rootpath=/opt/eldk/ppc_85xx\0"					\
	"fdt_addr_r=900000\0"						\
	"kernel_addr_r=1000000\0"      					\
	"fdt_addr=ffec0000\0"						\
	"kernel_addr=ffd00000\0"					\
	"ramdisk_addr=ff800000\0"					\
	CONFIG_ENV_UBOOT							\
	"load=tftp 100000 $uboot\0"					\
	"update=protect off $uboot_addr +$filesize;"			\
		"erase $uboot_addr +$filesize;"				\
		"cp.b 100000 $uboot_addr $filesize;"			\
		"setenv filesize;saveenv\0"				\
	"upd=run load update\0"						\
	""
#define CONFIG_BOOTCOMMAND	"run flash_self"

#endif /* __CONFIG_H */