📄 faraday_code.txt
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0X07, //bLength
0X05, //bDescriptorType
0X04, //bEndpointAddress
0X03, //bmAttributes
0X40, //wMaxPacketSize
0X01, //bInterval
//Interface Descriptor: from 0X30
0X09, //bLength
0X04, //bDescriptorType
0X00, //bInterfaceNumber
0X00, //bAlternateSetting
0X01, //bNumEndpoints
0X03, //bInterfaceClass
0X01, //bInterfaceSubClass
0X02, //bInterfaceProtocol
0X02, //iInterface
//Endpoint 00 Descriptor: from 0X39
0X07, //bLength
0X05, //bDescriptorType
0X01, //bEndpointAddress
0X02, //bmAttributes
0X00, //wMaxPacketSize
0X02,
0X00, //bInterval
//Interface Descriptor: from 0X40
0X09, //bLength
0X04, //bDescriptorType
0X00, //bInterfaceNumber
0X00, //bAlternateSetting
0X01, //bNumEndpoints
0X03, //bInterfaceClass
0X01, //bInterfaceSubClass
0X02, //bInterfaceProtocol
0X02, //iInterface
//Endpoint 00 Descriptor: from 0X49
0X07, //bLength
0X05, //bDescriptorType
0X01, //bEndpointAddress
0X02, //bmAttributes
0X00, //wMaxPacketSize
0X02,
0X00, //bInterval
//Interface Descriptor: from 0X50
0X09, //bLength
0X04, //bDescriptorType
0X00, //bInterfaceNumber
0X00, //bAlternateSetting
0X01, //bNumEndpoints
0X03, //bInterfaceClass
0X01, //bInterfaceSubClass
0X02, //bInterfaceProtocol
0X02, //iInterface
//Endpoint 00 Descriptor: from 0X59
0X07, //bLength
0X05, //bDescriptorType
0X01, //bEndpointAddress
0X02, //bmAttributes
0X00, //wMaxPacketSize
0X02,
0X00, //bInterval
//Device Descriptor: from 0X60
0X12, //bLength
0X01, //bDescriptorType
0X00, //bcdUSB
0X02,
0X00, //bDeviceClass
0X00, //bDeviceSubClass
0X00, //bDeviceProtocol
0X40, //bMaxPacketSize0
0X10, //idVendor
0X23,
0X78, //idProduct
0X56,
0X01, //bcdDevice
0X10, //iManufacturer
0X20, //iProduct
0X00, //iSerialNumber
0X01, //bNumConfigurations
//Configuration Descriptor: from 0X71
0X09, //bLength
0X02, //bDescriptorType
0X27, //wTotalLength
0X01, //bNumInterface
0X01, //bConfigurationValue
0X30, //iConfiguration
0XC0, //bmAttribute
0X00, //iMaxPower
//Interface Descriptor: from 0X79
0X09, //bLength
0X04, //bDescriptorType
0X00, //bInterfaceNumber
0X00, //bAlternateSetting
0X04, //bNumEndpoints
0X00, //bInterfaceClass
0X00, //bInterfaceSubClass
0X00, //bInterfaceProtocol
0X40, //iInterface
//Endpoint 00 Descriptor: from 0X82
0X07, //bLength
0X05, //bDescriptorType
0X81, //bEndpointAddress
0X02, //bmAttributes
0X00, //wMaxPacketSize
0X02,
0X00, //bInterval
//Endpoint 01 Descriptor: from 0X89
0X07, //bLength
0X05, //bDescriptorType
0X02, //bEndpointAddress
0X02, //bmAttributes
0X00, //wMaxPacketSize
0X02,
0X00, //bInterval
//Endpoint 02 Descriptor: from 0X90
0X07, //bLength
0X05, //bDescriptorType
0X83, //bEndpointAddress
0X03, //bmAttributes
0X40, //wMaxPacketSize
//Endpoint 03 Descriptor: from 0X95
0X07, //bLength
0X05, //bDescriptorType
0X04, //bEndpointAddress
0X03, //bmAttributes
0X40, //wMaxPacketSize
0X01, //bInterval
//Interface Descriptor: from 0X9B
0X09, //bLength
0X04, //bDescriptorType
0X00, //bInterfaceNumber
0X00, //bAlternateSetting
0X01, //bNumEndpoints
0X03, //bInterfaceClass
0X01, //bInterfaceSubClass
0X02, //bInterfaceProtocol
0X02, //iInterface
//Endpoint 00 Descriptor: from 0XA4
0X07, //bLength
0X05, //bDescriptorType
0X01, //bEndpointAddress
0X02, //bmAttributes
0X00, //wMaxPacketSize
0X02,
0X00, //bInterval
//LANG ID Descriptor: from 0XAB
0X04, //bLength
0X03, //bDescriptorType
0X09, //bLang
0X04,
//String Descriptor: from 0XAF
0X32, //bLength,from 0XAF
0X03, //bDescriptorType
0X46, 0, //F
0X41, 0, //A
0X52, 0, //R
0X41, 0, //A
0X44, 0, //D
0X41, 0, //A
0X59, 0, //Y
0X20, 0, //
0X54, 0, //T
0X65, 0, //e
0X63, 0, //c
0X68, 0, //h
0X6E, 0, //n
0X6F, 0, //o
0X6C, 0, //l
0X6F, 0, //o
0X67, 0, //g
0X79, 0, //y
0X20, 0, //
0X43, 0, //C
0X6F, 0, //o
0X72, 0, //r
0X70, 0, //p
0X2E, 0, //.
0X10, //bLength,from 0XE1
0X03, //bDescriptorType
0X46, 0, //F
0X55, 0, //U
0X53, 0, //S
0X42, 0, //B
0X32, 0, //2
0X30, 0, //0
0X30, 0, //0
0X2E, //bLength,from 0XF1
0X03, //bDescriptorType
0X45, 0, //E
0X56, 0, //V
0X2D, 0, //-
0X42, 0, //B
0X6F, 0, //o
0X61, 0, //a
0X72, 0, //r
0X64, 0, //d
0X5F, 0, //_
0X43, 0, //C
0X6F, 0, //o
0X6E, 0, //n
0X66, 0, //f
0X69, 0, //i
0X67, 0, //g
0X75, 0, //u
0X72, 0, //r
0X61, 0, //a
0X74, 0, //t
0X69, 0, //i
0X6F, 0, //o
0X6E, 0, //n
0X26, //bLength,from 0X11F
0X03, //bDescriptorType
0X45, 0, //E
0X56, 0, //V
0X2D, 0, //-
0X42, 0, //B
0X6F, 0, //o
0X61, 0, //a
0X72, 0, //r
0X64, 0, //d
0X5F, 0, //_
0X49, 0, //I
0X6E, 0, //n
0X74, 0, //t
0X65, 0, //e
0X72, 0, //r
0X66, 0, //f
0X61, 0, //a
0X63, 0, //c
0X65, 0, //e
0X10, //bLength,from 0X145
0X03, //bDescriptorType
0X50, 0, //P
0X72, 0, //r
0X69, 0, //i
0X6E, 0, //n
0X74, 0, //t
0X65, 0, //e
0X72, 0, //r
0X1E, //bLength,from 0X155
0X03, //bDescriptorType
0X44, 0, //D
0X69, 0, //i
0X67, 0, //g
0X69, 0, //i
0X74, 0, //t
0X61, 0, //a
0X6C, 0, //l
0X5F, 0, //_
0X43, 0, //C
0X61, 0, //a
0X6D, 0, //m
0X65, 0, //e
0X72, 0, //r
0X61, 0, //a
0X10, //bLength,from 0X173
0X03, //bDescriptorType
0X53, 0, //S
0X74, 0, //t
0X6F, 0, //o
0X72, 0, //r
0X61, 0, //a
0X67, 0, //g
0X65, 0, //e
0X0E, //bLength,from 0X183
0X03, //bDescriptorType
0X4D, 0, //M
0X65, 0, //e
0X6D, 0, //m
0X6F, 0, //o
0X72, 0, //r
0X79, 0 //y
};
//EP01 IN Bulk B(512*2) 512
//EP02 OUT Bulk B(512*2) 512
//EP03 IN Interrupt G(64*1) 64
//EP04 OUT Interrupt G(64*1) 64
//FIFO configuration generated by EZ-con
void Firmware_High_Write_into_RGF(void)
{
//EP1 Mapped FIFO Register
FUSBPort[0x31]=0xF0;
//FIFO0 Mapped Register
FUSBPort[0x80]=0x11;
//FIFO0 Configuration Register
FUSBPort[0x90]=0x949652;
//FIFO0 Instruction Register
FUSBPort[0xA0]=0x00;
//IN EP1 MaxPacketSize Register
FUSBPort[0x40]=0x00;
FUSBPort[0x41]=0x02;
//EP2 Mapped FIFO Register
FUSBPort[0x32]=0x0F;
//FIFO0 Mapped Register
FUSBPort[0x80]=0x02;
//FIFO0 Configuration Register
FUSBPort[0x90]=0x949652;
//FIFO0 Instruction Register
FUSBPort[0xA0]=0x00;
//IN EP2 MaxPacketSize Register
FUSBPort[0x62]=0x00;
FUSBPort[0x63]=0x02;
//EP3 Mapped FIFO Register
FUSBPort[0x33]=0xF0;
//FIFO0 Mapped Register
FUSBPort[0x80]=0x13;
//FIFO0 Configuration Register
FUSBPort[0x90]=0x949653;
//FIFO0 Instruction Register
FUSBPort[0xA0]=0x00;
//IN EP3 MaxPacketSize Register
FUSBPort[0x44]=0x40;
FUSBPort[0x45]=0x00;
//EP4 Mapped FIFO Register
FUSBPort[0x34]=0x8F;
//FIFO8 Mapped Register
FUSBPort[0x88]=0x04;
//FIFO8 Configuration Register
FUSBPort[0x98]=0x83;
//FIFO8 Instruction Register
FUSBPort[0xA8]=0x00;
//IN EP4 MaxPacketSize Register
FUSBPort[0x66]=0x40;
FUSBPort[0x67]=0x00;
}
//EP01 IN Bulk H(64*2) 64
//EP02 OUT Bulk H(64*2) 64
//EP03 IN Interrupt G(64*1) 64
//EP04 OUT Interrupt G(64*1) 64
//FIFO configuration generated by EZ-con
void Firmware_Full_Write_into_RGF(void)
{
//EP1 Mapped FIFO Register
FUSBPort[0x31]=0xF0;
//FIFO0 Mapped Register
FUSBPort[0x80]=0x11;
//FIFO0 Configuration Register
FUSBPort[0x90]=0x94A13A;
//FIFO0 Instruction Register
FUSBPort[0xA0]=0x00;
//IN EP1 MaxPacketSize Register
FUSBPort[0x40]=0x40;
FUSBPort[0x41]=0x00;
//EP2 Mapped FIFO Register
FUSBPort[0x32]=0x0F;
//FIFO0 Mapped Register
FUSBPort[0x80]=0x02;
//FIFO0 Configuration Register
FUSBPort[0x90]=0x94A13A;
//FIFO0 Instruction Register
FUSBPort[0xA0]=0x00;
//IN EP2 MaxPacketSize Register
FUSBPort[0x62]=0x40;
FUSBPort[0x63]=0x00;
//EP3 Mapped FIFO Register
FUSBPort[0x33]=0xF0;
//FIFO0 Mapped Register
FUSBPort[0x80]=0x13;
//FIFO0 Configuration Register
FUSBPort[0x90]=0x94A13B;
//FIFO0 Instruction Register
FUSBPort[0xA0]=0x00;
//IN EP3 MaxPacketSize Register
FUSBPort[0x44]=0x40;
FUSBPort[0x45]=0x00;
//EP4 Mapped FIFO Register
FUSBPort[0x34]=0x8F;
//FIFO8 Mapped Register
FUSBPort[0x88]=0x04;
//FIFO8 Configuration Register
FUSBPort[0x98]=0x83;
//FIFO8 Instruction Register
FUSBPort[0xA8]=0x00;
//IN EP4 MaxPacketSize Register
FUSBPort[0x66]=0x40;
FUSBPort[0x67]=0x00;
}
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