fullfifocode.txt

FIC8120方案的 StartCell_Driver

//EP01    IN              Bulk     G(64*1)     64
//EP02   OUT              Bulk     G(64*1)     64
//EP03    IN         Interrupt     G(64*1)     64
//FIFO configuration generated by EZ-con
void Firmware_Full_Write_into_RGF(void)
{
   //EP1 Mapped FIFO Register 
   FUSBPort[0x31]=0xF0;
   //FIFO0 Mapped Register 
   FUSBPort[0x80]=0x11;
   //FIFO0 Configuration Register 
   FUSBPort[0x90]=0x93A322;
   //FIFO0 Instruction Register 
   FUSBPort[0xA0]=0x00;
   //IN EP1 MaxPacketSize Register 
   FUSBPort[0x40]=0x40;
   FUSBPort[0x41]=0x00;

   //EP2 Mapped FIFO Register 
   FUSBPort[0x32]=0x0F;
   //FIFO0 Mapped Register 
   FUSBPort[0x80]=0x02;
   //FIFO0 Configuration Register 
   FUSBPort[0x90]=0x93A322;
   //FIFO0 Instruction Register 
   FUSBPort[0xA0]=0x00;
   //IN EP2 MaxPacketSize Register 
   FUSBPort[0x62]=0x40;
   FUSBPort[0x63]=0x00;

   //EP3 Mapped FIFO Register 
   FUSBPort[0x33]=0xF0;
   //FIFO0 Mapped Register 
   FUSBPort[0x80]=0x13;
   //FIFO0 Configuration Register 
   FUSBPort[0x90]=0x93A323;
   //FIFO0 Instruction Register 
   FUSBPort[0xA0]=0x00;
   //IN EP3 MaxPacketSize Register 
   FUSBPort[0x44]=0x40;
   FUSBPort[0x45]=0x00;

}