mmumacro.s

FIC8120方案的 StartCell_Driver

	SET_ICACHE_940T	$state
 ENDIF
 IF :DEF: ARM946T
	SET_ICACHE_946T	$state
 ENDIF
 IF :DEF: ARM1020T
	SET_ICACHE_1020T	$state
 ENDIF
 IF :DEF: SA110
	SET_ICACHE_110	$state
 ENDIF
 IF :DEF: XSCALE
	SET_ICACHE_XSCALE	$state
 ENDIF
	MEND

	MACRO
	SET_DCACHE	$state
 IF :LNOT: :DEF: HAL_HAS_CACHE
	NO_SET_DCACHE	$state
 ENDIF
 IF :DEF: ARM720T
	SET_DCACHE_720T	$state
 ENDIF
 IF :DEF: ARM740T
	SET_DCACHE_740T	$state
 ENDIF
 IF :DEF: ARM922
	SET_DCACHE_920T	$state
 ENDIF
 IF :DEF: ARM940T
	SET_DCACHE_940T	$state
 ENDIF
 IF :DEF: ARM946T
	SET_DCACHE_946T	$state
 ENDIF
 IF :DEF: ARM1020T
	SET_DCACHE_1020T	$state
 ENDIF
 IF :DEF: SA110
	SET_DCACHE_110	$state
 ENDIF
 IF :DEF: XSCALE
	SET_DCACHE_XSCALE	$state
 ENDIF
	MEND

	MACRO
	SET_PREDICT	$state
 IF :LNOT: :DEF: HAL_HAS_B_PREDICT
	NO_SET_PREDICT	$state
 ENDIF
 IF :DEF: ARM1020T
	SET_PREDICT_1020T	$state
 ENDIF
 IF :DEF: XSCALE
	SET_PREDICT_XSCALE	$state
 ENDIF
	MEND

	MACRO
	SET_WBUFFER	$state
 IF :LNOT: :DEF: HAL_HAS_WBUFFER
	NO_SET_WBUFFER	$state
 ENDIF
 IF :DEF: ARM720T
	SET_WBUFFER_720T	$state
 ENDIF
 IF :DEF: ARM740T
	SET_WBUFFER_740T	$state
 ENDIF
 IF :DEF: SA110
	SET_WBUFFER_110	$state
 ENDIF
 IF :DEF: XSCALE
	SET_WBUFFER_XSCALE	$state
 ENDIF
	MEND

	MACRO
	SET_MMU	$state
 IF :LNOT: :DEF: HAL_HAS_MMU
	NO_SET_MMU	$state
 ENDIF
 IF :DEF: ARM720T
	SET_MMU_720T	$state
 ENDIF
 IF :DEF: ARM922
	SET_MMU_920T	$state
 ENDIF
 IF :DEF: ARM1020T
	SET_MMU_1020T	$state
 ENDIF
 IF :DEF: SA110
	SET_MMU_110	$state
 ENDIF
 IF :DEF: XSCALE
	SET_MMU_XSCALE	$state
 ENDIF
	MEND

	MACRO
	SET_BIGEND	$state
	NO_SET_BIGEND	$state
 IF :DEF: ARM720T
	SET_BIGEND_720T	$state
 ENDIF
 IF :DEF: ARM740T
	SET_BIGEND_740T	$state
 ENDIF
 IF :DEF: ARM922
	SET_BIGEND_920T	$state
 ENDIF
 IF :DEF: ARM940T
	SET_BIGEND_940T	$state
 ENDIF
 IF :DEF: ARM946T
	SET_BIGEND_946T	$state
 ENDIF
 IF :DEF: ARM1020T
	SET_BIGEND_1020T	$state
 ENDIF
 IF :DEF: SA110
	SET_BIGEND_110	$state
 ENDIF
 IF :DEF: XSCALE
	SET_BIGEND_XSCALE	$state
 ENDIF
	MEND

	MACRO
	SET_IMEM	$state
 IF :DEF: ARM966T
	SET_IMEM_966T	$state
 ENDIF
	MEND

	MACRO
	SET_DMEM	$state
 IF :DEF: ARM966T
	SET_DMEM_966T	$state
 ENDIF
	MEND

	MACRO
	TEST_MMU	$state
 IF :LNOT: :DEF: HAL_HAS_MMU
	NO_TEST_MMU	$state
 ENDIF
 IF :DEF: ARM720T
	TEST_MMU_720T	$state
 ENDIF
 IF :DEF: ARM740T
	TEST_MMU_740T	$state
 ENDIF
 IF :DEF: ARM922
	TEST_MMU_920T	$state
 ENDIF
 IF :DEF: ARM940T
	TEST_MMU_940T	$state
 ENDIF
 IF :DEF: ARM946T
	TEST_MMU_946T	$state
 ENDIF
 IF :DEF: ARM1020T
	TEST_MMU_1020T	$state
 ENDIF
 IF :DEF: SA110
	TEST_MMU_110	$state
 ENDIF
 IF :DEF: XSCALE
	TEST_MMU_XSCALE	$state
 ENDIF
	MEND

	MACRO
	TEST_BIGEND	$state
	NO_TEST_BIGEND	$state
 IF :DEF: ARM720T
	TEST_BIGEND_720T	$state
 ENDIF
 IF :DEF: ARM740T
	TEST_BIGEND_740T	$state
 ENDIF
 IF :DEF: ARM922
	TEST_BIGEND_920T	$state
 ENDIF
 IF :DEF: ARM940T
	TEST_BIGEND_940T	$state
 ENDIF
 IF :DEF: ARM946T
	TEST_BIGEND_946T	$state
 ENDIF
 IF :DEF: ARM1020T
	TEST_BIGEND_1020T	$state
 ENDIF
 IF :DEF: SA110
	TEST_BIGEND_110	$state
 ENDIF
 IF :DEF: XSCALE
	TEST_BIGEND_XSCALE	$state
 ENDIF
	MEND

;------------------------------------------------------------------
;Read CPU Code (ID, Vendor revision etc.) register 
;
	MACRO
	REALLY_RDCPU_CODE	$val
	MRC p15, 0, $val, c0, c0 ,0
	MEND

	MACRO
	RDCPU_CODE	$val
 IF :LNOT: :DEF: HAL_HAS_CP15
	NO_RDCPU_CODE	$val
 ENDIF
 IF :DEF: ARM720T
	RDCPU_CODE_720T	$val
 ENDIF
 IF :DEF: ARM740T
	RDCPU_CODE_740T	$val
 ENDIF
 IF :DEF: ARM922
	RDCPU_CODE_920T	$val
 ENDIF
 IF :DEF: ARM940T
	RDCPU_CODE_940T	$val
 ENDIF
 IF :DEF: ARM946T
	RDCPU_CODE_946T	$val
 ENDIF
 IF :DEF: ARM1020T
	RDCPU_CODE_1020T	$val
 ENDIF
 IF :DEF: SA110
	RDCPU_CODE_110	$val
 ENDIF
 IF :DEF: XSCALE
	RDCPU_CODE_XSCALE	$val
 ENDIF
	MEND

;Extract CPU ID from CPU Code register
;
	MACRO
	RDCPU_ID	$w1, $val
 IF :LNOT: :DEF: HAL_HAS_CP15
	NO_RDCPU_ID	$w1, $val
 ENDIF
 IF :DEF: ARM720T
	RDCPU_ID_720T	$w1, $val
 ENDIF
 IF :DEF: ARM740T
	RDCPU_ID_740T	$w1, $val
 ENDIF
 IF :DEF: ARM922
	RDCPU_ID_920T	$w1, $val
 ENDIF
 IF :DEF: ARM940T
	RDCPU_ID_940T	$w1, $val
 ENDIF
 IF :DEF: ARM946T
	RDCPU_ID_946T	$w1, $val
 ENDIF
 IF :DEF: ARM1020T
	RDCPU_ID_1020T	$w1, $val
 ENDIF
 IF :DEF: SA110
	RDCPU_ID_110	$w1, $val
 ENDIF
 IF :DEF: XSCALE
	RDCPU_ID_XSCALE	$w1, $val
 ENDIF
	MEND

;Extract CPU Vendor from CPU Code register
;
	MACRO
	RDCPU_VENDOR	$w1, $val
 IF :LNOT: :DEF: HAL_HAS_CP15
	NO_RDCPU_VENDOR	$w1, $val
 ENDIF
 IF :DEF: ARM720T
	RDCPU_VENDOR_720T	$w1, $val
 ENDIF
 IF :DEF: ARM740T
	RDCPU_VENDOR_740T	$w1, $val
 ENDIF
 IF :DEF: ARM922
	RDCPU_VENDOR_920T	$w1, $val
 ENDIF
 IF :DEF: ARM940T
	RDCPU_VENDOR_940T	$w1, $val
 ENDIF
 IF :DEF: ARM946T
	RDCPU_VENDOR_946T	$w1, $val
 ENDIF
 IF :DEF: ARM1020T
	RDCPU_VENDOR_1020T	$w1, $val
 ENDIF
 IF :DEF: SA110
	RDCPU_VENDOR_110	$w1, $val
 ENDIF
 IF :DEF: XSCALE
	RDCPU_VENDOR_XSCALE	$w1, $val
 ENDIF
	MEND

;Coprocessor read of ID register (cache line sizes)
;
	MACRO
	RDCACHE_SIZES	$reg_number
	NO_RDCACHE_SIZES	$reg_number
 IF :DEF: ARM922
	RDCACHE_SIZES_920T	$reg_number
 ENDIF
 IF :DEF: ARM940T
	RDCACHE_SIZES_940T	$reg_number
 ENDIF
 IF :DEF: ARM946T
	RDCACHE_SIZES_946T	$reg_number
 ENDIF
 IF :DEF: ARM1020T
	RDCACHE_SIZES_1020T	$reg_number
 ENDIF
	MEND

;Coprocessor read of Control register 
;
	MACRO
	RDMMU_STATE	$reg_number
 IF :LNOT: :DEF: HAL_HAS_MMU
	NO_RDMMU_STATE	$reg_number
 ENDIF
 IF :DEF: ARM720T
	RDMMU_STATE_720T	$reg_number
 ENDIF
 IF :DEF: ARM740T
	RDMMU_STATE_740T	$reg_number
 ENDIF
 IF :DEF: ARM922
	RDMMU_STATE_920T	$reg_number
 ENDIF
 IF :DEF: ARM940T
	RDMMU_STATE_940T	$reg_number
 ENDIF
 IF :DEF: ARM946T
	RDMMU_STATE_946T	$reg_number
 ENDIF
 IF :DEF: ARM1020T
	RDMMU_STATE_1020T	$reg_number
 ENDIF
 IF :DEF: SA110
	RDMMU_STATE_110	$reg_number
 ENDIF
 IF :DEF: XSCALE
	RDMMU_STATE_XSCALE	$reg_number
 ENDIF
	MEND

;Coprocessor write of Control register 
;
	MACRO 
	WRMMU_STATE	$reg_number
 IF :LNOT: :DEF: HAL_HAS_MMU
	NO_WRMMU_STATE	$reg_number
 ENDIF
 IF :DEF: ARM720T
	WRMMU_STATE_720T	$reg_number
 ENDIF
 IF :DEF: ARM740T
	WRMMU_STATE_740T	$reg_number
 ENDIF
 IF :DEF: ARM922
	WRMMU_STATE_920T	$reg_number
 ENDIF
 IF :DEF: ARM940T
	WRMMU_STATE_940T	$reg_number
 ENDIF
 IF :DEF: ARM946T
	WRMMU_STATE_946T	$reg_number
 ENDIF
 IF :DEF: ARM1020T
	WRMMU_STATE_1020T	$reg_number
 ENDIF
 IF :DEF: SA110
	WRMMU_STATE_110	$reg_number
 ENDIF
 IF :DEF: XSCALE
	WRMMU_STATE_XSCALE	$reg_number
 ENDIF
	MEND

;------------------------------------------------------------------
;Coprocessor read of Translation Table Base reg. 
;
	MACRO
	RDMMU_TTBase	$reg_number
 IF :LNOT: :DEF: HAL_HAS_MMU
	NO_RDMMU_TTBase	$reg_number
 ENDIF
 IF :DEF: ARM720T
	RDMMU_TTBase_720T	$reg_number
 ENDIF
 IF :DEF: ARM922
	RDMMU_TTBase_920T	$reg_number
 ENDIF
 IF :DEF: ARM1020T
	RDMMU_TTBase_1020T	$reg_number
 ENDIF
 IF :DEF: SA110
	RDMMU_TTBase_110	$reg_number
 ENDIF
 IF :DEF: XSCALE
	RDMMU_TTBase_XSCALE	$reg_number
 ENDIF
	MEND

;Coprocessor write of Translation Table Base reg. 
;
	MACRO 
	WRMMU_TTBase	$reg_number
 IF :LNOT: :DEF: HAL_HAS_MMU
	NO_WRMMU_TTBase	$reg_number
 ENDIF
 IF :DEF: ARM720T
	WRMMU_TTBase_720T	$reg_number
 ENDIF
 IF :DEF: ARM922
	WRMMU_TTBase_920T	$reg_number
 ENDIF
 IF :DEF: ARM1020T
	WRMMU_TTBase_1020T	$reg_number
 ENDIF
 IF :DEF: SA110
	WRMMU_TTBase_110	$reg_number
 ENDIF
 IF :DEF: XSCALE
	WRMMU_TTBase_XSCALE	$reg_number
 ENDIF
	MEND

;Coprocessor read of Domain Access Control reg. 
;
	MACRO
	RDMMU_DAControl	$reg_number
 IF :LNOT: :DEF: HAL_HAS_MMU
	NO_RDMMU_DAControl	$reg_number
 ENDIF
 IF :DEF: ARM720T
	RDMMU_DAControl_720T	$reg_number
 ENDIF
 IF :DEF: ARM922
	RDMMU_DAControl_920T	$reg_number
 ENDIF
 IF :DEF: ARM1020T
	RDMMU_DAControl_1020T	$reg_number
 ENDIF
 IF :DEF: SA110
	RDMMU_DAControl_110	$reg_number
 ENDIF
 IF :DEF: XSCALE
	RDMMU_DAControl_XSCALE	$reg_number
 ENDIF
	MEND

;Coprocessor write of Domain Access Control reg. 
;
	MACRO 
	WRMMU_DAControl	$reg_number
 IF :LNOT: :DEF: HAL_HAS_MMU
	NO_WRMMU_DAControl	$reg_number
 ENDIF
 IF :DEF: ARM720T
	WRMMU_DAControl_720T	$reg_number
 ENDIF
 IF :DEF: ARM922
	WRMMU_DAControl_920T	$reg_number
 ENDIF
 IF :DEF: ARM1020T
	WRMMU_DAControl_1020T	$reg_number
 ENDIF
 IF :DEF: SA110
	WRMMU_DAControl_110	$reg_number
 ENDIF
 IF :DEF: XSCALE
	WRMMU_DAControl_XSCALE	$reg_number
 ENDIF
	MEND

;Coprocessor read of Fault Status register 
;
    MACRO
    RDMMU_FaultStatus	$reg
 IF :LNOT: :DEF: HAL_HAS_CP15
    NO_RDMMU_FaultStatus	$reg
 ENDIF
 IF :DEF: ARM720T
    RDMMU_FaultStatus_720T	$reg
 ENDIF
 IF :DEF: ARM922
    RDMMU_FaultStatus_920T	$reg
 ENDIF
 IF :DEF: ARM1020T
    RDMMU_FaultStatus_1020T	$reg
 ENDIF
 IF :DEF: SA110
    RDMMU_FaultStatus_110	$reg
 ENDIF
 IF :DEF: XSCALE
    RDMMU_FaultStatus_XSCALE	$reg
 ENDIF
    MEND

;Coprocessor write of Fault Status register 
;
    MACRO 
    WRMMU_FaultStatus	$reg
 IF :LNOT: :DEF: HAL_HAS_CP15
    NO_WRMMU_FaultStatus	$reg
 ENDIF
 IF :DEF: ARM720T
    WRMMU_FaultStatus_720T	$reg
 ENDIF
 IF :DEF: ARM922
    WRMMU_FaultStatus_920T	$reg
 ENDIF
 IF :DEF: ARM1020T
    WRMMU_FaultStatus_1020T	$reg
 ENDIF
 IF :DEF: SA110
    WRMMU_FaultStatus_110	$reg
 ENDIF
 IF :DEF: XSCALE
    WRMMU_FaultStatus_XSCALE	$reg
 ENDIF
    MEND

;Coprocessor read of Fault Address register 
;
    MACRO
    RDMMU_FaultAddress	$reg
 IF :LNOT: :DEF: HAL_HAS_CP15
    NO_RDMMU_FaultAddress	$reg
 ENDIF
 IF :DEF: ARM720T
    RDMMU_FaultAddress_720T	$reg
 ENDIF
 IF :DEF: ARM922
    RDMMU_FaultAddress_920T	$reg
 ENDIF
 IF :DEF: ARM1020T
    RDMMU_FaultAddress_1020T	$reg
 ENDIF
 IF :DEF: SA110
    RDMMU_FaultAddress_110	$reg
 ENDIF
 IF :DEF: XSCALE
    RDMMU_FaultAddress_XSCALE	$reg
 ENDIF
    MEND

;Coprocessor write of Fault Address register 
;
    MACRO 
    WRMMU_FaultAddress	$reg
 IF :LNOT: :DEF: HAL_HAS_CP15
    NO_WRMMU_FaultAddress	$reg
 ENDIF
 IF :DEF: ARM720T
    WRMMU_FaultAddress_720T	$reg
 ENDIF
 IF :DEF: ARM922
    WRMMU_FaultAddress_920T	$reg
 ENDIF
 IF :DEF: ARM1020T
    WRMMU_FaultAddress_1020T	$reg
 ENDIF
 IF :DEF: SA110
    WRMMU_FaultAddress_110	$reg
 ENDIF
 IF :DEF: XSCALE
    WRMMU_FaultAddress_XSCALE	$reg
 ENDIF
    MEND

;Flush TLB