📄 pic18fxx39.h
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/* header file for the MICROCHIP PIC18 microcontrollers
PIC18F2439
PIC18F2539
PIC18F4439
PIC18F4539
*/
#ifndef __PIC18FXX39_H
#define __PIC18FXX39_H
static volatile near unsigned char TOSU @ 0xFFF;
static volatile near unsigned char TOSH @ 0xFFE;
static volatile near unsigned char TOSL @ 0xFFD;
static volatile near unsigned char STKPTR @ 0xFFC;
static volatile near unsigned char PCLATU @ 0xFFB;
static volatile near unsigned char PCLATH @ 0xFFA;
static volatile near unsigned char PCL @ 0xFF9;
static volatile far unsigned char * TBLPTR @ 0xFF6;
static volatile near unsigned char TBLPTRU @ 0xFF8;
static volatile near unsigned char TBLPTRH @ 0xFF7;
static volatile near unsigned char TBLPTRL @ 0xFF6;
static volatile near unsigned char TABLAT @ 0xFF5;
static volatile near unsigned char PRODH @ 0xFF4;
static volatile near unsigned char PRODL @ 0xFF3;
static volatile near unsigned char INTCON @ 0xFF2;
static near unsigned char INTCON2 @ 0xFF1;
static volatile near unsigned char INTCON3 @ 0xFF0;
static volatile near unsigned char INDF0 @ 0xFEF;
static volatile near unsigned char POSTINC0 @ 0xFEE;
static volatile near unsigned char POSTDEC0 @ 0xFED;
static volatile near unsigned char PREINC0 @ 0xFEC;
static volatile near unsigned char PLUSW0 @ 0xFEB;
static volatile near unsigned char FSR0H @ 0xFEA;
static volatile near unsigned char FSR0L @ 0xFE9;
static volatile near unsigned char WREG @ 0xFE8;
static volatile near unsigned char INDF1 @ 0xFE7;
static volatile near unsigned char POSTINC1 @ 0xFE6;
static volatile near unsigned char POSTDEC1 @ 0xFE5;
static volatile near unsigned char PREINC1 @ 0xFE4;
static volatile near unsigned char PLUSW1 @ 0xFE3;
static volatile near unsigned char FSR1H @ 0xFE2;
static volatile near unsigned char FSR1L @ 0xFE1;
static near unsigned char BSR @ 0xFE0;
static volatile near unsigned char INDF2 @ 0xFDF;
static volatile near unsigned char POSTINC2 @ 0xFDE;
static volatile near unsigned char POSTDEC2 @ 0xFDD;
static volatile near unsigned char PREINC2 @ 0xFDC;
static volatile near unsigned char PLUSW2 @ 0xFDB;
static volatile near unsigned char FSR2H @ 0xFDA;
static volatile near unsigned char FSR2L @ 0xFD9;
static volatile near unsigned char STATUS @ 0xFD8;
static volatile near unsigned char TMR0H @ 0xFD7;
static volatile near unsigned char TMR0L @ 0xFD6;
// 16-Bit definition
static volatile near unsigned int TMR0 @ 0xFD6;
static near unsigned char T0CON @ 0xFD5;
static volatile near unsigned char LVDCON @ 0xFD2;
static volatile near unsigned char WDTCON @ 0xFD1;
static volatile near unsigned char RCON @ 0xFD0;
static volatile near unsigned char TMR1H @ 0xFCF;
static volatile near unsigned char TMR1L @ 0xFCE;
// 16-Bit definition
static volatile near unsigned int TMR1 @ 0xFCE;
static near unsigned char T1CON @ 0xFCD;
static volatile near unsigned char SSPBUF @ 0xFC9;
static near unsigned char SSPADD @ 0xFC8;
static volatile near unsigned char SSPSTAT @ 0xFC7;
static volatile near unsigned char SSPCON1 @ 0xFC6;
static volatile near unsigned char SSPCON2 @ 0xFC5;
static volatile near unsigned char ADRESH @ 0xFC4;
static volatile near unsigned char ADRESL @ 0xFC3;
// 16-Bit definition
static volatile near unsigned int ADRES @ 0xFC3;
static volatile near unsigned char ADCON0 @ 0xFC2;
static near unsigned char ADCON1 @ 0xFC1;
static volatile near unsigned char CCPR1H @ 0xFBF;
static volatile near unsigned char CCPR2H @ 0xFBC;
static volatile near unsigned char TMR3H @ 0xFB3;
static volatile near unsigned char TMR3L @ 0xFB2;
// 16-Bit definition
static volatile near unsigned int TMR3 @ 0xFB2;
static near unsigned char T3CON @ 0xFB1;
static near unsigned char SPBRG @ 0xFAF;
static volatile near unsigned char RCREG @ 0xFAE;
static volatile near unsigned char TXREG @ 0xFAD;
static volatile near unsigned char TXSTA @ 0xFAC;
static volatile near unsigned char RCSTA @ 0xFAB;
static near unsigned char EEADR @ 0xFA9;
static volatile near unsigned char EEDATA @ 0xFA8;
static volatile near unsigned char EECON2 @ 0xFA7;
static volatile near unsigned char EECON1 @ 0xFA6;
static near unsigned char IPR2 @ 0xFA2;
static volatile near unsigned char PIR2 @ 0xFA1;
static near unsigned char PIE2 @ 0xFA0;
static near unsigned char IPR1 @ 0xF9F;
static volatile near unsigned char PIR1 @ 0xF9E;
static near unsigned char PIE1 @ 0xF9D;
#if defined(_18F4439) || defined(_18F4539)
static volatile near unsigned char TRISE @ 0xF96;
static volatile near unsigned char TRISD @ 0xF95;
#endif
static volatile near unsigned char TRISC @ 0xF94;
static volatile near unsigned char TRISB @ 0xF93;
static volatile near unsigned char TRISA @ 0xF92;
#if defined(_18F4439) || defined(_18F4539)
static volatile near unsigned char LATE @ 0xF8D;
static volatile near unsigned char LATD @ 0xF8C;
#endif
static volatile near unsigned char LATC @ 0xF8B;
static volatile near unsigned char LATB @ 0xF8A;
static volatile near unsigned char LATA @ 0xF89;
#if defined(_18F4439) || defined(_18F4539)
static volatile near unsigned char PORTE @ 0xF84;
static volatile near unsigned char PORTD @ 0xF83;
#endif
static volatile near unsigned char PORTC @ 0xF82;
static volatile near unsigned char PORTB @ 0xF81;
static volatile near unsigned char PORTA @ 0xF80;
/* Definitions for STKPTR register */
static volatile near bit STKUNF @ ((unsigned)&STKPTR*8)+6;
static volatile near bit STKFUL @ ((unsigned)&STKPTR*8)+7;
/* Definitions for INTCON register */
static volatile near bit RBIF @ ((unsigned)&INTCON*8)+0;
static volatile near bit INT0IF @ ((unsigned)&INTCON*8)+1;
static volatile near bit TMR0IF @ ((unsigned)&INTCON*8)+2;
static near bit RBIE @ ((unsigned)&INTCON*8)+3;
static near bit INT0IE @ ((unsigned)&INTCON*8)+4;
static near bit TMR0IE @ ((unsigned)&INTCON*8)+5;
static near bit PEIE @ ((unsigned)&INTCON*8)+6;
static near bit GIE @ ((unsigned)&INTCON*8)+7;
/* Alternate definitions for INTCON register */
static near bit GIEL @ ((unsigned)&INTCON*8)+0;
static near bit GIEH @ ((unsigned)&INTCON*8)+1;
/* Definitions for INTCON2 register */
static near bit RBIP @ ((unsigned)&INTCON2*8)+0;
static near bit TMR0IP @ ((unsigned)&INTCON2*8)+2;
static near bit INTEDG2 @ ((unsigned)&INTCON2*8)+4;
static near bit INTEDG1 @ ((unsigned)&INTCON2*8)+5;
static near bit INTEDG0 @ ((unsigned)&INTCON2*8)+6;
static near bit RBPU @ ((unsigned)&INTCON2*8)+7;
/* Definitions for INTCON3 register */
static volatile near bit INT1IF @ ((unsigned)&INTCON3*8)+0;
static volatile near bit INT2IF @ ((unsigned)&INTCON3*8)+1;
static near bit INT1IE @ ((unsigned)&INTCON3*8)+3;
static near bit INT2IE @ ((unsigned)&INTCON3*8)+4;
static near bit INT1IP @ ((unsigned)&INTCON3*8)+6;
static near bit INT2IP @ ((unsigned)&INTCON3*8)+7;
/* Definitions for STATUS register */
static volatile near bit CARRY @ ((unsigned)&STATUS*8)+0;
static volatile near bit DC @ ((unsigned)&STATUS*8)+1;
static volatile near bit ZERO @ ((unsigned)&STATUS*8)+2;
static volatile near bit OV @ ((unsigned)&STATUS*8)+3;
static volatile near bit NEGATIVE @ ((unsigned)&STATUS*8)+4;
/* Definitions for T0CON register */
static near bit T0PS0 @ ((unsigned)&T0CON*8)+0;
static near bit T0PS1 @ ((unsigned)&T0CON*8)+1;
static near bit T0PS2 @ ((unsigned)&T0CON*8)+2;
static near bit PSA @ ((unsigned)&T0CON*8)+3;
static near bit T0SE @ ((unsigned)&T0CON*8)+4;
static near bit T0CS @ ((unsigned)&T0CON*8)+5;
static near bit T08BIT @ ((unsigned)&T0CON*8)+6;
static near bit TMR0ON @ ((unsigned)&T0CON*8)+7;
/* Definitions for LVDCON register */
static near bit LVDL0 @ ((unsigned)&LVDCON*8)+0;
static near bit LVDL1 @ ((unsigned)&LVDCON*8)+1;
static near bit LVDL2 @ ((unsigned)&LVDCON*8)+2;
static near bit LVDL3 @ ((unsigned)&LVDCON*8)+3;
static near bit LVDEN @ ((unsigned)&LVDCON*8)+4;
static volatile near bit IRVST @ ((unsigned)&LVDCON*8)+5;
/* Definitions for WDTCON register */
static near bit SWDTE @ ((unsigned)&WDTCON*8)+0;
/* Definitions for RCON register */
static volatile near bit BOR @ ((unsigned)&RCON*8)+0;
static volatile near bit POR @ ((unsigned)&RCON*8)+1;
static volatile near bit PD @ ((unsigned)&RCON*8)+2;
static volatile near bit TO @ ((unsigned)&RCON*8)+3;
static volatile near bit RI @ ((unsigned)&RCON*8)+4;
static near bit IPEN @ ((unsigned)&RCON*8)+7;
/* Definitions for T1CON register */
static near bit TMR1ON @ ((unsigned)&T1CON*8)+0;
static near bit TMR1CS @ ((unsigned)&T1CON*8)+1;
static near bit T1SYNC @ ((unsigned)&T1CON*8)+2;
static near bit T1CKPS0 @ ((unsigned)&T1CON*8)+4;
static near bit T1CKPS1 @ ((unsigned)&T1CON*8)+5;
static near bit T1RD16 @ ((unsigned)&T1CON*8)+7;
/* Definitions for SSPSTAT register */
static volatile near bit BF @ ((unsigned)&SSPSTAT*8)+0;
static volatile near bit UA @ ((unsigned)&SSPSTAT*8)+1;
static volatile near bit RW @ ((unsigned)&SSPSTAT*8)+2;
static volatile near bit START @ ((unsigned)&SSPSTAT*8)+3;
static volatile near bit STOP @ ((unsigned)&SSPSTAT*8)+4;
static volatile near bit DA @ ((unsigned)&SSPSTAT*8)+5;
static near bit CKE @ ((unsigned)&SSPSTAT*8)+6;
static near bit SMP @ ((unsigned)&SSPSTAT*8)+7;
/* Definitions for SSPCON1 register */
static near bit SSPM0 @ ((unsigned)&SSPCON1*8)+0;
static near bit SSPM1 @ ((unsigned)&SSPCON1*8)+1;
static near bit SSPM2 @ ((unsigned)&SSPCON1*8)+2;
static near bit SSPM3 @ ((unsigned)&SSPCON1*8)+3;
static near bit CKP @ ((unsigned)&SSPCON1*8)+4;
static near bit SSPEN @ ((unsigned)&SSPCON1*8)+5;
static volatile near bit SSPOV @ ((unsigned)&SSPCON1*8)+6;
static volatile near bit WCOL @ ((unsigned)&SSPCON1*8)+7;
/* Definitions for SSPCON2 register */
static near bit SEN @ ((unsigned)&SSPCON2*8)+0;
static volatile near bit RSEN @ ((unsigned)&SSPCON2*8)+1;
static volatile near bit PEN @ ((unsigned)&SSPCON2*8)+2;
static volatile near bit RCEN @ ((unsigned)&SSPCON2*8)+3;
static volatile near bit ACKEN @ ((unsigned)&SSPCON2*8)+4;
static volatile near bit ACKDT @ ((unsigned)&SSPCON2*8)+5;
static volatile near bit ACKSTAT @ ((unsigned)&SSPCON2*8)+6;
static near bit GCEN @ ((unsigned)&SSPCON2*8)+7;
/* Definitions for ADCON0 register */
static near bit ADON @ ((unsigned)&ADCON0*8)+0;
static volatile near bit GODONE @ ((unsigned)&ADCON0*8)+2;
static near bit CHS0 @ ((unsigned)&ADCON0*8)+3;
static near bit CHS1 @ ((unsigned)&ADCON0*8)+4;
static near bit CHS2 @ ((unsigned)&ADCON0*8)+5;
static near bit ADCS0 @ ((unsigned)&ADCON0*8)+6;
static near bit ADCS1 @ ((unsigned)&ADCON0*8)+7;
/* Definitions for ADCON1 register */
static near bit PCFG0 @ ((unsigned)&ADCON1*8)+0;
static near bit PCFG1 @ ((unsigned)&ADCON1*8)+1;
static near bit PCFG2 @ ((unsigned)&ADCON1*8)+2;
static near bit PCFG3 @ ((unsigned)&ADCON1*8)+3;
static near bit ADCS2 @ ((unsigned)&ADCON1*8)+6;
static near bit ADFM @ ((unsigned)&ADCON1*8)+7;
/* Definitions for T3CON register */
static near bit TMR3ON @ ((unsigned)&T3CON*8)+0;
static near bit TMR3CS @ ((unsigned)&T3CON*8)+1;
static near bit T3SYNC @ ((unsigned)&T3CON*8)+2;
static near bit T3CKPS0 @ ((unsigned)&T3CON*8)+4;
static near bit T3CKPS1 @ ((unsigned)&T3CON*8)+5;
static near bit T3RD16 @ ((unsigned)&T3CON*8)+7;
/* Definitions for TXSTA register */
static volatile near bit TX9D @ ((unsigned)&TXSTA*8)+0;
static volatile near bit TRMT @ ((unsigned)&TXSTA*8)+1;
static near bit BRGH @ ((unsigned)&TXSTA*8)+2;
static near bit SYNC @ ((unsigned)&TXSTA*8)+4;
static near bit TXEN @ ((unsigned)&TXSTA*8)+5;
static near bit TX9 @ ((unsigned)&TXSTA*8)+6;
static near bit CSRC @ ((unsigned)&TXSTA*8)+7;
/* Definitions for RCSTA register */
static volatile near bit RX9D @ ((unsigned)&RCSTA*8)+0;
static volatile near bit OERR @ ((unsigned)&RCSTA*8)+1;
static volatile near bit FERR @ ((unsigned)&RCSTA*8)+2;
static near bit ADDEN @ ((unsigned)&RCSTA*8)+3;
static near bit CREN @ ((unsigned)&RCSTA*8)+4;
static near bit SREN @ ((unsigned)&RCSTA*8)+5;
static near bit RX9 @ ((unsigned)&RCSTA*8)+6;
static near bit SPEN @ ((unsigned)&RCSTA*8)+7;
/* Definitions for EECON1 register */
static volatile near bit RD @ ((unsigned)&EECON1*8)+0;
static volatile near bit WR @ ((unsigned)&EECON1*8)+1;
static near bit WREN @ ((unsigned)&EECON1*8)+2;
static volatile near bit WRERR @ ((unsigned)&EECON1*8)+3;
static volatile near bit FREE @ ((unsigned)&EECON1*8)+4;
static near bit CFGS @ ((unsigned)&EECON1*8)+6;
static near bit EEPGD @ ((unsigned)&EECON1*8)+7;
/* Definitions for IPR2 register */
static near bit TMR3IP @ ((unsigned)&IPR2*8)+1;
static near bit LVDIP @ ((unsigned)&IPR2*8)+2;
static near bit BCLIP @ ((unsigned)&IPR2*8)+3;
static near bit EEIP @ ((unsigned)&IPR2*8)+4;
/* Definitions for PIR2 register */
static volatile near bit TMR3IF @ ((unsigned)&PIR2*8)+1;
static volatile near bit LVDIF @ ((unsigned)&PIR2*8)+2;
static volatile near bit BCLIF @ ((unsigned)&PIR2*8)+3;
static volatile near bit EEIF @ ((unsigned)&PIR2*8)+4;
/* Definitions for PIE2 register */
static near bit TMR3IE @ ((unsigned)&PIE2*8)+1;
static near bit LVDIE @ ((unsigned)&PIE2*8)+2;
static near bit BCLIE @ ((unsigned)&PIE2*8)+3;
static near bit EEIE @ ((unsigned)&PIE2*8)+4;
/* Definitions for IPR1 register */
static near bit TMR1IP @ ((unsigned)&IPR1*8)+0;
static near bit TMR2IP @ ((unsigned)&IPR1*8)+1;
static near bit SSPIP @ ((unsigned)&IPR1*8)+3;
static near bit TXIP @ ((unsigned)&IPR1*8)+4;
static near bit RCIP @ ((unsigned)&IPR1*8)+5;
static near bit ADIP @ ((unsigned)&IPR1*8)+6;
static near bit PSPIP @ ((unsigned)&IPR1*8)+7;
/* Definitions for PIR1 register */
static volatile near bit TMR1IF @ ((unsigned)&PIR1*8)+0;
static volatile near bit TMR2IF @ ((unsigned)&PIR1*8)+1;
static volatile near bit SSPIF @ ((unsigned)&PIR1*8)+3;
static volatile near bit TXIF @ ((unsigned)&PIR1*8)+4;
static volatile near bit RCIF @ ((unsigned)&PIR1*8)+5;
static volatile near bit ADIF @ ((unsigned)&PIR1*8)+6;
static volatile near bit PSPIF @ ((unsigned)&PIR1*8)+7;
/* Definitions for PIE1 register */
static near bit TMR1IE @ ((unsigned)&PIE1*8)+0;
static near bit TMR2IE @ ((unsigned)&PIE1*8)+1;
static near bit SSPIE @ ((unsigned)&PIE1*8)+3;
static near bit TXIE @ ((unsigned)&PIE1*8)+4;
static near bit RCIE @ ((unsigned)&PIE1*8)+5;
static near bit ADIE @ ((unsigned)&PIE1*8)+6;
static near bit PSPIE @ ((unsigned)&PIE1*8)+7;
#if defined(_18F4439) || defined(_18F4539)
/* Definitions for TRISE register */
static volatile near bit TRISE0 @ ((unsigned)&TRISE*8)+0;
static volatile near bit TRISE1 @ ((unsigned)&TRISE*8)+1;
static volatile near bit TRISE2 @ ((unsigned)&TRISE*8)+2;
static near bit PSPMODE @ ((unsigned)&TRISE*8)+4;
static volatile near bit IBOV @ ((unsigned)&TRISE*8)+5;
static volatile near bit OBF @ ((unsigned)&TRISE*8)+6;
static volatile near bit IBF @ ((unsigned)&TRISE*8)+7;
/* Definitions for TRISD register */
static volatile near bit TRISD0 @ ((unsigned)&TRISD*8)+0;
static volatile near bit TRISD1 @ ((unsigned)&TRISD*8)+1;
static volatile near bit TRISD2 @ ((unsigned)&TRISD*8)+2;
static volatile near bit TRISD3 @ ((unsigned)&TRISD*8)+3;
static volatile near bit TRISD4 @ ((unsigned)&TRISD*8)+4;
static volatile near bit TRISD5 @ ((unsigned)&TRISD*8)+5;
static volatile near bit TRISD6 @ ((unsigned)&TRISD*8)+6;
static volatile near bit TRISD7 @ ((unsigned)&TRISD*8)+7;
#endif
/* Definitions for TRISC register */
static volatile near bit TRISC0 @ ((unsigned)&TRISC*8)+0;
static volatile near bit TRISC3 @ ((unsigned)&TRISC*8)+3;
static volatile near bit TRISC4 @ ((unsigned)&TRISC*8)+4;
static volatile near bit TRISC5 @ ((unsigned)&TRISC*8)+5;
static volatile near bit TRISC6 @ ((unsigned)&TRISC*8)+6;
static volatile near bit TRISC7 @ ((unsigned)&TRISC*8)+7;
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